Job Title: Principal Electronics Engineer Embedded Hardware Location: Bengaluru Experience: 8 14 years Industry: Automotive / EV / Manufacturing Employment Type: Full-time About Ultraviolette Join the Charge. Create the Future. At Ultraviolette, we are more than just a company we re a movement that s reshaping the future of electric mobility. From building India s fastest electric motorcycle to designing the world s most advanced electric scooter, we thrive on pushing the boundaries of what s possible. We are a team of engineers, designers, and trailblazers united by a passion to craft machines that are sustainable, intelligent, and exhilarating. Every bolt, every line of code, and every component is designed with a singular mission: to accelerate the global shift toward next-generation mobility. Role Overview We are looking for a Principal / Lead Electronics Engineer Embedded Hardware to take ownership of vehicle electronics architecture, embedded systems design, diagnostics, and system-level validation for our next-gen electric vehicles. In this role, you will be at the forefront of developing high-performance electronic control units, telematics, and connected systems for future-ready vehicles. You will drive architecture decisions, system integration, and compliance, working alongside cross-functional teams to bring innovation from concept to the street. Key Responsibilities 1. Vehicle Electronics Architecture Design and bring to production electronic hardware including ECUs, display clusters, and telematics modules. Develop high-speed embedded designs with RF, sensor integration, and communication interfaces (CAN, LIN, UART, SPI, I2C). Create and maintain system schematics, architecture documentation, and interface definitions. 2. Embedded Hardware Design Develop embedded platforms with high-performance microcontrollers/processors to support vision systems, graphics, radar/LiDAR, audio, and OS-based applications. Architect and validate connected systems involving GNSS, LTE, BLE, Wi-Fi. Lead the design and integration of vehicle subsystems like lighting, clusters, IMUs, and more. Collaborate closely with firmware teams on hardware-software integration, bootloaders, and OTA functionality. 3. Diagnostics & Compliance Implement UDS-based diagnostics, fault logging systems, and service tools. Ensure compliance with AIS-004, ISO 26262, and other automotive design standards. 4. Testing & Validation Define and execute component-level and vehicle-level validation test plans. Utilize tools like Vector CANoe, CANalyzer, ETAS INCA, oscilloscopes, and spectrum/network analyzers for debugging and validation. 5. Cross-functional Collaboration Partner with teams across mechanical, software, UX, powertrain, and wire harness for holistic system integration. Work with mobile and cloud teams to enable real-time data streaming, diagnostics, and OTA updates. Actively contribute in design reviews, DFMEAs, and root cause analyses of field issues. Required Qualifications & Skills B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines. 8+ years of embedded hardware design experience, preferably in 2W/EV/automotive domain. Strong understanding of embedded C and scripting languages (e.g., Python, MATLAB, Octave). Experience with circuit simulation tools (e.g., PSPICE, LTSPICE, SIMPLIS, Simetrix). Hands-on expertise in RF design, signal/power integrity, EMI/EMC compliant layouts. Proficiency in PCB design tools (e.g., OrCAD, Altium, Mentor Graphics). Demonstrated experience in designing systems with multi-core processors, memory chips, SoMs, and high-speed interfaces (USB, Ethernet, LVDS, MIPI). Deep knowledge of embedded communication protocols (CAN, LIN, SPI, UART, I2C). Strong debugging and problem-solving skills in hardware validation and field testing. Nice to Have Hands-on experience in vehicle electronics development for 2W, 4W, or electric vehicles. Familiarity with DFT/DFA (Design for Testing/Assembly) methodologies. Experience with manufacturing and compliance testing for embedded hardware. Background in developing connected vehicle ecosystems with OTA capabilities. Passionate about emerging technologies in mobility, EVs, and embedded systems. Be part of India s electric mobility revolution where engineering meets adrenaline. Work on world-class technologies that are pushing global boundaries. Join a culture that encourages innovation, learning, and ownership. Collaborate with passionate teams building next-gen mobility experiences. Qualification : B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines

Position: Junior/Senior Design Engineer Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication / Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 2 to 4 years Job Overview We are looking for a passionate and detail-oriented Hardware Design Engineer (Junior/Senior level) to join our engineering team in Bangalore. In this role, you will be responsible for designing high-performance embedded hardware systems, from circuit design and schematic capture to board bring-up and testing. You ll work closely with cross-functional teams to deliver robust, scalable, and reliable hardware solutions, primarily for embedded and defense applications. Key Responsibilities Execute assigned hardware design tasks within defined timelines. Design and develop complex hardware circuits, schematics, and PCB layouts. Perform Signal Integrity (SI), Power Integrity (PI), and thermal analysis. Develop hardware test plans and execute board/system testing accordingly. Conduct board bring-up, validation, and debugging of hardware platforms. Participate in design reviews, defect prevention, and continuous improvement activities. Adhere to all QMS (Quality Management System) and project-specific processes. Prepare detailed technical documentation and maintain design records. Flag and resolve any technical challenges with guidance from tech leads. Technical Skill Set Strong expertise in circuit design, schematic capture, and PCB design. Hands-on experience with 16-bit or 32-bit processors/microcontrollers (e.g., ARM, PowerPC, IBM PPC 405, Intel x86). Experience with FPGA-based board designs. Good understanding of high-speed board design and signal integrity concepts. Familiarity with system interfaces: PCI, PCIe, VME, Compact PCI, ATCA/AMC is a plus. Exposure to embedded hardware design for defense applications. Understanding of qualification processes for industrial/defense-grade products. Proficiency in board bring-up and hardware debugging techniques. Technology Domains Storage Technologies: iSCSI, SATA, Fibre Channel Processors: MIPS, ARM, PowerPC Interfaces: USB, PCIe, PCI-X Memory: DDR, DDR2, RLDRAM Soft Skills & Attributes Strong verbal and written communication skills Excellent interpersonal and teamwork abilities Proactive and solution-oriented mindset Strong time management and organizational skills Opportunity to work on cutting-edge hardware design projects in embedded and defense domains Exposure to the complete hardware development lifecycle Collaborative and inclusive work culture Learning and development support Competitive compensation package Qualification : M.E./M.Tech. in Electronics & Communication

Job Description Intel is looking for an experienced Customer Quality Engineer to play a key technical support role for Xeon platforms, acting as a primary contact for pre- and post-sales support. In this role, you will represent Intel in customer engagements, ensuring that customer needs are accurately communicated within Intel and that technical challenges are resolved efficiently. You will collaborate closely with Sales and Marketing (SMG) and internal engineering teams to drive strategic technical support and enablement. Key Responsibilities: Xeon systems technology enabling, supporting customers in hardware design and validation. Provide hardware design support, including schematic reviews, layout analysis, SI (Signal Integrity), PI (Power Integrity), mechanical, and thermal analysis. Debug and resolve hardware issues, working closely with internal and external partners. Develop and publish technical documentation, collaterals, and training materials for DCAI (Data Center and AI) platforms. Manage Field Action Customer Returns (FACR) and returns management. Support customer production challenges by offering technical expertise and resolution strategies. Enable early worldwide customer issue support, facilitating platform debug and silicon failure analysis. Provide post-sales technical support for installation, implementation, and maintenance of DCAI reference platforms. Ensure Intel solutions are fully functional and meeting customer specifications, with follow-up technical support as needed. Qualifications & Experience: Educational Requirements: B.E in Electronics & Communication Engineering or a related field. Minimum of 15 years of industry experience in relevant areas. Technical Expertise: Experience in Xeon platforms hardware design and validation. Strong knowledge of schematics, layout, mechanical, and thermal analysis. Experience in electrical validation and signal integrity (SI) analysis (desirable). Expertise in hardware issue validation and debug. Proven ability to develop technical documents and presentations for customer training and support. About Intel Validation Engineering (iVE) Group: The Intel Validation Engineering (iVE) Group plays a crucial role in Intel s product leadership, ensuring that the latest cutting-edge designs and technologies meet the highest quality standards. iVE is responsible for validating, debugging, and optimizing Intel s products, ensuring the timely delivery of Intel s annual technology roadmap. Intel s Commitment to Diversity & Inclusion: Intel is committed to providing equal employment opportunities to all qualified applicants regardless of race, gender, religion, nationality, disability, or any other protected characteristic under local laws. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for career growth, leadership, and professional development. Qualification : B.E in Electronics & Communication Engineering or a related field.

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

General Summary The Wireless R&D HW team in Bangalore is seeking experienced Wireless Modem Hardware Model Developers to work on Qualcomm s industry-leading chipset solutions, specifically focusing on modem WWAN IPs. This role involves contributing to flagship modem core IP development for 5G (NR) and 4G (LTE) technologies. Roles and Responsibilities Modem Development: Contribute to defining and developing next-generation multi-mode 5G modems. Hardware Model Development: Develop and verify hardware models for modem core IP using C++/SystemC. These models serve as golden references for RTL verification and pre-silicon firmware development (virtual prototyping). Hardware Microarchitecture: Understand and abstract hardware microarchitectures for accurate modeling. Technology Application: Work on wireless technologies such as NR, LTE, WLAN, and Bluetooth to enhance modem functionality. Signal Processing: Leverage expertise in digital signal processing to improve hardware modeling and design processes. Cross-Domain Expertise: Candidates with backgrounds in SW/FW development or DSP-based HW IP design/verification will also be considered. Required Skills and Qualifications Programming Skills: Proficient in C++ with exposure to SystemC, System Verilog, and/or MATLAB. Hardware Microarchitecture: Strong understanding of hardware microarchitectures and modeling abstraction. Wireless Technology: Working knowledge of physical layers in NR, LTE, WLAN, and Bluetooth. DSP Expertise: Experience in digital signal processing and its applications in hardware modeling or RTL design/verification. Collaboration Skills: Ability to work effectively within a multi-functional team. Preferred Experience Hands-on experience with HW modeling, design, or verification of IPs. Experience with firmware/software development in wireless IP. Technical knowledge of DSP-based HW IPs. Educational Requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience. Master's degree with 1+ year of relevant work experience. PhD in a related field. Why Qualcomm? Leading Innovation: Be part of a team developing cutting-edge wireless modem solutions for next-generation technologies. Diverse Opportunities: Gain exposure to multiple domains, including DSP, firmware, and hardware design. Global Impact: Contribute to solutions that drive connectivity and transform industries worldwide. Professional Growth: Work with industry leaders on groundbreaking projects with significant career development opportunities. Qualification : Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm, a leading innovator in technology, is pushing the boundaries of possibility to drive the digital transformation and create a smarter, more connected future. As a Hardware Engineer at Qualcomm, you will play a key role in designing, optimizing, verifying, and testing a wide range of electronic systems. This includes everything from circuits, mechanical systems, digital/analog/RF/optical systems, and test systems, to FPGA and DSP systems. You will collaborate with cross-functional teams to develop solutions that meet performance requirements and launch world-class products. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 3+ years of experience in Hardware Engineering or a similar field. OR Master's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 2+ years of experience in Hardware Engineering or a related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field, with 1+ year of experience in Hardware Engineering or a related field. Experience: 7 to 10 years Key Responsibilities and Skills: Physical Design Expertise: Extensive experience with block-level physical design, including a strong understanding of the PnR cycle. Industry-Standard Tools: Proficiency in industry-standard physical design tools like ICC2 and Innovus. Signoff Tools: Solid understanding and hands-on experience with signoff tools such as PrimeTime, Redhawk, and Calibre. Technical Leadership: Ability to guide and mentor junior engineers, helping them resolve technical challenges effectively. Tools & Scripting: Experience with tools like ICC/Innovus, PrimeTime (PT), StarRC, Redhawk, and Calibre DRC/LVS. Proficient in scripting languages such as TCL and Perl.

Hardware Engineer - Customer Hardware Design Automation Company Qualcomm India Private Limited Job Area Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world-class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 1+ year of Hardware Engineering or related work experience. Job Responsibilities Qualcomm is looking for candidates to support its customers in designing solutions using Qualcomm chipset-based solutions. The candidate will contribute to the development of Customer Hardware design automation tools. Responsibilities include: Developing, enhancing, and maintaining tools that support the design and validation of PCB platforms using Qualcomm chipsets. Collaborating with cross-functional teams to ensure tools meet high standards of quality and performance for PDN, Signal Integrity, and PCB validation tools. Working across applications including Laptops, IoT, and Automotive. Preferred Qualifications Experience in tool development for hardware design automation. Experience in platform-level automated debug solutions. Familiarity with telemetry analytics, Windows debug tools, and analyzers. Knowledge of thermal and power management. Experience in platform validation and debug tools. Proficiency in system automation. Equal Opportunity Employer Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, you may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Important Note to Agencies Qualcomm s Careers Site is for individuals seeking employment at Qualcomm. Staffing and recruiting agencies, and individuals being represented by an agency, are not authorized to use this site to submit profiles, applications, or resumes. Unsolicited resumes/applications submitted by agencies will not be accepted. Qualcomm does not accept any responsibility for fees related to unsolicited resumes/applications.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Additional Job Description Additional Job Description Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team at Qualcomm. Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute. Responsibilities Design, develop, and maintain CAD infrastructure for silicon design teams enabling bringup, test and debug automations. Collaborate with silicon designers, architects, silicon validation engineer, and other stakeholders to to improve future CPU bringups Define and implement new infrastructure capabilities that can be used to accelerate design utilizing multi-site datacenters. Prepare for CPU bring up through pre-work on emulation and FPGA platforms Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs Troubleshoot and resolve issues related to CAD infrastructure, including hardware and software problems Support design engineers on the flow setup and resolve their queries Develop test contents and testing strategies to assist validation of CPU on silicon Qualifications Must have strong object-oriented programming abilities in Python. Must have knowledge and experience with silicon bringup and debugging Must have worked on Digital flows/methodologies development in the Emulation, pre-silicon and/or post-silicon. Familiarity with firmware and software debug, Silicon bring up and validation of CPU features. MS/BS in Electrical/Computer Engineering with 10+ years of demonstrated experience in CAD or EDA tools flows architecture, development, and support. Ability to document design methodologies & provide training on tools and workflows to design teams Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains Proven track record of pushing Prior experience debugging vendor tool problems Strong written and verbal interpersonal skills and track record of success in a collaborative team environment

Job Overview As a Hardware Engineer at Qualcomm, you'll be part of a dynamic team that plans, designs, optimizes, verifies, and tests cutting-edge electronic systems, including circuits, mechanical systems, digital/analog/RF/optical systems, and more. Your role will focus on SerDes PHY Analog Design, specifically within the BDC SerDes Mixed-Signal Design team. This team is directly involved in delivering next-generation custom PHY designs for SoCs (System on Chips), with a key focus on low-power analog designs to support Qualcomm s wireless products. You ll work with cross-functional teams to meet performance requirements and help bring innovative products to market. Key Responsibilities Analog Circuit Design: Hands-on experience in analog circuit design, working on multiple analog building blocks, including LDO, high-speed TX and RX (Equalizer, Sampler, PI, Deserializer), Bias, and Reference circuits. PLL and Frequency Synthesis: Design and implement Analog and Digital PLLs for frequency synthesis and SerDes applications, including Charge Pumps, Loop Filters, VCO/DCO, PFD/TDC, and high-speed dividers. PLL Loop Dynamics: Model PLL Loop Dynamics, including sources of Jitter (RJ & DJ). Schematic to Post-Layout Verification: Take designs from initial schematic to post-layout verification, and ensure integration sign-off for post-silicon bring-up. Collaboration: Work closely with RTL, DD, PD, DV, and SoC Verification teams to integrate the PHY into SoCs. Minimum Qualifications Educational Background: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 3+ years of relevant work experience, or Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 2+ years of relevant work experience, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 1+ year of relevant work experience. Skills & Experience Analog Circuit Design: Hands-on experience with designing analog building blocks such as LDO, high-speed TX/RX, bias, and reference circuits. PLL Design: Strong background in Analog and Digital PLLs for frequency synthesis and SerDes applications. Charge Pump and VCO/DCO: Experience in designing charge pumps, loop filters, VCO/DCO, PFD/TDC, and high-speed dividers. Jitter and PLL Loop Dynamics: In-depth understanding of PLL loop dynamics, jitter modeling, and frequency synthesis for SerDes systems. Design Verification: Experience in taking designs from schematic through post-layout verification, integration, and post-silicon bring-up. Team Collaboration: Ability to work with cross-functional teams such as RTL, DD, PD, DV, and SoC verification teams to ensure smooth integration.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Job Description and Requirements Synopsys is seeking a creative and talented engineer to fill a FPGA Design & Verification role in Bengaluru, India. The environment presents stimulating, challenging, and rewarding work within an excellent work environment with positive career development opportunities. About the Role The FPGA Design and Verification IP Prototyping team is responsible for building FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs and testing them to verify compliance with leading-edge industry standards. We play a vital role in supporting Synopsys IP business by validating key features and mitigating potential ASIC faults early in the prototyping phase. Responsibilities Design, implement, and verify FPGA-based systems for a variety of applications Validate FPGA-based IP prototypes against real-world devices, test equipment, and other hardware systems Create and maintain comprehensive technical documentation Develop and execute test plans and routines Detect, troubleshoot, debug, and investigate potential ASIC issues early on Collaborate with cross-functional teams, internal and external customers Key Qualifications Bachelor's or Master's degree in Electrical Engineering 1+ years of experience in FPGA design and development Design and simulate integrated circuitry using Verilog, SystemVerilog, and VHDL Familiarity with industry-standard interfaces and protocols such as AMBA AXI, APB, I2C, and SPI Expertise with scripting languages such as Tcl, Python, Perl, and Bash Proven problem-solving skills and ability to work in a collaborative team environment Excellent verbal and written communication skills in English Preferred Experience Familiarity with SCM tools like Git Experience with FPGA development tools such as Vivado or Altera Quartus Familiarity with laboratory equipment such as oscilloscopes and data analyzers Knowledge of the MIPI-I3C protocol Understanding of computer architecture and operating systems Qualification : Bachelor's or Master's degree in Electrical Engineering

General Summary: Qualcomm is seeking an Engineering Graduate with strong communication and analytical skills to provide engineering support for IVI (In-Vehicle Infotainment) and ADAS (Advanced Driver Assistance Systems) customers. In this role, you will collaborate with Product Development Managers (PDMs) and engineering teams to address customer requirements and troubleshoot issues. Key Responsibilities: Provide engineering support to Qualcomm IVI/ADAS customers. Collaborate with PDMs and engineering teams to address customer requirements and resolve issues. Support and troubleshoot customer-reported issues in lab environments, drive tests, and certification processes. Perform root cause analysis of customer issues and provide feedback to the engineering team. Work with Linux kernel device drivers, stability, and boot architecture. Develop and support Android, QNX, and hypervisor-based platforms. Utilize debug tools related to memory, GDB, and coredumps. Work with Multimedia domains, including graphics, display, and video. Minimum Qualifications: Bachelor s degree in Engineering, Information Systems, Computer Science, or a related field. Programming proficiency in C, C++, and Java. Working knowledge of Python. Hands-on experience with Linux kernel development and device drivers. Experience in debugging and using tools like GDB, coredump analysis, and memory debugging. Familiarity with Android, QNX, and hypervisor-based environments. Equal Opportunity & Accessibility: Qualcomm is committed to equal opportunity employment and providing an accessible hiring process. Qualification : Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: Qualcomm is at the forefront of technology innovation, constantly pushing the boundaries to enable next-generation experiences and drive digital transformation. As a Hardware Application Engineer at Qualcomm, you will provide technical expertise through product demonstrations, training, and support for the design, debugging, testing, and quality of customer products. You will work closely with cross-functional teams to assess and apply Qualcomm's products, ensuring they meet and exceed customer expectations. Minimum Qualifications: Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or a related field, with 2+ years of experience in Hardware Applications Engineering, Hardware Design, or a related field. OR Master's degree in Electrical/Electronics Engineering, Computer Engineering, or a related field, with 1+ year of experience in Hardware Applications Engineering, Hardware Design, or a related field. OR PhD in Electrical/Electronics Engineering, Computer Engineering, or a related field. Key Responsibilities: Engage with customer designs, assist with feature definition, and conduct design reviews. Provide in-depth technical responses to customer inquiries and troubleshoot customer designs. Offer necessary training and technical support to customers. Collaborate with hardware, software, RF systems, and testing teams to deliver comprehensive solutions. Provide hardware design support for customers developing wireless products. Perform block diagram, schematic, placement, and PCB design reviews on customer products. Troubleshoot technical issues and resolve problems through hands-on support. Assist customers in implementing new technology using Qualcomm chipsets and support business teams on new projects. Develop an understanding of RF systems and cellular standards, including GSM, LTE, and 5G. Conduct tests for various technologies such as GSM, C2K, TDSCDMA, WCDMA, LTE, 5G SUB6, and 5G mmW (a strong plus). Desired Skills and Experience: Strong knowledge of cellular technologies like GSM, LTE, and 5G. Understanding of RF component characteristics and behavior. Proficient in problem-solving and analytical skills. Familiarity with PCB CAD tools such as Allegro and PADS for reviewing customer layouts. Experience with digital circuit design, software programming, or power management is a plus. Strong communication skills and the ability to work effectively with cross-functional teams.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Job Description: We are seeking a highly skilled and experienced CPU Verification Engineer with a focus on ARM and NCC-based ARM architecture. This role requires a deep understanding of CPU microarchitecture, SOC integration, and verification methodologies. The ideal candidate will lead verification efforts, collaborate with cross-functional teams, and mentor junior engineers to ensure high-quality CPU design verification. Key Responsibilities: Lead and execute verification plans for CPU designs based on ARM and NCC-based ARM architecture. Develop and enhance testbenches and verification environments using advanced automation techniques. Collaborate with design and architecture teams to identify and resolve specification gaps, ensuring comprehensive verification coverage. Perform SOC-level verification, including integration and validation of CPU subsystems. Utilize industry-standard verification tools and methodologies such as UVM, SystemVerilog, and simulation/emulation platforms. Mentor and guide junior verification engineers, providing technical leadership and support. Continuously improve verification processes and methodologies to enhance efficiency and effectiveness. Qualifications: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. 8 14 years of experience in CPU verification, with a focus on ARM and NCC-based ARM architecture. Proficiency in verification languages and methodologies, including SystemVerilog, UVM, and scripting languages (Python, Perl, etc.). Strong understanding of CPU microarchitecture, memory hierarchy, and SOC integration. Experience with simulation, emulation, and formal verification tools. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills, with the ability to work in a collaborative environment. Preferred Qualifications: Experience with low-power design verification and performance verification. Knowledge of hardware security verification techniques. Familiarity with machine learning and AI-based verification approaches. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of hardware engineering or related work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or related field and 1+ year of hardware engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.

Job Description: Arm has excellent opportunities in the Solution Engineering group - which has a charter to develop best-in-class SoCs and compute subsystems using industry-leading Arm IP products. These solutions target different market segments like premium mobile, servers, automotive, and IoT. The pre-silicon verification team in Bangalore is looking for highly-skilled engineers with experience in system validation of SoCs on Emulation platform. Responsibilities: Be part of the verification team, and define the emulation-based stress validation methodology & build verification plans. This will involve closely interacting with multiple cross-site & co-located collaborators like the SoC architects, designers, & DV engineers to come up with the extended stress validation plans for the product. Work on multiple industry-standard emulation platforms from EDA vendors, and closely collaborate with technology teams to resolve issues with porting the design on these platforms, and to improve Arm's validation methodology on emulation Take up the responsibility to identify & enable transactors, traffic exercisers, virtual host devices, and monitors on the emulation platform - which will help effective validation of the SoC design. You will be accountable for planning and developing bare-metal and OS-based test content for system stress and use-case validation targeting multiple product use-cases. The team is responsible to find bugs by enabling validation content on high-speed subsystems like PCIe, Ethernet, USB, etc. and other subsystems like DDR, HBM, UFS, HDMI, MIPI devices, LSIO, etc. on emulation Mentor junior engineers and work as a team to deliver on validation goals. Skills and experience required: 5 to 15 years of proven hands-on experience in SoC/subsystem validation. Emulation-based verification experience is a big plus. Prior knowledge of at least one of the blocks like CPU, PCIe, DDR, Ethernet, DDR, USB, etc. Experience working on industry-standard emulators, and validation using transactors or virtual devices will be a plus C/C++ skills with strong understanding of how software interacts with the SoC, firmware, and hardware components is a requirement. Understanding of OS/Linux, drivers and kernel modules is desired. Expertise on hardware behavioral language (Verilog, SystemVerilog) Knowledge of scripting (e.g. Tcl, Perl, Python etc.) In return: Our offices are amazing places to collaborate. If you are interested, but unsure whether you tick all the boxes, we still would love you to reach out! We are keen to welcome people with versatile skills and experience into Arm! Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

ERP Engineer Location: Bengaluru Department: Hardware Employment Type: Full-Time About Dozee Dozee Health AI is a pioneer in AI-powered, contactless Remote Patient Monitoring (RPM) and Early Warning Systems (EWS), driving transformation in healthcare at scale. Headquartered in Bengaluru, Dozee has quickly emerged as India s #1 RPM company. Trusted by leading healthcare providers across India, the USA, and Africa, Dozee s innovative solutions enhance patient safety, improve outcomes, and reduce costs. We aim to Save a Million Lives with Health AI. Role Overview We are looking for an ERP Engineer to manage and optimize Microsoft Dynamics ERP modules, ensuring seamless performance and data integrity across our systems. You will work alongside technical and business teams to implement customizations and integrations that enhance our operational efficiency and scalability. Key Responsibilities ERP Management & Customization Manage and maintain Microsoft Dynamics ERP modules to ensure system stability and optimal performance. Develop and deploy customizations, workflows, and process automations that align with business needs. Integrate ERP with internal systems (CRM, HRMS, Finance) and third-party applications using APIs and data connectors. Collaboration & Implementation Collaborate with cross-functional teams to analyze business requirements and design ERP solutions. Conduct testing, document new features, and support system enhancements. Provide troubleshooting and technical support to ensure minimal system downtime. Training & Optimization Lead end-user training and create user manuals for smooth ERP adoption. Monitor system performance, suggest improvements, and optimize ERP configurations. Work with stakeholders to enhance ERP processes in finance, procurement, inventory, and production. Requirements Experience & Qualifications 3 5 years of hands-on experience with ERP management, customization, and integration. Specific experience with Microsoft Dynamics 365 Business Central / Dynamics NAV is preferred. Bachelor s or Master s degree in a relevant field. Skills Strong understanding of ERP architecture, data structures, and business workflows. Experience with integration tools and middleware such as Azure Integration Services or Power Automate. Familiarity with project management tools like JIRA, Confluence, or Asana. Personal Attributes Strong analytical and problem-solving abilities with high attention to detail. Excellent communication skills and the ability to collaborate with multiple stakeholders. Why Join Dozee Be part of a mission-driven company transforming healthcare with AI. Work with top healthcare providers and cutting-edge technology. Opportunity to drive impactful change in a high-growth, fast-paced environment. Qualification : Bachelors or Masters degree in a relevant field