Asic Engineer Jobs in Bengaluru

Position: Social Media Executive (Graphics & Video Specialist) Location: Bengaluru Employment Type: Full-Time Job Overview We are seeking a highly creative and results-driven Social Media Executive to serve as the voice and visual face of Fracktal across all digital channels. This role combines strategic social media management with hands-on content creation, with a strong focus on producing compelling **graphics and high-quality video content** for a technical and industrial audience. Key Responsibilities Content Creation & Production (Primary Focus on Graphics & Video) Plan, script, shoot, and edit **original video content** for platforms like YouTube, Instagram Reels, and LinkedIn (including product demos, testimonials, and explainer videos). Design professional, on-brand **visual assets** such as infographics, social media posts, stories, and ads using tools like **Adobe Creative Suite or Canva**. Ensure consistent visual identity and brand voice aligned with the additive manufacturing industry. Social Media Strategy & Management Develop and implement a comprehensive social media strategy across **LinkedIn, Instagram, YouTube, and Facebook**. Maintain a dynamic **content calendar** balancing promotional, educational, and engagement-focused posts. Monitor, listen, and respond to user interactions, ensuring professional and timely **community management**. Analytics & Reporting Track, analyze, and report on **key social media metrics** (reach, engagement, traffic, conversions). Use **data-driven insights** to optimize content strategy and enhance future campaign performance. Industry Engagement Stay updated on the latest social media trends, platform updates, and advancements in **3D printing and additive manufacturing** to create relevant and engaging content. Key Skills & Requirements Experience: 1 3 years in social media management, digital marketing, or related roles. Creative Skills: Strong proficiency in **graphic design (Photoshop, Illustrator, or equivalent)** and **video editing (Premiere Pro, Final Cut Pro, or equivalent)**. Portfolio: Must provide a **portfolio** demonstrating experience in creating engaging social media graphics and video content. Technical Aptitude (Optional but Advantageous): Basic understanding of or strong interest in engineering, **3D printing**, or manufacturing technologies. Soft Skills: Excellent written and verbal communication, attention to detail, and ability to work independently in a fast-paced environment. Compliance & Safety Ensure adherence to industry regulations, company policies, and safety protocols. Maintain a clean, organized, and hazard-free work environment.

Data Engineer Location: Bangalore Company: Capital One India About Capital One At Capital One, we're redefining how technology solves real-world financial challenges. As a technology-driven company, we bring together talented engineers, data scientists, and designers to innovate at scale and deliver meaningful impact to millions of customers. If you're passionate about building powerful data solutions, exploring cutting-edge technologies, and working in a collaborative, fast-paced environment this is the place for you. About the Role As a Data Engineer at Capital One, you ll join a team of innovators who design and build next-generation data platforms and pipelines that power real-time decision-making. You ll collaborate across disciplines engineering, product, machine learning, and cloud infrastructure to transform how we leverage data at scale. What You ll Do Collaborate across Agile teams to design, develop, test, and deploy data-driven solutions. Build and support scalable data pipelines using modern data engineering tools and cloud services. Work on real-time and batch data processing systems that integrate with distributed microservices and ML platforms. Use programming languages such as Python, Java, or Scala with SQL, NoSQL, and cloud data warehouses like Redshift or Snowflake. Contribute to code reviews, unit testing, and performance optimization to ensure high-quality data systems. Partner with product managers and platform teams to deliver robust, cloud-native data solutions that power business decisions. Stay ahead of tech trends, share knowledge, and mentor junior engineers. Basic Qualifications Bachelor s degree in Computer Science, Engineering, or a related field. 1.5+ years of hands-on experience in application or data engineering (excluding internships). At least 1 year of experience working with big data technologies. Preferred Qualifications 3+ years of application/data engineering experience using Python, Scala, Java, or SQL. 1+ year of experience with cloud platforms (AWS, Azure, or GCP). 2+ years of experience with distributed computing tools (Spark, Hadoop, Hive, EMR, Kafka, etc.). 1+ year working on real-time streaming applications. 1+ year of experience with NoSQL databases (MongoDB, Cassandra). 1+ year of experience with data warehousing (Redshift, Snowflake). 2+ years working with Linux/Unix systems and shell scripting. Familiarity with Agile methodologies and modern DevOps practices. Why Join Capital One Work on high-impact data solutions at one of the world s most innovative financial institutions. Be part of a collaborative tech culture that values experimentation and learning. Access to top-tier tools, mentorship, and career development opportunities. Competitive compensation and benefits in a mission-driven environment. Qualification : Bachelors degree in Computer Science, Engineering, or a related field

Senior Manager Full Stack Engineering Location: Bangalore Company: Capital One India About Capital One India At Capital One India, we blend the agility of a startup with the scale of a Fortune 100 company. Our technology teams drive transformation across banking by building next-generation financial products that are secure, user-centric, and powered by cutting-edge engineering practices. We are makers, breakers, doers, and thinkers working together to reinvent consumer finance through technology, modern design, and data science. As a company that builds its own software and platforms, we re constantly innovating to help over 65 million customers bank better. About the Role As a Senior Manager Full Stack Engineering, you ll lead multiple teams building highly available, scalable, and secure platforms and applications. You ll be at the forefront of technical design, architecture, and implementation, helping your teams deliver impactful solutions across web, mobile, backend services, and cloud infrastructure. This is a hands-on leadership role ideal for an experienced engineering leader who still loves to write code, mentor engineers, and contribute directly to architecture and product evolution. What You ll Do Lead full-stack engineering teams delivering cross-functional, multi-platform applications using modern cloud and open-source technologies. Own end-to-end technical design, architecture decisions, and delivery strategy for critical systems. Partner with architects, product managers, and cross-functional leaders to understand requirements, prioritize needs, and develop scalable solutions. Guide and mentor engineers, driving technical excellence, performance, and career growth across teams. Drive Agile delivery, ensuring projects meet timelines and quality standards while promoting DevOps best practices. Champion and enforce best practices in secure coding, architecture, compliance, and accessibility. Collaborate with internal and external stakeholders to align technology vision with business goals. Manage full software development lifecycle: planning, estimation, implementation, deployment, and support. Foster a culture of engineering excellence, continuous learning, and experimentation. Basic Qualifications Bachelor s Degree in Computer Science, Engineering, or a related field 8+ years of experience in software development, with a focus on full-stack systems 5+ years of experience managing software development teams through full release cycles Proven track record of leading Agile teams and delivering high-impact technology projects 5+ years of people management experience, including mentoring and team scaling Preferred Qualifications Master s Degree in Computer Science, Engineering, or Business 10+ years of software engineering experience in large-scale, distributed systems 6+ years of experience applying Agile methodologies (Scrum, Kanban, SAFe) Hands-on experience with some or all of the following: Languages: Java, Python, Go, JavaScript, Node.js Frontend: React, AngularJS, HTML5, CSS Cloud: AWS, Azure, GCP (AWS preferred) DevOps: CI/CD, Docker, Kubernetes, Terraform Databases: NoSQL (MongoDB, Cassandra), SQL, Redshift, Snowflake Strong understanding of accessibility standards and building inclusive digital products Experience with Big Data, event-driven architectures, and RESTful APIs Passion for mentoring, technical excellence, and building diverse, high-performing teams Join a team that's redefining how software powers banking Build next-gen cloud-native applications from scratch Work on meaningful problems with direct customer impact Thrive in a collaborative, transparent, and inclusive culture Access top-tier learning opportunities, technical conferences, and internal mentorship Qualification : Masters Degree in Computer Science, Engineering, or Business

Tool Design Engineer Location: Bangalore Department: Tool Design Designation: Engineer Tool Design About the Role Sansera Engineering is looking for a motivated and skilled Tool Design Engineer to join our dynamic team. The ideal candidate will be responsible for designing, developing, and testing tooling solutions that support efficient and high-quality manufacturing processes. This role requires close collaboration with production, quality assurance, and supply chain teams to ensure successful project execution and continuous improvement. Key Responsibilities Design and develop cutting tools and fixtures using AutoCAD and 3D modeling software. Select appropriate cutting tools based on process requirements and application. Create detailed engineering drawings including isometric views, GD&T, and basic fixtures. Conduct feasibility studies, perform engineering calculations, and analyze tooling costs (process cost, cycle time, tool cost per component). Troubleshoot issues related to cutting tools and machining processes to improve efficiency. Drive continuous improvements in machining and tooling processes. Prepare technical documentation, reports, and project specifications. Assist in project planning, scheduling, and meeting deadlines within budget constraints. Analyze performance data to optimize tool designs and manufacturing processes. Stay updated on the latest industry trends, technologies, and best practices. Ensure compliance with quality assurance standards and safety protocols. Skills and Qualifications Diploma or Bachelor s degree in Mechanical Engineering. 3 to 6 years of experience in tool design, preferably within a manufacturing or machining environment. Proficiency in AutoCAD and 3D CAD tools for tool design. Strong knowledge of cutting tool selection and machining processes. Familiarity with GD&T (Geometric Dimensioning and Tolerancing). Good understanding of manufacturing processes, materials, and cost optimization. Excellent analytical, problem-solving, and communication skills. Ability to collaborate effectively within cross-functional teams. Awareness of quality standards such as ISO and experience with quality assurance processes. Strong project management skills with the ability to handle multiple tasks concurrently. Opportunity to work with a leading engineering company specializing in high-precision automotive and aerospace components. Dynamic and supportive work environment that encourages innovation and professional growth. Involvement in cutting-edge tooling projects that impact global manufacturing operations. Qualification : Diploma or Bachelors degree in Mechanical Engineering

Job Title: Junior Engineer Mechanical Design (Industrial Automation Projects) Reports To: Senior Engineer Mechanical Design Job Purpose To assist in the design and drafting of Special Purpose Machines (SPMs) and industrial automation systems by supporting the mechanical design team in converting concept designs into detailed manufacturing drawings. Key Responsibilities Support the mechanical design team in developing detailed mechanical designs from initial concepts. Prepare accurate manufacturing and assembly drawings for industrial automation systems and SPMs. Collaborate with cross-functional teams to ensure design intent and manufacturability. Revise and update designs based on feedback and design improvements. Qualifications & Skills Education: B.E. in Mechanical Engineering OR Diploma in Tool & Die Making (NTTF) OR Diploma in Mechanical Engineering with relevant experience Technical Knowledge: Basic understanding of mechanical and manufacturing engineering principles Familiarity with machining processes Fundamental knowledge of pneumatic and hydraulic systems Software Skills: Basic proficiency in 3D CAD tools such as SolidWorks, Solid Edge, or similar Working knowledge of Microsoft Office tools (Word, Excel, PowerPoint) Communication: Strong communication skills in English Experience: 0 1 year of experience in the machining or manufacturing industry A strong desire and aptitude to grow into a mechanical design role

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Senior Lead Engineer Structural Analysis (Hybrid) Location: Bangalore, Karnataka, India Job Type: Full-time Company: Collins Aerospace (Raytheon Technologies) Experience: 5 8 years Job Overview We re looking for a Senior Lead Engineer (Stress) to join our Advanced Structures business unit. This role leads structural analysis for New Product Introduction, redesign, and technology programs. Support includes a wide range of aerospace components including ETRAS systems. Responsibilities Lead stress analysis using FEA tools (Ansys) and classical hand calculations. Prepare structural analysis documentation, stress reports, and certification data. Collaborate with design, manufacturing, and quality teams. Investigate failures and provide technical resolutions. Contribute to process improvements, automation, and tool development. Ensure on-time and quality delivery of engineering work products. Basic Qualifications Bachelor s/Master s in Mechanical or Aerospace Engineering. 5 8 years of structural analysis experience using Ansys Workbench. Strong background in fatigue, stress, and vibration analysis. Skilled in classical calculations and report writing. Preferred Qualifications Experience in hydraulic/electro-mechanical component analysis. Proficiency with Mathcad, Python, or Excel VBA. Familiarity with aerospace material properties and treatment processes. Benefits Transportation & meal vouchers Group life, health, and personal accident insurance 18 days vacation + 12 days contingency leave National Pension Scheme and car lease options Employee scholar program Equal Opportunity Collins Aerospace is an equal opportunity employer and values diversity. All qualified applicants will receive consideration without regard to race, gender, disability, or veteran status. Apply Now Be part of our aerospace revolution. Apply today and help us redefine flight for the future.

Power the Future with Us! SolarEdge (NASDAQ: SEDG) is a global leader in high-performance smart energy technology, with over 5,000 employees, offices in 34 countries, and millions of products installed in 133+ countries. Our diverse product offering includes intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and maintaining a relentless focus on innovation, we aim to create a world where clean, green energy from the sun powers homes, businesses, and communities everywhere. Join Us as a Japanese-Speaking Customer Service Specialist! We are expanding our Global Technical Center and looking for a talented individual to provide innovative solutions for the Japanese international market. This is your chance to become an expert in SolarEdge products and the solar energy industry. Location: Brand-new offices with a collaborative environment, transportation, meals, and a competitive compensation package. Work Hours: Japan Standard Time Language Requirement: Japanese Proficiency (JLPT N2/N3) Customer Support: Answer inbound chats, emails, and cases from customers and contractors promptly and professionally. Troubleshooting: Assist with diagnosing and resolving grid-tie solar inverter issues using product schematics, knowledge bases, and technical documentation. Operations Coordination: Validate authorization to release replacement parts as needed. Knowledge Management: Update the internal knowledge database with new troubleshooting solutions. Database Management: Maintain customer monitoring databases and create system layouts upon request. Documentation: Record all interactions and activities in the ticketing system and software platforms. Collaboration: Work closely with peers, managers, and operations teams to enhance service quality. Job Requirements 1-3 years of experience in customer service, technical helpline, or remote support. Technical or engineering qualification (preferred in Electrical/Electronics). Basic understanding of IP network technology. Experience with solar electric products is a plus. Exceptional listening and questioning skills. Strong written and spoken English communication skills. Ability to multitask in a fast-paced environment. Prior experience working in an international organization (preferred). Ability to work in a continuous shift model. Excellent interpersonal and problem-solving skills. Japanese language proficiency (JLPT N2/N3) Read, Write, and Speak. Exciting career growth in the renewable energy sector. Competitive salary and benefits package. Diverse and inclusive workplace. Regular training and upskilling programs. Meal and transportation allowances. At SolarEdge, we recognize that our success comes from the talented and diverse workforce that drives innovation. We are committed to hiring and retaining top talent to ensure continuous business growth and performance. Join us and be part of the clean energy revolution!

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)

Job Description: We are seeking a highly skilled and experienced CPU Verification Engineer with a focus on ARM and NCC-based ARM architecture. This role requires a deep understanding of CPU microarchitecture, SOC integration, and verification methodologies. The ideal candidate will lead verification efforts, collaborate with cross-functional teams, and mentor junior engineers to ensure high-quality CPU design verification. Key Responsibilities: Lead and execute verification plans for CPU designs based on ARM and NCC-based ARM architecture. Develop and enhance testbenches and verification environments using advanced automation techniques. Collaborate with design and architecture teams to identify and resolve specification gaps, ensuring comprehensive verification coverage. Perform SOC-level verification, including integration and validation of CPU subsystems. Utilize industry-standard verification tools and methodologies such as UVM, SystemVerilog, and simulation/emulation platforms. Mentor and guide junior verification engineers, providing technical leadership and support. Continuously improve verification processes and methodologies to enhance efficiency and effectiveness. Qualifications: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. 8 14 years of experience in CPU verification, with a focus on ARM and NCC-based ARM architecture. Proficiency in verification languages and methodologies, including SystemVerilog, UVM, and scripting languages (Python, Perl, etc.). Strong understanding of CPU microarchitecture, memory hierarchy, and SOC integration. Experience with simulation, emulation, and formal verification tools. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills, with the ability to work in a collaborative environment. Preferred Qualifications: Experience with low-power design verification and performance verification. Knowledge of hardware security verification techniques. Familiarity with machine learning and AI-based verification approaches. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of hardware engineering or related work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or related field and 1+ year of hardware engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

Job Description: Arm has excellent opportunities in the Solution Engineering group - which has a charter to develop best-in-class SoCs and compute subsystems using industry-leading Arm IP products. These solutions target different market segments like premium mobile, servers, automotive, and IoT. The pre-silicon verification team in Bangalore is looking for highly-skilled engineers with experience in system validation of SoCs on Emulation platform. Responsibilities: Be part of the verification team, and define the emulation-based stress validation methodology & build verification plans. This will involve closely interacting with multiple cross-site & co-located collaborators like the SoC architects, designers, & DV engineers to come up with the extended stress validation plans for the product. Work on multiple industry-standard emulation platforms from EDA vendors, and closely collaborate with technology teams to resolve issues with porting the design on these platforms, and to improve Arm's validation methodology on emulation Take up the responsibility to identify & enable transactors, traffic exercisers, virtual host devices, and monitors on the emulation platform - which will help effective validation of the SoC design. You will be accountable for planning and developing bare-metal and OS-based test content for system stress and use-case validation targeting multiple product use-cases. The team is responsible to find bugs by enabling validation content on high-speed subsystems like PCIe, Ethernet, USB, etc. and other subsystems like DDR, HBM, UFS, HDMI, MIPI devices, LSIO, etc. on emulation Mentor junior engineers and work as a team to deliver on validation goals. Skills and experience required: 5 to 15 years of proven hands-on experience in SoC/subsystem validation. Emulation-based verification experience is a big plus. Prior knowledge of at least one of the blocks like CPU, PCIe, DDR, Ethernet, DDR, USB, etc. Experience working on industry-standard emulators, and validation using transactors or virtual devices will be a plus C/C++ skills with strong understanding of how software interacts with the SoC, firmware, and hardware components is a requirement. Understanding of OS/Linux, drivers and kernel modules is desired. Expertise on hardware behavioral language (Verilog, SystemVerilog) Knowledge of scripting (e.g. Tcl, Perl, Python etc.) In return: Our offices are amazing places to collaborate. If you are interested, but unsure whether you tick all the boxes, we still would love you to reach out! We are keen to welcome people with versatile skills and experience into Arm! Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Job Description and Requirements Synopsys is seeking a creative and talented engineer to fill a FPGA Design & Verification role in Bengaluru, India. The environment presents stimulating, challenging, and rewarding work within an excellent work environment with positive career development opportunities. About the Role The FPGA Design and Verification IP Prototyping team is responsible for building FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs and testing them to verify compliance with leading-edge industry standards. We play a vital role in supporting Synopsys IP business by validating key features and mitigating potential ASIC faults early in the prototyping phase. Responsibilities Design, implement, and verify FPGA-based systems for a variety of applications Validate FPGA-based IP prototypes against real-world devices, test equipment, and other hardware systems Create and maintain comprehensive technical documentation Develop and execute test plans and routines Detect, troubleshoot, debug, and investigate potential ASIC issues early on Collaborate with cross-functional teams, internal and external customers Key Qualifications Bachelor's or Master's degree in Electrical Engineering 1+ years of experience in FPGA design and development Design and simulate integrated circuitry using Verilog, SystemVerilog, and VHDL Familiarity with industry-standard interfaces and protocols such as AMBA AXI, APB, I2C, and SPI Expertise with scripting languages such as Tcl, Python, Perl, and Bash Proven problem-solving skills and ability to work in a collaborative team environment Excellent verbal and written communication skills in English Preferred Experience Familiarity with SCM tools like Git Experience with FPGA development tools such as Vivado or Altera Quartus Familiarity with laboratory equipment such as oscilloscopes and data analyzers Knowledge of the MIPI-I3C protocol Understanding of computer architecture and operating systems Qualification : Bachelor's or Master's degree in Electrical Engineering

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Role & Responsibilities: As an SAP Ariba Functional Consultant / Business & Integration Architect Specialist, you will be responsible for analyzing complex issues related to the Source-to-Settle process and providing expert troubleshooting support for Ariba/SAP systems. Your responsibilities include: Researching and analyzing complex issues involving the Source-to-Settle process and related systems, with expert troubleshooting of Ariba/SAP issues. Collaborating with key stakeholders to understand business processes and requirements, enabling effective Ariba/SAP solutions. Creating process flows and documentation for use at various levels within the company. Designing, developing, and optimizing end-to-end Ariba/SAP solutions, with a focus on process design and system improvement. Implementing process improvements and automation to enhance efficiency and reduce manual interventions. Advising on the correct execution of purchasing processes to align with internal policies, processes, and procedures. Basic Qualifications: Bachelor s degree in Information Technology, Engineering, or related field preferred. 5+ years of experience supporting SAP and Ariba OnDemand solutions. Deep functional and technical knowledge of the core Ariba modules: Buying and Invoicing, Sourcing, Contracts, and SAP MM. Strong expertise in SAP Ariba P2P standard processes and configurations, including a good understanding of integration with SAP ERPs. Excellent communication and collaboration skills. Why Join Us? This is an exciting opportunity for an experienced SAP Ariba Functional Consultant to join a team focused on optimizing and improving business processes. You will have the chance to work on end-to-end Ariba/SAP solutions, collaborating with business stakeholders, and implementing innovative solutions to streamline purchasing processes across the company. Qualification : Bachelor's degree in Information Technology, Engineering or related field preferred

Overview: Collins Aerospace is looking for a talented Software Verification Lead Engineer to join the Navigation and Advanced Technology team. In this role, you will be responsible for performing validation and verification for critical avionics systems, focusing on protocols and applications like Maintenance, OMS, and Dataload. You will collaborate with senior developers and architects to design scalable, extensible, and sustainable solutions, while ensuring the highest standards of quality and performance. Primary Responsibilities: Avionics DAL A Product Verification: Verify avionics products in the CNS (Communication, Navigation, and Surveillance) domain, ensuring compliance with industry standards and customer requirements. Tool Development & Test Design: Develop common supporting tools necessary for development and verification activities, as well as create validation tests for avionics systems. Collaboration with Cross-functional Teams: Work closely with architects and senior developers to create scalable solutions, ensuring that new technologies are effectively integrated into the system architecture. CI/CD Pipeline Management: Build CI/CD pipelines and collaborate with the DevOps team to ensure streamlined deployments. Troubleshoot and resolve build issues while supporting deployment processes. Basic Qualifications: Education: BE/B.Tech/ME/M.Tech in Engineering. Experience: 6-8 years of experience in avionics systems and software development. Technical Skills: Proficiency in Python, C/C++, and Matlab/Simulink. Strong understanding of Avionics Systems/Software Architecture, including CNS, FMS, FCS, or Displays. Familiarity with DO-178B/C software standards. Avionics Domain Knowledge: Experience in Communication, Navigation, and Surveillance systems, including protocols for voice and data communications, satellite-based navigation, weather detection, traffic awareness, and collision avoidance. About Collins Aerospace: Collins Aerospace, a Raytheon Technologies company, is a global leader in aerospace and defense solutions. We offer advanced technology and services across a wide array of civil, military, and government missions. Our products are integral to the safety and efficiency of modern aviation, from emergency power systems to reliable cabin controls and quieter engines. Joining our team means being part of a mission-driven company that innovates every day to deliver safer, smarter, and more efficient aerospace systems. Collins Aerospace Diversity & Inclusion Statement: Diversity drives innovation, and inclusion drives success. At Collins Aerospace, we foster a culture that values diversity of thought and experience, which enables us to tackle the toughest challenges in our industry. We are committed to ensuring all employees have the opportunity to share their ideas and passions, paving the way for limitless possibilities. Benefits Package: Insurance: Group Term Life Insurance, Group Health Insurance, Group Personal Accident Insurance. Leave Entitlements: 18 days of vacation and 12 days of contingency leave annually. Employee Programs & Work-life Balance: Employee Scholar Program, work-life balance initiatives, car lease program, National Pension Scheme, Leave Travel Allowance (LTA), and meal vouchers. Additional Benefits: Fuel and maintenance/driver wages, and more! Ethical & Safety Commitment: Collins Aerospace prioritizes strong ethical practices and safety. All positions in India require a background check, which may include a drug screen (for operations positions). Why Collins Aerospace? At Collins Aerospace, we are redefining aerospace. Join our team and be part of a company that plays a critical role in modern flight, providing innovative solutions that enhance safety, efficiency, and the travel experience for millions of passengers worldwide. Qualification : BE/B.Tech/ME/M.Tech with Understanding of Avionics Systems/Software Architecture CNS, FMS, FCS or Displays.