Asic Flow Jobs in Bengaluru

Job Title: Business Analyst Granite Location: Bengaluru Company: Altisource About Altisource At Altisource, we thrive in a fast-paced, collaborative environment where innovation meets impact. If you're a self-motivated, quick learner who enjoys working both independently and in teams and you're passionate about data, automation, and creating business value we d love to meet you! We re currently seeking a Business Analyst to join our Granite team, focusing on data analysis, configuration, and financial operations. This is an exciting opportunity to contribute to a growing, stable organization and build a meaningful career. Key Responsibilities Data Analysis & Reporting Execute complex data queries and generate reports using SQL. Analyze operational and financial data to support business strategy. Create insights using Excel, Power Query, and other reporting tools. Billing & Financial Operations Manage invoicing, billing, and reconciliation in coordination with the Accounting team. Maintain accurate financial records and ensure compliance with internal processes. Apply basic accounting principles in financial workflows. Documentation & Process Management Create and maintain business documentation, process manuals, and reports. Edit and format PDFs to align with company standards. Organize operational data and financial records for easy access. Client Engagement & Onboarding Work directly with clients to gather business requirements. Support onboarding and ensure a smooth integration process. Translate client needs into functional product workflows and features. Automation & Efficiency Develop automation tools using VBA, Power Query, and other platforms. Continuously seek ways to streamline processes and improve productivity. Cross-Functional Collaboration Partner with technology and business teams to deliver solutions. Communicate effectively with stakeholders, including senior leadership. Design process flows (Visio) and prepare executive presentations (PowerPoint). Qualifications Bachelor s degree in Business Administration, Engineering, Computer Science, Finance, Accounting, or a related field. 3+ years of experience in business analysis, product management, or operations. Hands-on experience managing IT projects and system integrations. Proficient in SQL, Excel, Word, Visio, and PowerPoint. Knowledge of financial systems, databases, and BI tools. Preferred Skills Strategic thinker with strong problem-solving skills. Excellent communication and stakeholder management abilities. Strong documentation and organizational skills. Experience with SaaS platforms and financial data handling is a plus. Join us and be part of a team that values innovation, integrity, and impact. Qualification : Bachelors degree in Business Administration, Engineering, Computer Science, Finance, Accounting, or a related field

Position: Product Designer - 2 Location: Bangalore Department: Zetwerk Corporate About Zetwerk Zetwerk is a global manufacturing leader delivering high-quality industrial and consumer products worldwide. With over 10 state-of-the-art facilities across India, the US, Mexico, and Europe, and a supplier network spanning Southeast Asia and Latin America, we offer end-to-end manufacturing solutions combining global standards with local expertise. Our tech-enabled, flexible supply chain enables customized manufacturing strategies such as reshoring, nearshoring, and friendshoring tailored to product, market, and customer needs. Our proprietary Manufacturing Operating System (ZISO) powers real-time supply chain visibility, quality control, efficient logistics, and project management. Backed by prominent investors including Khosla Ventures, Accel, and Sequoia, we recorded an annual turnover exceeding 15,000 crore in FY 2024. Key Responsibilities Own design projects from concept through execution, managing scope and deadlines independently. Collaborate closely with product managers and engineers to identify user problems and develop effective design solutions. Create user flows, wireframes, interactive prototypes, and high-fidelity designs that translate ideas into seamless user experiences. Conduct user research and analytics deep dives; leverage findings to refine designs and improve usability. Partner with developers to ensure accurate and functional design implementation, negotiating trade-offs when faced with technical constraints. Contribute to and maintain the company design system, co-building reusable components with engineering teams. Actively participate in design critiques, reviews, stand-ups, and cross-functional team sessions. Mentor junior designers, fostering a culture of craftsmanship, constructive feedback, and design excellence. Job Requirements Bachelor s or Master s degree in Design or related field. 4 6 years of professional product design experience, preferably in SaaS, B2B, or enterprise software environments. Expert proficiency in Figma, including components, auto-layout, variants, and prototyping; experience with Figma Make AI is a plus. Strong user research skills, including planning, conducting, and synthesizing insights from qualitative and quantitative studies. Experience with user analytics tools like PostHog, Mixpanel, or similar platforms. Prior exposure to designing products for manufacturing, supply chain, or industrial systems is highly desirable. Qualification : Bachelors or Masters degree in Design or related field

Job Title: UX Designer Location: Bangalore North, Karnataka, India Industry: Entertainment / Mobile Gaming Job Type: Full-Time Experience: 3 5 Years About the Company: We are one of India s fastest-growing mobile gaming companies, creating globally engaging casual games since 2014. In partnership with Modern Times Group (MTG), we ve scaled a portfolio of chart-topping titles including Daily Themed Crossword, WordTrip, WordJam, WordWars, WordTrek, TileMatch, and Jigsaw. Our goal is to craft simple yet impactful gaming experiences for millions of players around the world, powered by a cutting-edge tech and analytics infrastructure. Position Summary: As a UX Designer, you will serve as the player s advocate, shaping intuitive and engaging user experiences that impact a global audience. You ll work closely with game designers, product managers, and artists to conceptualize, wireframe, and prototype user flows that elevate the gameplay experience across our portfolio of mobile games. Key Responsibilities: Create wireframes, mockups, and interactive prototypes that improve usability and engagement. Collaborate with cross-functional teams (game design, product, art) to shape user-centered designs. Conduct user research, observations, and gameplay deconstructions to inform UX decisions. Translate abstract gameplay concepts into intuitive player interactions and screen flows. Advocate for accessibility and inclusive design for diverse player demographics. Required Skills & Qualifications: 2+ years of experience in UX Design or related roles. Strong portfolio showcasing design thinking, user-centric design, and wireframes/prototypes. Solid grasp of design fundamentals, usability principles, and interaction design. Basic understanding and enthusiasm for games (mobile, PC, console, or board). Proficient in Figma or equivalent design/prototyping tools. Excellent communication and collaboration skills. Ability to present and justify UX decisions based on player needs and design principles. Nice-to-Have (Bonus) Skills: Passion for gaming and deep empathy for player behavior and psychology. Experience or awareness of accessible design principles and tools. Visual/UI design capabilities to better collaborate with artists. Data literacy ability to interpret usage metrics to refine UX decisions. Basic understanding of math/statistics for analyzing and interpreting player data. Opportunity to influence games played by millions globally. Work in a creative, collaborative, and fast-paced gaming environment. Be part of a passionate team committed to fun, innovation, and player satisfaction. Competitive compensation and growth opportunities in a thriving industry.

Data Privacy Compliance Specialist Location: Bangalore, India Office About the Team Rubrik s Legal Team is at the heart of our mission to secure the world s data. We provide essential guidance across contract management, intellectual property, employment law, privacy, trade compliance, and litigation. Our team thrives on open debate, innovation, and ownership, contributing to building an iconic company. Rubrik is growing rapidly and evolving join us to be unstoppable, together. About the Role Rubrik is looking for a Data Privacy Compliance Specialist to strengthen and manage our global privacy program. The ideal candidate will have hands-on experience with privacy management accountability frameworks (PMAF), compliance auditing, and implementing data protection practices aligned with evolving global regulations. This role requires working collaboratively across procurement, engineering, product management, legal, and information security teams worldwide to maintain compliance and mitigate privacy risks. What You ll Do Conduct internal and coordinate external privacy audits as needed. Assess and monitor privacy compliance of third-party vendors and service providers. Continuously review data handling practices to ensure compliance with internal policies and global regulations. Develop, maintain, and enforce data privacy policies and procedures aligned with legal requirements and business objectives. Maintain detailed documentation to demonstrate compliance and accountability. Manage and update an inventory of personal data processing activities, including data flows and classifications. Oversee cross-border data transfer mechanisms ensuring adherence to applicable privacy laws. Lead internal privacy reviews, supporting engineering and data governance teams with data mapping, documentation, and privacy impact assessments. Collaborate with teams to implement privacy risk mitigation solutions while ensuring regulatory adherence. Develop and deliver privacy training to internal stakeholders to raise awareness and ensure compliance with privacy responsibilities. Experience You ll Need Minimum 3+ years of experience in data privacy compliance, preferably with exposure to Privacy Management Accountability Frameworks (PMAF). Strong knowledge of global data protection regulations such as GDPR, CCPA, CPRA, and relevant industry standards. Proven expertise in data mapping, risk assessments, and conducting privacy audits. Excellent communication and stakeholder engagement skills across diverse teams. Certifications such as CIPP-E, CIPM, CIPT, CISSP preferred; Juris Doctor (JD) is a plus. Skills Required Deep understanding of IT, SaaS, and cloud provider compliance challenges. Solid knowledge of information security principles and best practices. Proficiency with privacy management tools like OneTrust for data mapping and assessment automation. Basic understanding of cookies and marketing technology systems. Ability to clearly articulate complex privacy and security concepts to both technical and non-technical audiences. Join Us in Securing the World's Data Rubrik (NYSE: RBRK) is on a mission to secure the world s data with Zero Trust Data Security . Our platform leverages machine learning to secure enterprise, cloud, and SaaS data, helping organizations ensure data integrity, availability, risk monitoring, and rapid recovery from cyberattacks and operational disruptions.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Senior SAP FICO Consultant Job Description Castaliaz is looking for an experienced Senior SAP FICO (Finance and Controlling) Consultant to join our dynamic team. In this role, you will be responsible for implementing, configuring, and maintaining the SAP Financials and Controlling (FICO) modules, ensuring that they align with our clients' business needs. You will collaborate closely with clients to understand their requirements, offer expert guidance on SAP FICO best practices, and deliver high-quality solutions to optimize financial processes. Role and Responsibilities: Functional Expertise: Understand the functional requirements of accounting processes including General Ledger (GL), Accounts Receivable (AR), Accounts Payable (AP), banks, and fixed assets. Costing and Reporting: Knowledge of Product Costing and CO-PA (Profitability Analysis). Understand the basic CO reporting framework, cost allocation, and settlement cycles. SAP Process Flows: Deep understanding of the SAP process flow for FI, including master data setup and configuration. Cross-Module Integration: Proficient in various master data elements and configurations for FI, as well as cross-module integration with MM (Materials Management) and SD (Sales and Distribution). User Support: Address end-user issues related to day-to-day operations and provide effective solutions to ensure smooth operations. Business Blueprinting: Independently develop Business Blueprints for SAP FICO projects and user requirements, and conceptualize optimal solutions. Testing: Conduct unit testing and facilitate end-user testing to ensure all system configurations work as intended. Taxation Knowledge: Familiarity with India's taxation systems, including Excise, Service Tax, and TDS (Tax Deducted at Source). Revenue Recognition: Experience in handling revenue recognition processes. Special Tasks: Manage special tasks related to SAP FI and CO functionalities. SAP TRM: Exposure to SAP Treasury and Risk Management (TRM) is preferred. Education and Qualifications: Bachelor's Degree in Commerce or a related field. Preferred: MBA in Finance. Work Experience: 3+ years of relevant experience in SAP FICO implementations and support. Location: Bangalore (onsite) About Castaliaz: Castaliaz has been at the forefront of implementing SAP applications across SMEs and large enterprises for over a decade. We are recognized as one of the Top 10 SAP implementation partners in India. With expertise in a variety of SAP solutions, including SAP Cloud, Rise with SAP, S/4HANA, Fiori, Ariba, and Digital Compliance (GST, E-Invoicing, E-way Bill), we help businesses navigate the full lifecycle of SAP implementations and management. Our proven implementation approach has earned the trust and loyalty of our clients across India. Qualification : Bachelor's Degree in Commerce or a related field. Preferred: MBA in Finance.

Senior Memory Design Engineer Company Arm Location Noida, India Job Description This opening is for a Senior Memory Design Engineer in our PHYSICAL IP MEMORY group in Noida. We work on innovative memory architectures in leading-edge technology nodes to enable the best Arm Systems across all markets. As a memory design professional, this position is a rare opportunity to work with our successful circuits, characterization, and layout team, and gain a deep understanding of memory usage in SoCs based on Arm cores. You will discover a wide variety of circuit innovations while working on different types of memories in cutting-edge process technologies. Responsibilities In this role, you will be working in the following areas: Work on memory architecture development in the latest technologies. Transistor-level full-custom design and collaboration with the physical design team for layout realization. Develop new design features and perform circuit/layout optimizations to meet Performance, Power, and Area targets. Lead memory design verification and characterization activities. Ensure high-performance memory designs with the lowest possible power, as needed for Arm CPUs, GPUs, and SOCs. Required Skills and Experience 5-8 years of proven experience in memory design. Strong interest and command of basic electronics (Diodes, RC Circuits, CMOS, etc.). Solid understanding of digital electronics fundamentals (Flip-Flops, Latches, Decoders, Multiplexers). Understanding of setup and hold time concepts. In-depth knowledge of memory fundamentals, especially single-port SRAM: Circuit design (Bitcell, WL decoder, Sense Amp, Self-time, Assist, Low power features, DFT features). Good understanding of technology trade-offs in deep sub-micron technologies. Self-motivated, hardworking, and positive outlook. Strong organizational skills with attention to detail. Nice-to-Have Skills and Experience Understanding of advanced process technology nodes and memory product layout implementation. Experience with shell scripting, machine learning (ML), and automation. Knowledge of statistical simulations (e.g., Monte Carlo). What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, and meritocratic workplace where everyone can grow and succeed, we encourage our people to make exceptional contributions to Arm's success in the global marketplace. Accommodations at Arm If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. By sending the requested information, you consent to its use by Arm to arrange appropriate accommodations. All accommodation requests will be treated with confidentiality, and information will only be disclosed as necessary to provide the accommodation. Examples of support include breaks between interviews, having documents read aloud, or office accessibility. Hybrid Working at Arm Arm s hybrid working approach is designed to create an environment that supports both high performance and personal wellbeing. We believe in bringing people together face-to-face to enable faster work while recognizing the value of flexibility. Hybrid working patterns depend on team and role requirements, which will be discussed upon application. Some flexibility might be limited by legal, regulatory, tax, or other considerations. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to fostering an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Job Description Power the Future with us! SolarEdge (NASDAQ: SEDG), is a global leader in high-performance smart energy technology, with over 5000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. Our R&D division is growing globally, and we are looking for an experienced Power Electronics Engineer to join our dynamic team at the new R&D site in Bangalore, India. As a Power Electronics Engineer at SolarEdge India R&D, you will play a pivotal role in the design, development, and optimization of power electronics and power electronics systems for our advanced solar energy products. You will be responsible for driving the innovation and technical excellence of our power solutions, contributing to the success of SolarEdge's mission to make solar energy more accessible and efficient. Responsibilities: Design, analysis, and development of advanced power electronics and power systems for SolarEdge's solar energy products, including inverters, power optimizers, and energy storage solutions. Collaborate with cross-functional teams, including electrical engineers, Mechanical Engineers/Designers, PCB Layout Engineers, and firmware developers, to ensure seamless development, integration, and optimization of power systems. Conduct power system studies, such as load flow analysis, transient stability, and harmonic analysis, to assess system performance and reliability. Perform detailed design and analysis of power electronic circuits, ensuring compliance with industry standards and safety regulations. Prepare detailed design documentation, Schematics, BoM, and test procedures. Lead the testing and verification of power electronics and power systems, both in the lab and field, to ensure they meet design specifications and quality standards. Participate in design reviews, providing technical expertise and guidance to the team to drive continuous improvement and innovation. Collaborate with suppliers and manufacturing teams to support the transition of designs from R&D to mass production, addressing any design-related issues during production. Mentor and guide junior engineers, fostering a collaborative and innovative work environment. Job Requirements Bachelor s (B.E/B.Tech) or master s (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems. 4+ years of hands-on experience in power electronics design and power system analysis, preferably in the solar energy or renewable energy industry. Strong understanding of power semiconductor devices (Including SiC and GaN), gate drive circuits, and magnetic components used in power converters. Experience with simulation tools (e.g., PSpice, LT SPICE, Simulink etc.) Knowledge of power converter topologies (e.g., DC/DC, DC/AC and AC/DC), including resonant and bi-directional converters and grid-tied inverters. Excellent knowledge of PCB layout rules, considering high-current traces, thermal management, creepage, clearance requirements for HV and LV traces. Ensure compliance with best practices for power distribution, component placement, and impedance control. Implement EMI/EMC best design practices to ensure compliance with regulatory standards. Familiarity with international safety and regulatory standards for power electronics and solar energy products. Excellent problem-solving skills and the ability to troubleshoot and resolve complex technical issues. Strong communication and interpersonal skills to work effectively in a cross-functional team environment. Proven track record of delivering high-quality power electronics designs from concept to production. Results-oriented mindset with a focus on achieving tangible and measurable results. Qualification : Bachelors (B.E/B.Tech) or masters (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems.

About the Role: As a Senior Power Electronics Engineer at SolarEdge India R&D, you will play a crucial role in designing, developing, and optimizing power electronics and power systems for our cutting-edge solar energy products. You will be a key driver of innovation and technical excellence, contributing directly to SolarEdge's vision of accessible and efficient solar power. Key Responsibilities: Lead the design, analysis, and development of advanced power electronics and power systems for SolarEdge's solar energy products, including inverters, power optimizers, and energy storage solutions. Collaborate effectively with cross-functional teams (electrical, mechanical, PCB layout, and firmware engineers) to ensure seamless development, integration, and optimization of power systems. Conduct comprehensive power system studies (load flow analysis, transient stability, harmonic analysis) to evaluate system performance and reliability. Perform detailed design and analysis of power electronic circuits, ensuring adherence to industry standards and safety regulations. Create and maintain detailed design documentation, including schematics, Bills of Materials (BOMs), and test procedures. Lead the testing and verification of power electronics and power systems in both laboratory and field settings, ensuring they meet design specifications and quality standards. Actively participate in design reviews, providing technical expertise and guidance to the team to foster continuous improvement and innovation. Collaborate with suppliers and manufacturing teams to support the transition of designs from R&D to mass production, addressing any design-related challenges. Mentor and guide junior engineers, cultivating a collaborative and innovative work environment. Job Requirements: Bachelor's (B.E/B.Tech) or Master's (M.E./M.Tech) degree in Electrical/Electronics Engineering specializing in Power Electronics or Power Systems. 10+ years of hands-on experience in power electronics design and power system analysis, preferably within the solar or renewable energy industry. Strong understanding of power semiconductor devices (including SiC and GaN), gate drive circuits, and magnetic components used in power converters. Proficiency with simulation tools (e.g., PSpice, LTSpice, Simulink). Knowledge of power converter topologies (DC/DC, DC/AC, and AC/DC), including resonant and bi-directional converters and grid-tied inverters. Excellent understanding of PCB layout rules, considering high-current traces, thermal management, creepage, clearance requirements for HV and LV traces. Expertise in best practices for power distribution, component placement, and impedance control. Implementation of EMI/EMC best design practices to ensure compliance with regulatory standards. Familiarity with international safety and regulatory standards for power electronics and solar energy products. Exceptional problem-solving skills and the ability to troubleshoot and resolve complex technical issues. Excellent communication and interpersonal skills to collaborate effectively in a cross-functional team. Proven track record of delivering high-quality power electronics designs from concept to production. Results-oriented mindset with a focus on achieving tangible and measurable outcomes. Qualification : Bachelors (B.E/B.Tech) or masters (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems.

Role & Responsibilities: As an SAP Ariba Functional Consultant / Business & Integration Architect Specialist, you will be responsible for analyzing complex issues related to the Source-to-Settle process and providing expert troubleshooting support for Ariba/SAP systems. Your responsibilities include: Researching and analyzing complex issues involving the Source-to-Settle process and related systems, with expert troubleshooting of Ariba/SAP issues. Collaborating with key stakeholders to understand business processes and requirements, enabling effective Ariba/SAP solutions. Creating process flows and documentation for use at various levels within the company. Designing, developing, and optimizing end-to-end Ariba/SAP solutions, with a focus on process design and system improvement. Implementing process improvements and automation to enhance efficiency and reduce manual interventions. Advising on the correct execution of purchasing processes to align with internal policies, processes, and procedures. Basic Qualifications: Bachelor s degree in Information Technology, Engineering, or related field preferred. 5+ years of experience supporting SAP and Ariba OnDemand solutions. Deep functional and technical knowledge of the core Ariba modules: Buying and Invoicing, Sourcing, Contracts, and SAP MM. Strong expertise in SAP Ariba P2P standard processes and configurations, including a good understanding of integration with SAP ERPs. Excellent communication and collaboration skills. Why Join Us? This is an exciting opportunity for an experienced SAP Ariba Functional Consultant to join a team focused on optimizing and improving business processes. You will have the chance to work on end-to-end Ariba/SAP solutions, collaborating with business stakeholders, and implementing innovative solutions to streamline purchasing processes across the company. Qualification : Bachelor's degree in Information Technology, Engineering or related field preferred

General Summary: Qualcomm CDMA Technologies (QCT) is the world s largest provider of wireless chipset technology, leading the way in 5G and Wi-Fi advancements. As an inventor-driven company, Qualcomm is committed to transforming industries and creating new possibilities through groundbreaking connectivity technologies. Qualcomm is currently seeking experienced WLAN Digital Designers for its Wireless R&D team in Bangalore. This role will involve designing next-generation WLAN chipsets and Wi-Fi subsystems, including Wi-Fi 6, 7, and 8 technologies. As part of the QCT Bangalore Wireless R&D HW team, you will be involved in sub-system architecture, RTL design, and its integration, contributing to industry-leading technologies in Wi-Fi connectivity for consumer devices such as hearables, wearables, and IoT applications. Key Responsibilities: Design and develop next-generation WLAN and micro-Wi-Fi subsystems for connectivity, hearables, wearables, and IoT chips. Work on ASIC designs using the latest technology nodes, understanding and executing all aspects of the VLSI development cycle, including architecture, micro-architecture, RTL design, and integration. Collaborate closely with Verification, SoC Design, Validation, Synthesis, and PD teams to achieve design convergence. Develop micro-architecture and implement designs in Verilog/SV. Integrate complex subsystems into SoCs. Perform various design checks and tool analyses using tools like Spyglass, RDC, CDC, PrimeTime, Synthesis, and more. Conduct post-silicon debug and work with cross-functional teams to resolve issues and optimize designs. Work independently on defined tasks, with minimal guidance, while maintaining a strong team-oriented approach. Required Skills and Experience: 8+ years of experience in digital front-end design for ASICs. Strong expertise in RTL coding using Verilog, VHDL, or SystemVerilog (SV) for complex designs, including those with multiple clock domains. Experience in low-power design methodology and clock domain crossing designs. Familiarity with various bus protocols like AHB and AXI. In-depth understanding of the RTL to GDS flow and experience interacting with DFT and PD teams. Experience in 802.11 (Wi-Fi) and wireless IP/subsystem design is a plus. Post-silicon debug experience is an added advantage. Strong documentation and communication skills to effectively interact with team members and management. Self-motivated with a teamwork-oriented attitude and the ability to work independently. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, Communications, or a related field, and 3+ years of Hardware Engineering or related work experience. Master s degree in the above fields and 2+ years of relevant experience, OR a PhD with 1+ year of related work experience.

Technical Requirements: 1. Digital Logic Design & RTL Coding: Strong experience in digital logic design and RTL (Register Transfer Level) coding. Proficiency in Verilog, VHDL, or System Verilog for implementing complex designs. Deep understanding of logic synthesis, timing constraints, and logic optimization. 2. Peripheral Design (High/Low-Speed): Experience in designing high-speed and low-speed peripherals, ensuring compatibility and optimal performance. Knowledge of integrating peripherals within larger system architectures, ensuring robust data flow. 3. Synthesis, Timing Constraints, and CDC: Familiarity with synthesis tools and ensuring the correctness of timing constraints. Experience with Clock Domain Crossing (CDC) and methods to avoid timing hazards in designs. Ability to optimize logic for timing closure and power efficiency during synthesis. 4. Unit Level Verification Setup & Assertions: Hands-on experience in setting up unit-level verification for RTL modules. Proficient in writing assertions to ensure the correctness of designs during simulation and functional verification. 5. Low Power Design Techniques: Exposure to low power design techniques, including managing multiple power/clock domains in complex SoC designs. Ability to design power-efficient modules for consumer electronics or embedded systems. 6. ARM SoC/AMBA IP-based Designs: Exposure to ARM SoC architectures and integration of AMBA (AXI, AHB, APB) protocols into designs. Experience with SoC-level integration, managing both hardware and software interactions in complex systems. 7. Protocol Knowledge (Additional Advantage): Working knowledge of industry-standard protocols, including PCIe, DDRx, Ethernet, USB, I2C, SPI. Ability to implement these protocols in hardware designs for various interfaces. Expectations from the Role: 1. Communication & Interpersonal Skills: Excellent communication skills for interacting with cross-functional teams, stakeholders, and clients. Ability to convey complex technical details clearly, both in writing and verbally. 2. Independent and Teamwork Capabilities: Strong ability to work both independently and as part of a team. Willingness to take initiative and demonstrate leadership in solving technical challenges. 3. Fast Learner & Adaptability: Ability to quickly absorb and apply new technologies, tools, and methodologies. Eagerness to stay updated with trends in digital design and SoC development. 4. Ownership & Accountability: Demonstrated ownership of tasks and the ability to meet deadlines. Ensure that all aspects of the design process are completed with attention to detail and high-quality standards. 5. Punctuality and Responsibility: Strong track record of punctuality, meeting project deadlines, and delivering quality work. Ability to manage multiple design tasks and optimize workflows to maintain timelines. Ideal Candidate Profile: The ideal candidate should have solid experience in digital logic design, particularly with Verilog, VHDL, or System Verilog. They should have a strong foundation in designing both high-speed and low-speed peripherals and optimizing designs for timing and power efficiency. The role also requires familiarity with ARM SoC architectures and integration of AMBA-based IPs. The candidate should be a strong communicator with the ability to work both independently and collaboratively in a fast-paced, distributed work environment. Leadership potential and a demonstrated ownership mindset are essential to the success in this role.

We are seeking an experienced and detail-oriented Senior Revenue Analyst to join our team. This role is critical in ensuring the accuracy of revenue recognition processes, analyzing key financial metrics, and providing insights to drive strategic business decisions. The ideal candidate will have a strong foundation in revenue accounting, excellent analytical skills, and the ability to collaborate across teams. You will have - BA/BS Degree in Accounting, Finance or relevant field 3+ years of relevant work experience Good for you to have Experience with a Big 4 accounting firm is preferred CA/CPA preferred Revenue and Saas Experience NetSuite ARM, Salesforce and Zuora experience You will definitely possess these technical skills Ability to understand, analyze and manipulate large datasets Ability to develop reports from various data warehouses (NetSuite, Salesforce, etc) Excel expertise is required Bird s eye view of your role The Senior Revenue Analyst will partner with Revenue Manager on ensuring Aryaka is in compliance with revenue recognition standards in accordance with GAAP. This includes contract review, assisting in contract drafting and providing timely and relevant analysis. The Senior Revenue Analyst will partner effectively across the organization to drive better decision-making, create strong financial controls, and provide unique and helpful insights. What will you bring You are very analytical in your approach. You possess excellent interpersonal skills and work well with other team members in a collegial and professional manner. You have the ability to work with all levels of management and employees in a fast growing, worldwide organization. What are your performance objectives Ensure ASC 606/GAAP Compliance Adapt SSP Model to New Product Offerings Own All Revenue Month-End Close Entries Provide Meaningful Deal Desk Input/Contract Review Prepare PBCs for Various External Audits Collaborate Across OTC Org (Revenue, Billing, Sales Ops, CX and FP&A) Develop and Maintain a Deep Understanding of Aryaka s Business and Products Advise on Contract Modifications Write and Maintain Relevant Accounting Memos How will your lofty goals be translated into specific actions / short term goals Within the first 30 days, you will take over all revenue month-end close processes and understand the OTC cycle as well as the information flow between financial systems Within the first quarter, be actively involved with deal analysis and contract reviews, and revenue-related deliverables as well as other cross-functional ongoing projects (with FP&A, Sales Ops, CX, Billing, etc.) By the end of the first 6 months, you will have completed a smooth revenue fiscal year end close and implemented a plan to manage and prepare PBCs for the revenue portion of the financial audit What s in it for you? (EVP Employee Value Proposition) This position will offer an up-and-coming accounting staff the opportunity to step into a highly visible senior role, in a fast-growing, world-wide organization. Exposure to numerous high visibility projects in which you will either directly manage or play a key role in delivering. Qualification : BA/BS Degree in Accounting, Finance or relevant field