Asic Power Engineer Jobs in Bengaluru

Data Engineer Location: Bangalore Company: Capital One India About Capital One At Capital One, we're redefining how technology solves real-world financial challenges. As a technology-driven company, we bring together talented engineers, data scientists, and designers to innovate at scale and deliver meaningful impact to millions of customers. If you're passionate about building powerful data solutions, exploring cutting-edge technologies, and working in a collaborative, fast-paced environment this is the place for you. About the Role As a Data Engineer at Capital One, you ll join a team of innovators who design and build next-generation data platforms and pipelines that power real-time decision-making. You ll collaborate across disciplines engineering, product, machine learning, and cloud infrastructure to transform how we leverage data at scale. What You ll Do Collaborate across Agile teams to design, develop, test, and deploy data-driven solutions. Build and support scalable data pipelines using modern data engineering tools and cloud services. Work on real-time and batch data processing systems that integrate with distributed microservices and ML platforms. Use programming languages such as Python, Java, or Scala with SQL, NoSQL, and cloud data warehouses like Redshift or Snowflake. Contribute to code reviews, unit testing, and performance optimization to ensure high-quality data systems. Partner with product managers and platform teams to deliver robust, cloud-native data solutions that power business decisions. Stay ahead of tech trends, share knowledge, and mentor junior engineers. Basic Qualifications Bachelor s degree in Computer Science, Engineering, or a related field. 1.5+ years of hands-on experience in application or data engineering (excluding internships). At least 1 year of experience working with big data technologies. Preferred Qualifications 3+ years of application/data engineering experience using Python, Scala, Java, or SQL. 1+ year of experience with cloud platforms (AWS, Azure, or GCP). 2+ years of experience with distributed computing tools (Spark, Hadoop, Hive, EMR, Kafka, etc.). 1+ year working on real-time streaming applications. 1+ year of experience with NoSQL databases (MongoDB, Cassandra). 1+ year of experience with data warehousing (Redshift, Snowflake). 2+ years working with Linux/Unix systems and shell scripting. Familiarity with Agile methodologies and modern DevOps practices. Why Join Capital One Work on high-impact data solutions at one of the world s most innovative financial institutions. Be part of a collaborative tech culture that values experimentation and learning. Access to top-tier tools, mentorship, and career development opportunities. Competitive compensation and benefits in a mission-driven environment. Qualification : Bachelors degree in Computer Science, Engineering, or a related field

Senior Manager Full Stack Engineering Location: Bangalore Company: Capital One India About Capital One India At Capital One India, we blend the agility of a startup with the scale of a Fortune 100 company. Our technology teams drive transformation across banking by building next-generation financial products that are secure, user-centric, and powered by cutting-edge engineering practices. We are makers, breakers, doers, and thinkers working together to reinvent consumer finance through technology, modern design, and data science. As a company that builds its own software and platforms, we re constantly innovating to help over 65 million customers bank better. About the Role As a Senior Manager Full Stack Engineering, you ll lead multiple teams building highly available, scalable, and secure platforms and applications. You ll be at the forefront of technical design, architecture, and implementation, helping your teams deliver impactful solutions across web, mobile, backend services, and cloud infrastructure. This is a hands-on leadership role ideal for an experienced engineering leader who still loves to write code, mentor engineers, and contribute directly to architecture and product evolution. What You ll Do Lead full-stack engineering teams delivering cross-functional, multi-platform applications using modern cloud and open-source technologies. Own end-to-end technical design, architecture decisions, and delivery strategy for critical systems. Partner with architects, product managers, and cross-functional leaders to understand requirements, prioritize needs, and develop scalable solutions. Guide and mentor engineers, driving technical excellence, performance, and career growth across teams. Drive Agile delivery, ensuring projects meet timelines and quality standards while promoting DevOps best practices. Champion and enforce best practices in secure coding, architecture, compliance, and accessibility. Collaborate with internal and external stakeholders to align technology vision with business goals. Manage full software development lifecycle: planning, estimation, implementation, deployment, and support. Foster a culture of engineering excellence, continuous learning, and experimentation. Basic Qualifications Bachelor s Degree in Computer Science, Engineering, or a related field 8+ years of experience in software development, with a focus on full-stack systems 5+ years of experience managing software development teams through full release cycles Proven track record of leading Agile teams and delivering high-impact technology projects 5+ years of people management experience, including mentoring and team scaling Preferred Qualifications Master s Degree in Computer Science, Engineering, or Business 10+ years of software engineering experience in large-scale, distributed systems 6+ years of experience applying Agile methodologies (Scrum, Kanban, SAFe) Hands-on experience with some or all of the following: Languages: Java, Python, Go, JavaScript, Node.js Frontend: React, AngularJS, HTML5, CSS Cloud: AWS, Azure, GCP (AWS preferred) DevOps: CI/CD, Docker, Kubernetes, Terraform Databases: NoSQL (MongoDB, Cassandra), SQL, Redshift, Snowflake Strong understanding of accessibility standards and building inclusive digital products Experience with Big Data, event-driven architectures, and RESTful APIs Passion for mentoring, technical excellence, and building diverse, high-performing teams Join a team that's redefining how software powers banking Build next-gen cloud-native applications from scratch Work on meaningful problems with direct customer impact Thrive in a collaborative, transparent, and inclusive culture Access top-tier learning opportunities, technical conferences, and internal mentorship Qualification : Masters Degree in Computer Science, Engineering, or Business

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Position: Application Engineer, Analog & Power Job Overview: We are seeking an Application Engineer specializing in Analog & Power to join our team. In this role, you will provide advanced engineering design services and support to the regional engineering team, with a focus on power electronics and analog engineering solutions. You will be responsible for hardware engineering support, including PCB design and review, electronic simulations, and laboratory analysis, all while ensuring compliance with industry standards and customer specifications. Key Responsibilities: Provide advanced engineering design and support for power electronics and analog systems, assisting the regional engineering team. Conduct hardware engineering tasks, including PCB reviews, electronic simulations, and using lab equipment such as PCBA rework tools and oscilloscopes for product development. Lead PCB design from initial concept (block diagrams) to part selection, schematics, layout, Gerber files, and prototype testing. Develop clear and concise technical documentation, such as whitepapers, technical reports, and internal training materials. Support the development and validation of reference designs to meet customer specifications. Ensure that all designs comply with relevant industry standards and customer specifications. Attend technical and sales training to stay up to date with current technologies and trends. Maintain accurate documentation of engineering designs and solutions for future reference. What We Are Looking For: Bachelor s Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field. At least 7 years of experience in electronics/semiconductors, power management, and analog product design. Strong technical expertise in power conversion topologies (DC-DC, AC-DC, DC-AC). Experience working with WBG (Wide Bandgap) devices such as SiC and GaN. Solid experience with electrical instrumentation, including Op-Amps, signal conditioning, sensors, and data acquisition systems. Familiarity with industry standards and compliance (e.g., IEC, UL, ISO) for high-power systems. In-depth understanding of EMI/EMC standards and mitigation techniques for high-power designs. Experience in reference design development, validation, and component optimization. Strong communication and interpersonal skills to collaborate effectively with internal teams and customers. A passion for innovation and a commitment to delivering high-quality engineering solutions. What s In It For You: Access to training and professional development opportunities. Performance coaching and growth support. The chance to work with a fun and supportive team. Opportunity to be part of a growing and strong company. Community involvement opportunities. About Arrow: Arrow Electronics, Inc. (NYSE: ARW), a Fortune 133 company and one of Fortune Magazine s Most Admired Companies, is a global leader in technology solutions. With 2023 sales of USD $33.11 billion, Arrow develops innovative technology solutions that improve business and daily life. Our broad portfolio helps customers create, make, and manage forward-thinking products that make technology accessible to more people. Location: Bangalore, India Employment Type: Full-time Job Category: Engineering and Technology Qualification : Bachelors Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Power the Future with Us! SolarEdge (NASDAQ: SEDG) is a global leader in high-performance smart energy technology, with over 5,000 employees, offices in 34 countries, and millions of products installed in 133+ countries. Our diverse product offering includes intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and maintaining a relentless focus on innovation, we aim to create a world where clean, green energy from the sun powers homes, businesses, and communities everywhere. Join Us as a Japanese-Speaking Customer Service Specialist! We are expanding our Global Technical Center and looking for a talented individual to provide innovative solutions for the Japanese international market. This is your chance to become an expert in SolarEdge products and the solar energy industry. Location: Brand-new offices with a collaborative environment, transportation, meals, and a competitive compensation package. Work Hours: Japan Standard Time Language Requirement: Japanese Proficiency (JLPT N2/N3) Customer Support: Answer inbound chats, emails, and cases from customers and contractors promptly and professionally. Troubleshooting: Assist with diagnosing and resolving grid-tie solar inverter issues using product schematics, knowledge bases, and technical documentation. Operations Coordination: Validate authorization to release replacement parts as needed. Knowledge Management: Update the internal knowledge database with new troubleshooting solutions. Database Management: Maintain customer monitoring databases and create system layouts upon request. Documentation: Record all interactions and activities in the ticketing system and software platforms. Collaboration: Work closely with peers, managers, and operations teams to enhance service quality. Job Requirements 1-3 years of experience in customer service, technical helpline, or remote support. Technical or engineering qualification (preferred in Electrical/Electronics). Basic understanding of IP network technology. Experience with solar electric products is a plus. Exceptional listening and questioning skills. Strong written and spoken English communication skills. Ability to multitask in a fast-paced environment. Prior experience working in an international organization (preferred). Ability to work in a continuous shift model. Excellent interpersonal and problem-solving skills. Japanese language proficiency (JLPT N2/N3) Read, Write, and Speak. Exciting career growth in the renewable energy sector. Competitive salary and benefits package. Diverse and inclusive workplace. Regular training and upskilling programs. Meal and transportation allowances. At SolarEdge, we recognize that our success comes from the talented and diverse workforce that drives innovation. We are committed to hiring and retaining top talent to ensure continuous business growth and performance. Join us and be part of the clean energy revolution!

Position: Power Platform Engineer Experience: 5+ years of experience with Power Platform and related technologies Employment Type: Full-time Mandatory Skills: Delivering services and solutions using Microsoft PowerApps, SharePoint, Power Automate, Microsoft Teams, custom development, and data integrations. Hands-on experience with Dataverse and related business process automations. Proficiency in migrating Power Platform solutions across different tenants with a solid understanding of data connections and references. Basic SharePoint Online experience with lists, libraries, and connectivity. Azure DevOps experience. Familiarity with Agile (Scrum) development processes. Stay updated with the latest features and trends in PowerApps and Power Automate. Tasks and Responsibilities: Understand and contribute to the overall Power Platform migration program. Ensure technical quality and compliance with the overall architecture. Execute migration requirements while testing and working in direct contact with customers. Collaborate closely with cross-functional teams to deliver solutions that align with business needs. Desired Skills: Self-driven with the ability to provide solutions independently and as part of a team. Experience working in Agile (Scrum) development environments. Experience in a project-oriented, international matrix organization. Excellent communication skills, with the ability to work across multiple countries and time zones. High degree of flexibility and strong interpersonal skills. Willingness to travel for close coordination with the team as required. Join Us! We offer a dynamic environment, opportunities for growth, and the chance to work on exciting Power Platform projects in a global organization. If you re passionate about delivering high-quality solutions and staying ahead of industry trends, we d love to hear from you!

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Job Description Power the Future with us! SolarEdge (NASDAQ: SEDG), is a global leader in high-performance smart energy technology, with over 5000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. Our R&D division is growing globally, and we are looking for an experienced Power Electronics Engineer to join our dynamic team at the new R&D site in Bangalore, India. As a Power Electronics Engineer at SolarEdge India R&D, you will play a pivotal role in the design, development, and optimization of power electronics and power electronics systems for our advanced solar energy products. You will be responsible for driving the innovation and technical excellence of our power solutions, contributing to the success of SolarEdge's mission to make solar energy more accessible and efficient. Responsibilities: Design, analysis, and development of advanced power electronics and power systems for SolarEdge's solar energy products, including inverters, power optimizers, and energy storage solutions. Collaborate with cross-functional teams, including electrical engineers, Mechanical Engineers/Designers, PCB Layout Engineers, and firmware developers, to ensure seamless development, integration, and optimization of power systems. Conduct power system studies, such as load flow analysis, transient stability, and harmonic analysis, to assess system performance and reliability. Perform detailed design and analysis of power electronic circuits, ensuring compliance with industry standards and safety regulations. Prepare detailed design documentation, Schematics, BoM, and test procedures. Lead the testing and verification of power electronics and power systems, both in the lab and field, to ensure they meet design specifications and quality standards. Participate in design reviews, providing technical expertise and guidance to the team to drive continuous improvement and innovation. Collaborate with suppliers and manufacturing teams to support the transition of designs from R&D to mass production, addressing any design-related issues during production. Mentor and guide junior engineers, fostering a collaborative and innovative work environment. Job Requirements Bachelor s (B.E/B.Tech) or master s (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems. 4+ years of hands-on experience in power electronics design and power system analysis, preferably in the solar energy or renewable energy industry. Strong understanding of power semiconductor devices (Including SiC and GaN), gate drive circuits, and magnetic components used in power converters. Experience with simulation tools (e.g., PSpice, LT SPICE, Simulink etc.) Knowledge of power converter topologies (e.g., DC/DC, DC/AC and AC/DC), including resonant and bi-directional converters and grid-tied inverters. Excellent knowledge of PCB layout rules, considering high-current traces, thermal management, creepage, clearance requirements for HV and LV traces. Ensure compliance with best practices for power distribution, component placement, and impedance control. Implement EMI/EMC best design practices to ensure compliance with regulatory standards. Familiarity with international safety and regulatory standards for power electronics and solar energy products. Excellent problem-solving skills and the ability to troubleshoot and resolve complex technical issues. Strong communication and interpersonal skills to work effectively in a cross-functional team environment. Proven track record of delivering high-quality power electronics designs from concept to production. Results-oriented mindset with a focus on achieving tangible and measurable results. Qualification : Bachelors (B.E/B.Tech) or masters (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems.

About the Role: As a Senior Power Electronics Engineer at SolarEdge India R&D, you will play a crucial role in designing, developing, and optimizing power electronics and power systems for our cutting-edge solar energy products. You will be a key driver of innovation and technical excellence, contributing directly to SolarEdge's vision of accessible and efficient solar power. Key Responsibilities: Lead the design, analysis, and development of advanced power electronics and power systems for SolarEdge's solar energy products, including inverters, power optimizers, and energy storage solutions. Collaborate effectively with cross-functional teams (electrical, mechanical, PCB layout, and firmware engineers) to ensure seamless development, integration, and optimization of power systems. Conduct comprehensive power system studies (load flow analysis, transient stability, harmonic analysis) to evaluate system performance and reliability. Perform detailed design and analysis of power electronic circuits, ensuring adherence to industry standards and safety regulations. Create and maintain detailed design documentation, including schematics, Bills of Materials (BOMs), and test procedures. Lead the testing and verification of power electronics and power systems in both laboratory and field settings, ensuring they meet design specifications and quality standards. Actively participate in design reviews, providing technical expertise and guidance to the team to foster continuous improvement and innovation. Collaborate with suppliers and manufacturing teams to support the transition of designs from R&D to mass production, addressing any design-related challenges. Mentor and guide junior engineers, cultivating a collaborative and innovative work environment. Job Requirements: Bachelor's (B.E/B.Tech) or Master's (M.E./M.Tech) degree in Electrical/Electronics Engineering specializing in Power Electronics or Power Systems. 10+ years of hands-on experience in power electronics design and power system analysis, preferably within the solar or renewable energy industry. Strong understanding of power semiconductor devices (including SiC and GaN), gate drive circuits, and magnetic components used in power converters. Proficiency with simulation tools (e.g., PSpice, LTSpice, Simulink). Knowledge of power converter topologies (DC/DC, DC/AC, and AC/DC), including resonant and bi-directional converters and grid-tied inverters. Excellent understanding of PCB layout rules, considering high-current traces, thermal management, creepage, clearance requirements for HV and LV traces. Expertise in best practices for power distribution, component placement, and impedance control. Implementation of EMI/EMC best design practices to ensure compliance with regulatory standards. Familiarity with international safety and regulatory standards for power electronics and solar energy products. Exceptional problem-solving skills and the ability to troubleshoot and resolve complex technical issues. Excellent communication and interpersonal skills to collaborate effectively in a cross-functional team. Proven track record of delivering high-quality power electronics designs from concept to production. Results-oriented mindset with a focus on achieving tangible and measurable outcomes. Qualification : Bachelors (B.E/B.Tech) or masters (M.E./M.Tech) degree in electrical /electronics Engineering with a specialization in Power Electronics or Power Systems.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Overview: Collins Aerospace is looking for a talented Software Verification Lead Engineer to join the Navigation and Advanced Technology team. In this role, you will be responsible for performing validation and verification for critical avionics systems, focusing on protocols and applications like Maintenance, OMS, and Dataload. You will collaborate with senior developers and architects to design scalable, extensible, and sustainable solutions, while ensuring the highest standards of quality and performance. Primary Responsibilities: Avionics DAL A Product Verification: Verify avionics products in the CNS (Communication, Navigation, and Surveillance) domain, ensuring compliance with industry standards and customer requirements. Tool Development & Test Design: Develop common supporting tools necessary for development and verification activities, as well as create validation tests for avionics systems. Collaboration with Cross-functional Teams: Work closely with architects and senior developers to create scalable solutions, ensuring that new technologies are effectively integrated into the system architecture. CI/CD Pipeline Management: Build CI/CD pipelines and collaborate with the DevOps team to ensure streamlined deployments. Troubleshoot and resolve build issues while supporting deployment processes. Basic Qualifications: Education: BE/B.Tech/ME/M.Tech in Engineering. Experience: 6-8 years of experience in avionics systems and software development. Technical Skills: Proficiency in Python, C/C++, and Matlab/Simulink. Strong understanding of Avionics Systems/Software Architecture, including CNS, FMS, FCS, or Displays. Familiarity with DO-178B/C software standards. Avionics Domain Knowledge: Experience in Communication, Navigation, and Surveillance systems, including protocols for voice and data communications, satellite-based navigation, weather detection, traffic awareness, and collision avoidance. About Collins Aerospace: Collins Aerospace, a Raytheon Technologies company, is a global leader in aerospace and defense solutions. We offer advanced technology and services across a wide array of civil, military, and government missions. Our products are integral to the safety and efficiency of modern aviation, from emergency power systems to reliable cabin controls and quieter engines. Joining our team means being part of a mission-driven company that innovates every day to deliver safer, smarter, and more efficient aerospace systems. Collins Aerospace Diversity & Inclusion Statement: Diversity drives innovation, and inclusion drives success. At Collins Aerospace, we foster a culture that values diversity of thought and experience, which enables us to tackle the toughest challenges in our industry. We are committed to ensuring all employees have the opportunity to share their ideas and passions, paving the way for limitless possibilities. Benefits Package: Insurance: Group Term Life Insurance, Group Health Insurance, Group Personal Accident Insurance. Leave Entitlements: 18 days of vacation and 12 days of contingency leave annually. Employee Programs & Work-life Balance: Employee Scholar Program, work-life balance initiatives, car lease program, National Pension Scheme, Leave Travel Allowance (LTA), and meal vouchers. Additional Benefits: Fuel and maintenance/driver wages, and more! Ethical & Safety Commitment: Collins Aerospace prioritizes strong ethical practices and safety. All positions in India require a background check, which may include a drug screen (for operations positions). Why Collins Aerospace? At Collins Aerospace, we are redefining aerospace. Join our team and be part of a company that plays a critical role in modern flight, providing innovative solutions that enhance safety, efficiency, and the travel experience for millions of passengers worldwide. Qualification : BE/B.Tech/ME/M.Tech with Understanding of Avionics Systems/Software Architecture CNS, FMS, FCS or Displays.

Technical Requirements: 1. Digital Logic Design & RTL Coding: Strong experience in digital logic design and RTL (Register Transfer Level) coding. Proficiency in Verilog, VHDL, or System Verilog for implementing complex designs. Deep understanding of logic synthesis, timing constraints, and logic optimization. 2. Peripheral Design (High/Low-Speed): Experience in designing high-speed and low-speed peripherals, ensuring compatibility and optimal performance. Knowledge of integrating peripherals within larger system architectures, ensuring robust data flow. 3. Synthesis, Timing Constraints, and CDC: Familiarity with synthesis tools and ensuring the correctness of timing constraints. Experience with Clock Domain Crossing (CDC) and methods to avoid timing hazards in designs. Ability to optimize logic for timing closure and power efficiency during synthesis. 4. Unit Level Verification Setup & Assertions: Hands-on experience in setting up unit-level verification for RTL modules. Proficient in writing assertions to ensure the correctness of designs during simulation and functional verification. 5. Low Power Design Techniques: Exposure to low power design techniques, including managing multiple power/clock domains in complex SoC designs. Ability to design power-efficient modules for consumer electronics or embedded systems. 6. ARM SoC/AMBA IP-based Designs: Exposure to ARM SoC architectures and integration of AMBA (AXI, AHB, APB) protocols into designs. Experience with SoC-level integration, managing both hardware and software interactions in complex systems. 7. Protocol Knowledge (Additional Advantage): Working knowledge of industry-standard protocols, including PCIe, DDRx, Ethernet, USB, I2C, SPI. Ability to implement these protocols in hardware designs for various interfaces. Expectations from the Role: 1. Communication & Interpersonal Skills: Excellent communication skills for interacting with cross-functional teams, stakeholders, and clients. Ability to convey complex technical details clearly, both in writing and verbally. 2. Independent and Teamwork Capabilities: Strong ability to work both independently and as part of a team. Willingness to take initiative and demonstrate leadership in solving technical challenges. 3. Fast Learner & Adaptability: Ability to quickly absorb and apply new technologies, tools, and methodologies. Eagerness to stay updated with trends in digital design and SoC development. 4. Ownership & Accountability: Demonstrated ownership of tasks and the ability to meet deadlines. Ensure that all aspects of the design process are completed with attention to detail and high-quality standards. 5. Punctuality and Responsibility: Strong track record of punctuality, meeting project deadlines, and delivering quality work. Ability to manage multiple design tasks and optimize workflows to maintain timelines. Ideal Candidate Profile: The ideal candidate should have solid experience in digital logic design, particularly with Verilog, VHDL, or System Verilog. They should have a strong foundation in designing both high-speed and low-speed peripherals and optimizing designs for timing and power efficiency. The role also requires familiarity with ARM SoC architectures and integration of AMBA-based IPs. The candidate should be a strong communicator with the ability to work both independently and collaboratively in a fast-paced, distributed work environment. Leadership potential and a demonstrated ownership mindset are essential to the success in this role.