Asic Power Management Architect Jobs in Bengaluru
902 Jobs Found
Backend Engineer
Falconx
Job Title: Backend Engineer Location: Bangalore Team: Market Making Team Employment Type: Full-Time About FalconX At FalconX, we re on a mission to revolutionize institutional access to the crypto markets. We combine the best of traditional finance with the cutting-edge technology of the digital asset space, solving the industry's toughest challenges. Our platform provides comprehensive solutions for digital asset strategies, empowering clients to navigate the rapidly evolving cryptocurrency landscape with confidence and precision. Our team is composed of operators, investors, and builders committed to shaping the future of crypto assets. By leveraging speed, transparency, and trust, we re helping to make crypto a viable and successful asset class for financial institutions worldwide. The Team Role The Quant Team at FalconX is divided into three verticals: Services: Focuses on complex pricing and risk management methodologies, building execution strategies for our OTC desks. Options Market Making: A team dedicated to market-making derivatives, managing both service-driven and profit-driven strategies. D1 Team: Quantitative traders providing market-making services, with discretionary risk ownership for linear products. As a Backend Engineer on the Market Making Team, you ll play a pivotal role in developing and enhancing backend infrastructure, contributing to the systems that power FalconX s trading strategies, risk management, and product development. What You ll Do Develop & Enhance Backend Infrastructure: Collaborate closely with the Market Making team to build scalable and robust backend systems that support complex pricing and risk management for new crypto products. Model Development: Contribute to the development of core models that support the three verticals of the team, providing crucial tools for the business. Cross-Functional Collaboration: Work with teams across design, product management, traders, quants, and trade operations to deliver user-friendly and high-performance applications. Solve Complex Technical Problems: Tackle high-impact technical challenges, working on innovative products such as correlation exotics, missing data volatility pricing, and more. Drive Product Innovation: Get involved in the most advanced products within the crypto space, with a focus on market-making solutions for institutional clients. Qualifications: Advanced Degree in Computer Science, Mathematics, or a related field. Proficiency in Python and familiarity with low-level languages (C, C++, Go, etc.). Experience with basic UI frameworks is a plus. Familiarity with distributed systems and large-scale infrastructure. Knowledge of derivative products and risk management frameworks. Strong understanding of data structures, algorithms, and design patterns. Problem-solving skills with a detail-oriented approach. Strong communication skills and a collaborative mindset to work efficiently across teams. Ability to thrive in a fast-paced, agile development environment. Bonus Criteria: Experience working with exotic financial products. Experience with risk management in trading environments. Familiarity with numerical methods and optimization techniques. Experience with React for frontend or UI integration. Innovation at the Cutting Edge: Work on the forefront of cryptocurrency market-making, helping shape the future of institutional crypto trading. Collaborative Environment: Join a dynamic and cross-functional team with the opportunity to work alongside some of the most talented professionals in the fintech and crypto space. Fast-Paced Growth: FalconX is an early-stage startup with a high-growth trajectory, offering a unique opportunity to drive impactful solutions in the rapidly evolving crypto industry. Competitive Compensation: We offer a competitive salary and benefits package, with the potential for equity participation in a high-growth company. Revolutionize Crypto Trading: Be part of a company that is redefining the way financial institutions interact with the crypto market. Exposure to Cutting-Edge Tech: Work with the latest technologies in a fast-paced, evolving environment. Empower Institutional Clients: Help some of the largest financial institutions around the world navigate the complexities of the crypto asset space. If you're ready to take on the challenge of building the future of crypto trading infrastructure, we want to hear from you!
Distinguished Engineer - Machine Learning Engineering
Capital One
Distinguished Engineer Machine Learning Engineering Location: Bangalore Company: Capital One India About Us At Capital One India, we re redefining how technology powers financial services. Our teams work in a fast-paced, intellectually rigorous environment to tackle complex business challenges at scale. By harnessing the power of advanced analytics, data science, and machine learning, we create innovative, patentable solutions that transform customer experiences and drive the business forward. Team Overview: Machine Learning Experience (MLX) The MLX team leads Capital One s mission to build scalable, well-managed ML systems and platforms. We empower teams across the enterprise to develop, govern, and deploy machine learning models efficiently, securely, and at scale. From automated model governance to observability platforms, MLX enables end-to-end ML lifecycle management laying the foundation for AI-driven innovation across the organization. Role Overview We re looking for a Distinguished Engineer Machine Learning Engineering to join our MLX team. In this high-impact role, you'll architect and implement the platforms and tools that support model observability, automated governance, and ML model deployment at scale. This is an opportunity to drive enterprise-wide innovation and shape how ML is integrated into Capital One s core business systems. What You ll Do Design and build systems that capture and analyze large-scale model and feature metadata, including training metrics and runtime performance, to power model observability and governance automation. Partner with cross-functional teams including product managers, designers, and platform engineers to create scalable solutions that accelerate ML model lifecycle management. Lead efforts to enable automated governance decisions for ML models, ensuring compliance, auditability, and operational integrity. Architect and implement high-performance data pipelines that feed ML models with real-time and batch data. Contribute to the design and implementation of cloud-native ML systems using tools such as AWS, Kubernetes, and Terraform. Write clean, scalable, production-grade code in languages like Python, Go, or Java. Implement CI/CD pipelines, testing frameworks, and monitoring systems for ML applications. Drive the adoption of best practices in ML Ops, observability, and platform resilience. Basic Qualifications Master s Degree in Computer Science or related field. 15+ years of experience in software engineering or solution architecture. 10+ years building data-intensive, distributed computing systems. 10+ years programming in Python, Go, or Java. 8+ years of hands-on experience with industry-leading ML frameworks (e.g., Scikit-learn, TensorFlow, PyTorch, Dask, Spark). Preferred Qualifications PhD or Master's in Computer Science, Electrical Engineering, Mathematics, or related field. 5+ years of experience building, scaling, and optimizing production ML systems. Deep expertise in data preparation, feature engineering, and ML pipeline optimization. 10+ years writing performant, maintainable, and resilient production code. Strong experience deploying ML solutions on public cloud platforms (AWS, Azure, GCP). Expertise in distributed systems, file systems, or multi-node databases. Open-source contributor to ML tools or libraries. Published work in ML (papers, patents, blogs, etc.). 5+ years of experience in ML Ops (using MLflow, TFX, Kubeflow, etc.). Experience with LLMs and Generative AI applications (open-source or commercial models). Proven experience designing production-ready observability platforms for ML applications. Be at the forefront of building scalable, secure, and enterprise-grade ML platforms. Shape the future of AI and ML adoption in a top-tier financial institution. Collaborate with world-class engineers and data scientists. Solve real-world problems with high business impact. Thrive in a diverse, inclusive, and innovation-focused culture. Qualification : PhD or Master's in Computer Science, Electrical Engineering, Mathematics, or related field
Backend Engineer - Rag & Ml Specialisation
Sarvam
Backend Engineer - RAG & ML Specialization Location: Bengaluru, Karnataka, India (On-Site) Department: Engineering Employment Type: Full-Time About Sarvam.ai Sarvam.ai is a cutting-edge generative AI startup based in Bengaluru, India, on a mission to make AI accessible and impactful for Bharat. We develop high-performance, cost-effective AI agents tailored to the Indian market, empowering enterprises to unlock new opportunities and create meaningful customer connections. Join us as we reshape AI for India and beyond. Role Overview As a Backend Engineer specializing in RAG (Retrieval-Augmented Generation) systems and Machine Learning (ML) applications, you'll be building scalable backend systems that power AI-driven services. Your work will be critical in developing high-performance platforms for voice and generative AI applications, ensuring secure, scalable, and seamless AI model deployments. Key Responsibilities Backend Development: Design, develop, and maintain scalable, efficient backend applications and RESTful APIs using Python and FastAPI. RAG System Implementation: Build and optimize Retrieval-Augmented Generation (RAG) systems for AI applications, focusing on enhancing AI-driven search and retrieval capabilities. Data Pipeline Management: Develop and manage data pipelines and workflows for integrating AI and ML models into production systems. Code Quality: Ensure adherence to coding best practices, including writing modular code, implementing unit tests, and conducting code reviews. Cross-functional Collaboration: Work closely with AI/ML engineers, data scientists, and other teams to integrate machine learning models into backend systems. Database Optimization: Optimize database queries and efficiently manage both structured and unstructured data. CI/CD Practices: Continuously integrate and deploy code, using version control systems like Git and CI/CD pipelines. System Architecture: Contribute to architectural discussions and improvements, focusing on scalability and performance optimization. Must-Have Skills & Qualifications Educational Background: Bachelor's degree in Computer Science, Engineering, or a related technical field. Programming Skills: Strong proficiency in Python, with a solid understanding of programming fundamentals. Web Frameworks: Experience building backend services using FastAPI, Flask, or Django. Database Knowledge: Familiarity with SQL operations and NoSQL databases for efficient data management. AI & ML Exposure: Hands-on experience with Machine Learning and Deep Learning techniques, and understanding of AI model deployment in production environments. RAG Systems Experience: Prior exposure to Retrieval-Augmented Generation (RAG) architectures, with experience building AI-driven search systems. Version Control: Proficiency with Git and understanding of version control workflows. Problem Solving: Strong analytical and debugging skills to address complex technical challenges. Soft Skills: Excellent communication, collaboration, and problem-solving abilities. Good to Have (Preferred Experience) Backend Projects: Demonstrated experience working on backend applications using Python frameworks (FastAPI, Flask, Django) through academic or personal projects. Cloud Knowledge: Basic understanding of cloud platforms and services such as AWS, GCP, or Azure. DevOps & Containers: Exposure to Linux/Unix environments and containerization concepts (Docker, Kubernetes). CI/CD: Experience setting up CI/CD pipelines for automated testing and deployment. Open Source Contributions: Contributions to open-source projects or a strong GitHub profile showcasing backend development expertise. Impactful Work: Work on groundbreaking generative AI applications that are transforming the future of technology in India. Collaborative Environment: Join a high-performing team of AI experts and engineers, driving innovation and delivering real-world solutions. Growth Opportunities: Be a key player in a fast-growing AI startup, with the opportunity to grow alongside the company. Cutting-edge Technologies: Leverage the latest in AI, Machine Learning, and Cloud Technologies to build state-of-the-art systems. Qualification : Bachelor's degree in Computer Science, Engineering, or a related technical field.
Senior Software Engg - Systems
Mphasis Limited
Senior Software Engineer - Systems Location: Bangalore Experience: 4 6 Years Company: Mphasis Job Summary We are looking for a talented and passionate Storage QA/Test Engineer with 4 to 5 years of experience in manual systems testing. The ideal candidate should have a strong understanding of server architecture, storage protocols, and hands-on experience with functional testing, as well as the ability to design test cases and plans. Technical Skills (Mandatory) Expert in understanding Server Architecture, HBA adapters, and CNA adapters Strong knowledge of OS (Linux / Windows / VMware) system-level concepts In-depth expertise in Storage protocols: SAS, SCSI, SATA, iSCSI, DAS, NVMe, SSD, HDD Experience in Zoning, LUN masking, LUN configurations & representations Hands-on experience in Functional testing Design and development of test cases and test plans Familiarity with storage products like 3PAR, Alletra/Primera, Nimble, DELL, Cisco Proficiency in Shell scripting & Python Ability to prepare file defect reports and report test progress Excellent analytical, problem-solving, and debugging skills Strong communication skills Desired Skills Experience with Server bring up, OS deployment, and firmware installation Basic understanding of networking concepts Proficiency in Python/Golang/Selenium to automate test cases and debug frameworks Experience with GitHub version control and CI/CD (Jenkins) Ability to collaborate with Lab and Development teams Process Skills Participate as a team member and foster teamwork by collaborating within project modules Communicate effectively with stakeholders to ensure client satisfaction Train and coach project members for effective knowledge management Behavioral Skills Proactive attitude towards learning new technologies and solving complex technical problems Quick learner and excellent team player Excellent communication skills Certifications ISTQB certification is an added advantage (but not mandatory) About Mphasis Mphasis applies next-generation technology to help enterprises transform businesses globally. Customer centricity is foundational to Mphasis and is reflected in the Mphasis Front2Back Transformation approach, leveraging the exponential power of cloud and cognitive technologies. The company s Service Transformation helps enterprises modernize legacy environments, ensuring they stay ahead in a changing world. Skill Breakdown Primary Competency: Storage Technologies Primary Skill: Manual Testing (60%) Secondary Competency: Server Technologies Secondary Skill: Hardware Testing (30%) Tertiary Competency: Server Technologies Tertiary Skill: Functional Testing (Server) (10%)
Soc Architect - Sr Staff/pe
Qualcomm
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.
Senior Software Engineer - Performance Engineering
Blue Yonder
Job Title: Performance Engineer (Full Stack) Location: Pune, India Company: Blue Yonder Experience: 4 to 9 years Education: Bachelor s Degree in Computer Science, Engineering, or a related field About Blue Yonder Blue Yonder is a leading AI-driven Global Supply Chain Solutions provider, recognized by Glassdoor as one of the Best Places to Work. We design innovative solutions that power intelligent supply chains and transform global commerce. We are seeking a talented and experienced Performance Engineer with expertise in Java, Spring Boot, React, and open-source technologies. If you have a passion for clean code, automation, and performance engineering, we want you on our team. Scope of the Role You will play a critical role in the engineering team, working hands-on to design, develop, test, and optimize performance for Java-based applications deployed both on-premises and on-cloud. This role involves close collaboration with developers, testers, and stakeholders to ensure performance requirements are met and bottlenecks are eliminated. Key Responsibilities Develop quality software according to clean code principles and Blue Yonder standards. Write effective performance test cases and develop automation utilities for performance testing. Collaborate on the design and development of skeleton/stub components for successful integration testing. Analyze performance test results, report defects, and document findings through comprehensive performance test reports. Participate in design reviews, ensuring performance considerations are built into application architecture. Mentor junior team members in performance testing best practices. Gather and validate Non-Functional Requirements (NFRs) from customers and stakeholders. Proactively participate in project status meetings and offer performance-related insights. Technical Environment Performance Testing Tools: JMeter (expertise required) Programming: Java, Data Structures, Shell Scripting Operating System: Linux (Ubuntu preferred) Monitoring Tools: Telegraph, InfluxDB, Grafana Diagnostics: Thread dump analysis, GC log analysis, Heap dump analysis Architecture: Microservices, REST APIs, Reactive Applications Cloud: Azure (or equivalent cloud platforms) Must-Have Skills 4-9 years of experience as a Performance Tester/Engineer on Java-based applications. Expertise in JMeter for performance test automation. Strong understanding of performance metrics for certifying Java applications. Deep knowledge of Linux performance commands and shell scripting. Experience with application monitoring tools like Telegraph, InfluxDB, Grafana. Strong analytical and problem-solving skills with a proactive, self-motivated work style. Excellent communication skills (both written and verbal). Good to Have Skills Hands-on development experience with Java and Data Structures. Familiarity with SQL and databases. Experience with application servers such as Tomcat or Netty. Knowledge of REST API design and testing. Exposure to Azure or other cloud platforms. Experience with distributed tracing (Zipkin, etc.). Hands-on with data analysis tools like Python/R and Kafka. Experience with Glowroot and Flame Graphs for diagnostics. Familiarity with Hazelcast, Redis, or other IMDG (In-Memory Data Grid) solutions. Understanding of E-commerce and Retail domain is a plus. Hands-on experience with Cassandra or other NoSQL databases. Basic understanding of Kubernetes architecture and administration. Collaborate with a global team working on cutting-edge supply chain solutions. Be part of an inclusive, innovative, and diverse workplace. Work on modern technologies and drive impactful performance optimizations. Opportunities to learn, grow, and mentor others in your area of expertise. Diversity, Inclusion, Value & Equity (DIVE) At Blue Yonder, we foster an inclusive environment where everyone belongs. We encourage applicants from all backgrounds to apply and contribute to our diverse community. All qualified applicants will receive consideration for employment regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status. Qualification : Bachelors Degree in Computer Science, Engineering, or a related field
Soc Integration Validation Engineer
Intel Corporation
Job Title: Pre-Silicon Validation Engineer SoC/IP Job Description: Join the Devices Development Group (DDG), one of Intel s premier System-on-Chip (SoC) design teams, driving innovation in future Intel SoCs and IPs. As a Pre-Silicon Validation Engineer, you will be part of a dynamic team responsible for ensuring the functionality, performance, and reliability of Intel s cutting-edge designs. Key Responsibilities: Validate IP blocks or features at the SoC level, ensuring compliance with design specifications. Develop validation plans and test strategies based on architectural specifications, RTL code, and existing test methodologies. Analyze microarchitecture and debug failures to identify root causes and improve design quality. Develop and utilize various debugging and validation tools to implement validation plans effectively. Participate in silicon debugging, identifying issues and enhancing testing methodologies for future RTL models. Collaborate with IP providers and internal customers to define, develop, and deliver essential infrastructure while addressing issues identified during execution. Qualifications & Requirements: Educational Qualifications: Bachelor s (B.Tech/BS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of experience, OR Master s (M.Tech/MS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 3+ years of experience. Technical Skills & Experience: Minimum 2 years of experience in IP or SoC development, verification, or integration using SystemVerilog and UVM (Universal Verification Methodology). Minimum 2 years of experience in writing validation plans and developing software to execute those plans. Minimum 2 years of experience with object-oriented programming languages. Minimum 2 years of experience working with SystemVerilog and UVM. Minimum 1 year of experience with UNIX/Linux environments. Exposure to Graphics Verification and/or Security Verification is a plus. Preferred Qualifications: Minimum 1 year of experience with computer architecture. Minimum 2 years of experience in validation or testing, particularly in silicon design teams. About the Client Computing Group (CCG): The Client Computing Group (CCG) is at the forefront of Intel s PC product and platform development, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. Through strategic partnerships across the industry, CCG delivers innovative computing experiences that empower users to create, connect, and collaborate. As Intel s largest business unit, CCG drives innovation, scalability, and IP development, helping the company fulfill its mission of enriching lives through technology. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, which includes: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development opportunities to support career growth.
System Software Architect, Programmable Vision Accelerator
Nvidia
We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience
Senior Asic Power And Thermal Engineer
Nvidia
As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)
Cpu Sram Design Engineer
Qualcomm
Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.
Asic Power Management Architect
Google Careers
About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.
Dsp Design Verification - Tools And Infrastructure Sr Staff Engineer
Qualcomm
Job Overview As a Tools Support & Infrastructure Engineer at Qualcomm, you'll play a vital role in supporting and enhancing the design flows and infrastructure for Qualcomm's Digital Signal Processing (DSP) team. The DSP design team delivers high-performance DSP cores that are integral to Qualcomm's multi-tier SoC roadmap, particularly for mobile applications. This position involves managing DSP design databases, developing automation tools to streamline the verification process, and collaborating with global teams to optimize design efficiency and quality. Key Responsibilities Manage DSP Design Database: Oversee the DSP design database, supporting design and verification teams with infrastructure needs. Build Automation: Create new automation tools to enhance the productivity of design verification teams, making it easier to debug simulation failures. Collaborate with Global Teams: Work with Qualcomm s global DSP design teams (architecture, implementation, post-silicon, and back-end teams) to enhance DSP IP infrastructure. Improve Tool Methodologies: Design and deploy new tool methodologies to continuously improve the quality, efficiency, and effectiveness of design and verification processes. Support Design Flows: Contribute to and improve design flows, ensuring the seamless integration of tools and resources used by design teams. Minimum Qualifications Educational Requirements: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 6+ years of relevant work experience, or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 5+ years of relevant work experience, or PhD in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of relevant work experience. Skills & Experience Programming & Tools Support: 3-10 years of experience in programming, database management, and providing tools support for complex DSP IP designs. Automation Expertise: Extensive experience in building automation tools that improve design and verification processes. Programming Languages: Expertise in C++ and Java. Scripting & Automation: Proficiency with scripting languages and tools such as Perl, Python, Shell, Makefiles, and TCI. Analytical Skills: Strong analytic, programming, and debugging abilities. Object-Oriented Programming (OOP): Deep understanding of OOP concepts. Web Programming: Familiarity with Java for web programming is a plus. Unix Environment: Solid understanding of the Unix environment. Digital Design Flows: Knowledge of digital design flows is a plus. Communication: Excellent interpersonal and communication skills, with the ability to work collaboratively with global teams.
Asic Platform Software Architect, Silicon
Google Careers
Minimum Qualifications: Bachelor s degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. At least 5 years of experience in software development, specifically within consumer electronics or embedded systems. A minimum of 3 years of experience in leading ASIC architecture decisions from a software perspective. Proficiency with Linux kernel, bootloaders, SoC, low-power management frameworks, or performance analysis. Preferred Qualifications: Master s degree or PhD in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related discipline. 10 years of experience in software design and development, particularly with software layers in ASIC (e.g., boot processes, drivers, embedded firmware, libraries, and APIs for applications). Familiarity with Android OS or similar platforms, especially in power management. Strong understanding of hardware-software interactions across various hardware blocks, including CPUs and accelerators. About the Role: Join a dynamic, diverse team that is pioneering the development of custom silicon solutions powering the future of Google's direct-to-consumer products. As part of the team, you will contribute to groundbreaking innovations in products used by millions globally, shaping the next generation of hardware experiences for optimal performance, efficiency, and integration. As the ASIC Platform Software Architect, you will be instrumental in translating software product requirements and use cases into specific hardware blocks or sub-systems. In this role, you will define the direction of the software team, guiding them in the face of complex constraints. You will work closely with hardware architects to define system architectures for hardware blocks and collaborate with the implementation team to outline solutions. You ll also help influence design decisions to ensure software requirements are met, negotiating hardware/software trade-offs for optimal results. Google's mission is to organize the world s information and make it universally accessible and useful. Our Devices & Services team integrates the best of Google AI, software, and hardware to create transformative user experiences. We focus on researching, designing, and developing new technologies and hardware to make user interaction with computing faster, more seamless, and more powerful. Whether we re innovating on form factors, advancing sensors, or redefining interaction methods, the Devices & Services team is dedicated to improving people's lives through technology. Responsibilities: Collaborate with stakeholders to identify user experience needs and map them to hardware and software solutions. Design architectures and software interfaces that empower developers to leverage hardware accelerators and other intellectual property (IP). Analyze hardware component interactions, troubleshoot issues, propose trade-off solutions, and drive to resolution. Contribute to the design and improvement of hardware from one generation to the next, applying insights from past productization efforts and reducing technical debt.
Customer Engineer, Ai Infrastructure, Google Cloud
Google Careers
Minimum qualifications: Bachelor's degree in Computer Science, Mathematics, a related technical field, or equivalent practical experience. 10 years of experience with cloud native architecture in a customer-facing or support role. 5 years of experience with cloud infrastructure. 5 years of experience in a technical role focused on AI infrastructure or related areas Experience building and operationalizing machine learning models. Experience with GPU programming (e.g., CUDA, OpenCL) and optimization techniques. Preferred qualifications: Experience with high-performance computing (HPC) environments and contributions to open-source projects related to AI or infrastructure. Experience training and fine-tuning large models (e.g., image, language, segmentation, recommendation, genomics) with accelerators. Experience with performance profiling tools (e.g., TensorFlow profiler, PyTorch profiler, Tensorboard). Experience designing/architecting large-scale infrastructure farms for specialist AI use cases. Experience with running MLPerf benchmarks, distributed training and optimizing performance versus costs. Excellent communication, presentation, and teamwork skills. About the job The Google Cloud Platform team helps customers transform and build what's next for their business all with technology built in the cloud. Our products are developed for security, reliability and scalability, running the full stack from infrastructure to applications to devices and hardware. Our teams are dedicated to helping our customers developers, small and large businesses, educational institutions and government agencies see the benefits of our technology come to life. As part of an entrepreneurial team in this rapidly growing business, you will play a key role in understanding the needs of our customers and help shape the future of businesses of all sizes use technology to connect with customers, employees and partners. As a Customer Engineer for AI Infrastructure, you will be the technical expert and trusted advisor for our customers, helping them design, deploy, and optimize AI solutions using cutting-edge hardware and software. Your focus will be on GPUs, accelerators (including FPGAs and ASICs), and Google TPUs. You will work closely with Sales, Product Management, and Engineering to ensure our customers achieve maximum value from their AI investments. You will be responsible for scaling and helping accelerate GCP AI Infrastructure business growth. Google Cloud accelerates every organization s ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google s cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems. Responsibilities Be a trusted advisor to customers, helping them understand and incorporate AI accelerators into their overall cloud strategy by recommending migration paths, integration strategies, and application architecture that incorporate Google Cloud AI optimized infrastructure. Demonstrate how Google Cloud is differentiated, highlighting the power of accelerators by working with customers on proof-of-concepts, demonstrating features, optimizing model performance, profiling, and bench-marking. Influence Google Cloud strategy at the intersection of infrastructure and AI/ML by advocating for enterprise customer requirements. Travel to customer sites and events as needed. Be responsible for business growth and workload acceleration on AI infrastructure products and solutions for GCP. Qualification : Bachelor's degree in Computer Science, Mathematics, a related technical field, or equivalent practical experience.
Senior Lead Engineer
Rtx Corporation
Overview: Collins Aerospace is looking for a talented Software Verification Lead Engineer to join the Navigation and Advanced Technology team. In this role, you will be responsible for performing validation and verification for critical avionics systems, focusing on protocols and applications like Maintenance, OMS, and Dataload. You will collaborate with senior developers and architects to design scalable, extensible, and sustainable solutions, while ensuring the highest standards of quality and performance. Primary Responsibilities: Avionics DAL A Product Verification: Verify avionics products in the CNS (Communication, Navigation, and Surveillance) domain, ensuring compliance with industry standards and customer requirements. Tool Development & Test Design: Develop common supporting tools necessary for development and verification activities, as well as create validation tests for avionics systems. Collaboration with Cross-functional Teams: Work closely with architects and senior developers to create scalable solutions, ensuring that new technologies are effectively integrated into the system architecture. CI/CD Pipeline Management: Build CI/CD pipelines and collaborate with the DevOps team to ensure streamlined deployments. Troubleshoot and resolve build issues while supporting deployment processes. Basic Qualifications: Education: BE/B.Tech/ME/M.Tech in Engineering. Experience: 6-8 years of experience in avionics systems and software development. Technical Skills: Proficiency in Python, C/C++, and Matlab/Simulink. Strong understanding of Avionics Systems/Software Architecture, including CNS, FMS, FCS, or Displays. Familiarity with DO-178B/C software standards. Avionics Domain Knowledge: Experience in Communication, Navigation, and Surveillance systems, including protocols for voice and data communications, satellite-based navigation, weather detection, traffic awareness, and collision avoidance. About Collins Aerospace: Collins Aerospace, a Raytheon Technologies company, is a global leader in aerospace and defense solutions. We offer advanced technology and services across a wide array of civil, military, and government missions. Our products are integral to the safety and efficiency of modern aviation, from emergency power systems to reliable cabin controls and quieter engines. Joining our team means being part of a mission-driven company that innovates every day to deliver safer, smarter, and more efficient aerospace systems. Collins Aerospace Diversity & Inclusion Statement: Diversity drives innovation, and inclusion drives success. At Collins Aerospace, we foster a culture that values diversity of thought and experience, which enables us to tackle the toughest challenges in our industry. We are committed to ensuring all employees have the opportunity to share their ideas and passions, paving the way for limitless possibilities. Benefits Package: Insurance: Group Term Life Insurance, Group Health Insurance, Group Personal Accident Insurance. Leave Entitlements: 18 days of vacation and 12 days of contingency leave annually. Employee Programs & Work-life Balance: Employee Scholar Program, work-life balance initiatives, car lease program, National Pension Scheme, Leave Travel Allowance (LTA), and meal vouchers. Additional Benefits: Fuel and maintenance/driver wages, and more! Ethical & Safety Commitment: Collins Aerospace prioritizes strong ethical practices and safety. All positions in India require a background check, which may include a drug screen (for operations positions). Why Collins Aerospace? At Collins Aerospace, we are redefining aerospace. Join our team and be part of a company that plays a critical role in modern flight, providing innovative solutions that enhance safety, efficiency, and the travel experience for millions of passengers worldwide. Qualification : BE/B.Tech/ME/M.Tech with Understanding of Avionics Systems/Software Architecture CNS, FMS, FCS or Displays.
Wlan Subsystem Design Lead (staff Eng)
Qualcomm
General Summary: Qualcomm CDMA Technologies (QCT) is the world s largest provider of wireless chipset technology, leading the way in 5G and Wi-Fi advancements. As an inventor-driven company, Qualcomm is committed to transforming industries and creating new possibilities through groundbreaking connectivity technologies. Qualcomm is currently seeking experienced WLAN Digital Designers for its Wireless R&D team in Bangalore. This role will involve designing next-generation WLAN chipsets and Wi-Fi subsystems, including Wi-Fi 6, 7, and 8 technologies. As part of the QCT Bangalore Wireless R&D HW team, you will be involved in sub-system architecture, RTL design, and its integration, contributing to industry-leading technologies in Wi-Fi connectivity for consumer devices such as hearables, wearables, and IoT applications. Key Responsibilities: Design and develop next-generation WLAN and micro-Wi-Fi subsystems for connectivity, hearables, wearables, and IoT chips. Work on ASIC designs using the latest technology nodes, understanding and executing all aspects of the VLSI development cycle, including architecture, micro-architecture, RTL design, and integration. Collaborate closely with Verification, SoC Design, Validation, Synthesis, and PD teams to achieve design convergence. Develop micro-architecture and implement designs in Verilog/SV. Integrate complex subsystems into SoCs. Perform various design checks and tool analyses using tools like Spyglass, RDC, CDC, PrimeTime, Synthesis, and more. Conduct post-silicon debug and work with cross-functional teams to resolve issues and optimize designs. Work independently on defined tasks, with minimal guidance, while maintaining a strong team-oriented approach. Required Skills and Experience: 8+ years of experience in digital front-end design for ASICs. Strong expertise in RTL coding using Verilog, VHDL, or SystemVerilog (SV) for complex designs, including those with multiple clock domains. Experience in low-power design methodology and clock domain crossing designs. Familiarity with various bus protocols like AHB and AXI. In-depth understanding of the RTL to GDS flow and experience interacting with DFT and PD teams. Experience in 802.11 (Wi-Fi) and wireless IP/subsystem design is a plus. Post-silicon debug experience is an added advantage. Strong documentation and communication skills to effectively interact with team members and management. Self-motivated with a teamwork-oriented attitude and the ability to work independently. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, Communications, or a related field, and 3+ years of Hardware Engineering or related work experience. Master s degree in the above fields and 2+ years of relevant experience, OR a PhD with 1+ year of related work experience.
Modem Hardware Modeling, Senior Engineer
Qualcomm Technologies
General Summary The Wireless R&D HW team in Bangalore is seeking experienced Wireless Modem Hardware Model Developers to work on Qualcomm s industry-leading chipset solutions, specifically focusing on modem WWAN IPs. This role involves contributing to flagship modem core IP development for 5G (NR) and 4G (LTE) technologies. Roles and Responsibilities Modem Development: Contribute to defining and developing next-generation multi-mode 5G modems. Hardware Model Development: Develop and verify hardware models for modem core IP using C++/SystemC. These models serve as golden references for RTL verification and pre-silicon firmware development (virtual prototyping). Hardware Microarchitecture: Understand and abstract hardware microarchitectures for accurate modeling. Technology Application: Work on wireless technologies such as NR, LTE, WLAN, and Bluetooth to enhance modem functionality. Signal Processing: Leverage expertise in digital signal processing to improve hardware modeling and design processes. Cross-Domain Expertise: Candidates with backgrounds in SW/FW development or DSP-based HW IP design/verification will also be considered. Required Skills and Qualifications Programming Skills: Proficient in C++ with exposure to SystemC, System Verilog, and/or MATLAB. Hardware Microarchitecture: Strong understanding of hardware microarchitectures and modeling abstraction. Wireless Technology: Working knowledge of physical layers in NR, LTE, WLAN, and Bluetooth. DSP Expertise: Experience in digital signal processing and its applications in hardware modeling or RTL design/verification. Collaboration Skills: Ability to work effectively within a multi-functional team. Preferred Experience Hands-on experience with HW modeling, design, or verification of IPs. Experience with firmware/software development in wireless IP. Technical knowledge of DSP-based HW IPs. Educational Requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience. Master's degree with 1+ year of relevant work experience. PhD in a related field. Why Qualcomm? Leading Innovation: Be part of a team developing cutting-edge wireless modem solutions for next-generation technologies. Diverse Opportunities: Gain exposure to multiple domains, including DSP, firmware, and hardware design. Global Impact: Contribute to solutions that drive connectivity and transform industries worldwide. Professional Growth: Work with industry leaders on groundbreaking projects with significant career development opportunities. Qualification : Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience.
Ip Logic Design Engineer
Intel Technology India Pvt Ltd
Job Description Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs Participates in the definition of architecture and microarchitecture features of the block being designed Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features Supports SoC customers to ensure high quality integration and verification of the IP block Drives quality assurance compliance for smooth IP SoC handoff Qualifications Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience Expertise in microarchitecture, design, development, and integration of design blocks (IP) for system-on-chip (SoC) components Knowledge of Power management is preferred. Experience with formal apps would be good. Expertise in Verilog and System Verilog-based logic design. Expertise in Verilog and System Verilog-based logic design Experience in synthesis flow and timing closure, CDC, FEV. Knowledge of Python, Perl is a must Knowledge of considerations for performance, power, and cost optimization is desirable. Knowledge of formal property verification using Jasper is preferred Demonstrate excellent Self-motivation, communication, strong problem solving, and teamwork skills Set aggressive goals and meet/beat the commitments Flexible enough to work in a dynamic environment and multitask seamlessly. Ability to work independently and in a team Knowledge in IPs like I2C, I3C, SPI, UART, etc. is preferred. Experience in the field of Dfx (ATPG coverage, SCAN insertion, VISA insertion, etc.) will be an added advantage Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience
Cpu Circuit Design Engineering Manager
Intel Technology India Pvt Ltd
Job Description: We are looking for an experienced CPU Circuit Design Engineering Manager to lead and manage Intel's cutting-edge CPU design projects. As part of a world-class team, you will oversee a group of engineers working on complex circuit designs, driving the development of Intel s most advanced CPUs. You will play a pivotal role in shaping the architecture and ensuring the high performance, power efficiency, and reliability of next-generation processors. Key Responsibilities: 1. Team Leadership and Development: Lead, mentor, and develop a team of talented circuit design engineers. Oversee all aspects of CPU circuit design, from initial conceptualization to post-silicon validation. Foster an environment of innovation, excellence, and collaboration. 2. Design Execution and Methodology: Manage the design, implementation, and validation of high-performance CPU circuits, including critical components like logic circuits, clock distribution, and power management. Drive the adoption of best practices and state-of-the-art design methodologies to ensure efficient design execution. Ensure that the designs meet Intel s performance, power, and area (PPA) targets. 3. Cross-functional Collaboration: Collaborate closely with cross-functional teams including architecture, layout, validation, and manufacturing to ensure a seamless transition from design to silicon. Communicate effectively with senior management and other stakeholders to drive the successful delivery of CPU designs. 4. Process and Efficiency Improvement: Continuously work on improving design processes, tools, and methodologies to optimize efficiency and reduce time-to-market. Implement strategies to mitigate design risks, enhance quality, and maintain high standards across all CPU designs. 5. Performance, Power, and Area Optimization: Ensure the CPU circuits are designed to meet optimal power, performance, and area (PPA) goals. Collaborate with other teams to ensure that design specifications align with broader product requirements. 6. Innovation and Strategy: Stay abreast of industry trends, new technologies, and cutting-edge circuit design techniques. Lead efforts to incorporate new circuit design innovations into Intel s CPU development pipeline. Qualifications: Minimum Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in CPU circuit design, with at least 5 years in a leadership role. Proven track record of successfully leading complex CPU circuit design projects from concept to implementation. Strong understanding of circuit design principles, including logic design, timing, power, and signal integrity. Preferred Qualifications: Experience with advanced semiconductor process technologies (e.g., 7nm, 5nm, or lower nodes). Expertise in tools for circuit design, simulation, and analysis (e.g., Cadence, Synopsys). Knowledge of high-performance CPU architecture and chip design. Strong problem-solving skills and the ability to work under pressure in a fast-paced environment. Excellent communication and interpersonal skills, with experience working in a cross-functional and global environment. Inside this Business Group: The Core and Client Development Group (C2DG) is at the heart of Intel s product development, creating the next generation of CPU architectures and technologies. The group is responsible for driving Intel's leadership in the computing industry, delivering high-performance processors that power both client and server markets. Equal Opportunity Employer: Intel is an equal opportunity employer and considers all qualified applicants for employment without regard to race, color, religion, sex, national origin, age, disability, veteran status, or any other characteristic protected by local law. Qualification : You must possess a Masters Degree in Electrical or Computer Engineering with atleast 10 or more years of experience in related field or a Bachelors Degree with atleast 12 years of experience.
Cpu Logic Design Engineer
Intel Technology India Pvt Ltd
Job Description You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. As part of Intel Core RTL Design Team,your Roles and Responsibilities include : Understand feature specification from Architects and implement the Core feature independently. Prepare micro architectural specification document. Ensure quality of RTL while meeting Power, Performance and Security requirements of the design. Work closely with Validation team, review the test-plans. Work with Back-end team and evaluate the design implementation approaches between Area, timing, and power. Drive feature/design topic-based forums, evaluate options, and provide recommendations to Management. Qualifications Candidate must possess a master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's degree with at least 9 years of experience in RTL Design.Preferred Qualifications: Good understanding of Digital Design Principles and x86 Core processor architecture. Understanding of interaction of computer hardware with Firmware/Software is a plus. Experience in the domain of Power Management, Execution Unit, Cache, and memory features is a plus. Good knowledge of Verilog/System Verilog language is a must. Experience with Static tools (UPF, lint, integration, CDC, RDC) is preferred. Candidate should demonstrate excellent Self-motivation, effective communication, problem solving, excellent cross-site communication and teamwork skills. Inside this Business Group The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core , and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Candidate must possess a master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's degree with at least 9 years of experience in RTL Design.
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