Basic Electrical Systems Jobs in Bengaluru

Position: Control Design Lead Department: Automation Department Reporting To: Senior Manager - Automation Location: Bengaluru Key Responsibilities Project Involvement: Actively participate in the Preliminary Stage Meeting (PSM) to evaluate existing sites, equipment, components, processes, and collaborate with customer representatives alongside the Project Leader (PL). System Requirements: Work closely with the PL to understand mechanical and application system requirements and ensure they align with project objectives. Control System Design: Design complete electrical and control systems, including: Wiring diagrams Panel diagrams Flowcharts of operational sequences (CNC & PLC) Operating logic, I/O assignments, sequence of operation, error & exception conditions, and safety interlocks. Program Development: Develop CNC/Robot programs, HMI, and PLC ladder logic based on project needs. Design Documentation: Prepare DAP (Design Approval Package) drawings in accordance with the provided checklist. Ensure the creation of detailed Bill of Materials (BOM) and Critical Bought Out Material (CBOM) lists, adhering to target costs. Release panel and machine wiring diagrams for manufacturing. Generate and track micro-schedules and sub-milestones in design activities to meet timelines. Design Review & Compliance: Review designs individually or with a competent team for correctness, completeness, and suitability, ensuring compliance with application-specific checklists. Proactive Project Support: Provide support during the build, testing, and trials. Address design modifications and handle User Requirement Change Requests (UCR), System Change Requests (SCR), and Engineering Change Requests (ECR). Documentation and Manuals: Develop panel layouts, field wiring diagrams, and basic user manuals (including startup/shutdown sequences, diagnostics, and programmed cycles). Collaboration: Work closely with assembly and design engineers to guide and support throughout the design and manufacturing phases. Skills and Expertise PLC Programming: Expertise in PLC code development with experience in multi-PLC systems (e.g., AB, Siemens, Mitsubishi, etc.). Motion Control Systems: Experience with motion control and CNC Gantry GCode software development. User Interface Development: Ability to design and develop user interfaces for operational ease. System Design: Proficiency in flowchart creation and application development. Professional Expertise: Experience in control systems including CNC, PLC, robotics, drives, servo systems, HMI, IoT, etc. Qualifications Essential: Bachelor s degree or Diploma in Electrical, Mechatronics, Instrumentation, or related fields. Experience: 6-10 years total professional experience. 3-6 years of relevant experience in control system design, automation, or related fields. Qualification : Bachelors degree or Diploma in Electrical, Mechatronics, Instrumentation, or related fields

After Sales Engineer Location: Bangalore Department: Service & Support Role Summary Fracktal Works is seeking a committed and technically skilled After Sales Engineer to join our support team in Bangalore. This role is crucial in delivering a high-quality post-sales experience through equipment servicing, preventive maintenance, troubleshooting, and customer interaction. Candidates should have a solid understanding of electromechanical systems and be comfortable working hands-on in dynamic environments. Education & Experience Education: ITI or Diploma in Electrical, Electronics, or Mechanical Engineering Experience: 1 3 years in servicing 2D/3D printers, SPM machines, or similar electromechanical systems Key Responsibilities Perform installation, repair, servicing, and preventive maintenance of 3D printers and related electromechanical equipment. Troubleshoot and resolve basic electrical, electronic, and mechanical issues in the field or remotely. Maintain and update service documentation, reports, and customer records. Use basic 3D modeling tools such as AutoCAD or Fusion 360 for component understanding and communication. Build and maintain positive customer relationships to ensure high satisfaction and repeat business. Manage service tickets and turnaround times using tools like Zoho Desk. Be willing to travel for on-site customer support across locations. Coordinate with internal teams for spare parts, technical escalation, and service planning. Ensure proper communication with customers regarding service status, preventive maintenance schedules, and equipment health. Required Skills & Qualifications Proven experience working with electromechanical systems (preferably in 2D/3D printing or SPM equipment). Basic knowledge of electrical and electronic systems, and mechanical components. Strong troubleshooting skills and a methodical approach to diagnosing issues. Familiarity with CAD software like AutoCAD or Fusion 360. Good verbal and written communication skills. Ability to manage tasks independently, handle customer interactions professionally, and maintain service quality standards. At Fracktal Works, you ll be part of a fast-growing company at the forefront of 3D printing technology. As an After Sales Engineer, you ll play a key role in ensuring our customers receive outstanding support and performance from our products, helping drive long-term satisfaction and trust. Qualification : Diploma in Electrical, Electronics, or Mechanical Engineering

Distinguished Engineer Machine Learning Engineering Location: Bangalore Company: Capital One India About Us At Capital One India, we re redefining how technology powers financial services. Our teams work in a fast-paced, intellectually rigorous environment to tackle complex business challenges at scale. By harnessing the power of advanced analytics, data science, and machine learning, we create innovative, patentable solutions that transform customer experiences and drive the business forward. Team Overview: Machine Learning Experience (MLX) The MLX team leads Capital One s mission to build scalable, well-managed ML systems and platforms. We empower teams across the enterprise to develop, govern, and deploy machine learning models efficiently, securely, and at scale. From automated model governance to observability platforms, MLX enables end-to-end ML lifecycle management laying the foundation for AI-driven innovation across the organization. Role Overview We re looking for a Distinguished Engineer Machine Learning Engineering to join our MLX team. In this high-impact role, you'll architect and implement the platforms and tools that support model observability, automated governance, and ML model deployment at scale. This is an opportunity to drive enterprise-wide innovation and shape how ML is integrated into Capital One s core business systems. What You ll Do Design and build systems that capture and analyze large-scale model and feature metadata, including training metrics and runtime performance, to power model observability and governance automation. Partner with cross-functional teams including product managers, designers, and platform engineers to create scalable solutions that accelerate ML model lifecycle management. Lead efforts to enable automated governance decisions for ML models, ensuring compliance, auditability, and operational integrity. Architect and implement high-performance data pipelines that feed ML models with real-time and batch data. Contribute to the design and implementation of cloud-native ML systems using tools such as AWS, Kubernetes, and Terraform. Write clean, scalable, production-grade code in languages like Python, Go, or Java. Implement CI/CD pipelines, testing frameworks, and monitoring systems for ML applications. Drive the adoption of best practices in ML Ops, observability, and platform resilience. Basic Qualifications Master s Degree in Computer Science or related field. 15+ years of experience in software engineering or solution architecture. 10+ years building data-intensive, distributed computing systems. 10+ years programming in Python, Go, or Java. 8+ years of hands-on experience with industry-leading ML frameworks (e.g., Scikit-learn, TensorFlow, PyTorch, Dask, Spark). Preferred Qualifications PhD or Master's in Computer Science, Electrical Engineering, Mathematics, or related field. 5+ years of experience building, scaling, and optimizing production ML systems. Deep expertise in data preparation, feature engineering, and ML pipeline optimization. 10+ years writing performant, maintainable, and resilient production code. Strong experience deploying ML solutions on public cloud platforms (AWS, Azure, GCP). Expertise in distributed systems, file systems, or multi-node databases. Open-source contributor to ML tools or libraries. Published work in ML (papers, patents, blogs, etc.). 5+ years of experience in ML Ops (using MLflow, TFX, Kubeflow, etc.). Experience with LLMs and Generative AI applications (open-source or commercial models). Proven experience designing production-ready observability platforms for ML applications. Be at the forefront of building scalable, secure, and enterprise-grade ML platforms. Shape the future of AI and ML adoption in a top-tier financial institution. Collaborate with world-class engineers and data scientists. Solve real-world problems with high business impact. Thrive in a diverse, inclusive, and innovation-focused culture. Qualification : PhD or Master's in Computer Science, Electrical Engineering, Mathematics, or related field

Job Title: Industrialization Engineer Location: Bengaluru, India Experience Required: 5 10 years Industry: Electronics / Electric Vehicles Employment Type: Full-time Company: Ultraviolette Automotive Pvt Ltd Join the Charge. Create the Future. At Ultraviolette, we are redefining mobility. From building India s fastest electric motorcycle to developing the world s most advanced electric scooter, we thrive on innovation, bold thinking, and performance that thrills. We're a diverse, passionate team of engineers, designers, and creators united by one mission: to build machines that are not only sustainable, but exhilarating. If you re driven by purpose and ready to shape the future of mobility, this is your moment. Role Overview: We are looking for a technically strong and hands-on Industrialization Engineer (Electronics) to lead the transition from R&D prototypes to scalable, high-quality mass production. In this cross-functional role, you will work at the intersection of design, manufacturing, sourcing, and embedded systems, ensuring our products are built for scale, reliability, and performance without compromising innovation. Key Responsibilities: Technical Ownership & Industrialization: Lead industrialization from EVT (Engineering Validation Test) to DVT (Design Validation Test) and PVT (Production Validation Test), up to mass production. Translate R&D designs into production-ready documentation (BOMs, Gerbers, PCBA specs, test jigs, etc.). Conduct Design for Manufacturability (DFM) and Design for Testability (DFT) reviews. Own ramp-up metrics such as yield, test coverage, defect trends, and field return analysis. Collaborate with R&D teams on thermal design, layout optimization, and component derating strategies. Ensure compliance with voltage isolation, creepage/clearance, and relevant safety standards. Supplier & EMS Collaboration: Act as a technical bridge between internal teams and EMS vendors, ensuring alignment from design to execution. Coordinate with EMS on NPI builds, process validation, line setup, and FAI (First Article Inspection). Support firmware flashing, version control, and hardware-software integration testing at production lines. Assist in troubleshooting mechanical, electrical, or firmware-related issues during production. Component Engineering & Cost Optimization: Evaluate and qualify alternate components and suppliers. Drive cost engineering and BOM optimization without compromising on quality. Engage in component lifecycle management and ensure availability through the production lifecycle. Required Qualifications & Skills: B.E./B.Tech in Electronics, Electrical, or related field 5 10 years experience in hardware industrialization, preferably in EV or electronics manufacturing Strong knowledge of PCB design reviews, SMT/PCBA processes, and box build Hands-on with tools like Altium, OrCAD, or similar for PCB-level evaluations Experience with ICT/FCT test setups, test fixture design, and test station validation Basic embedded systems understanding firmware flashing, serial log analysis, GPIO testing Experience working directly with EMS vendors, test labs, and component suppliers Excellent cross-functional communication skills Willing to travel to EMS or supplier sites for builds and validation Nice to Have (Preferred): Familiarity with FMEA, APQP, PPAP, ISO/IATF 16949 processes Knowledge of compliance and safety standards (e.g., IEC, ISO 26262) Background in value engineering, cost-down programs, and process audits Work on industry-defining EV products with world-class engineering challenges Collaborate with cutting-edge R&D and manufacturing teams Be part of a mission-led company that s changing the landscape of mobility A workplace culture that values ownership, audacity, and excellence Apply now and be a part of something bigger. Let s create the future together. Qualification : B.E./B.Tech in Electronics, Electrical, or related field

Customer Support Engineer (CSE) Department: Technical Location: Bangalore Job Description The Customer Support Engineer (CSE) will be responsible for the maintenance, troubleshooting, and repair of Stratasys 3D printing equipment to ensure high customer satisfaction. This role involves direct interaction with customers, managing service calls, and maintaining equipment to the highest standards while following established procedures. Key Responsibilities Perform basic troubleshooting, installation, maintenance, and repair of Stratasys 3D printing equipment. Complete scheduled Preventative Maintenance and implement field modifications as required. Escalate unresolved technical issues to OEM teams following standard procedures. Maintain accurate and timely service logs, customer records, and internal documentation. Communicate regularly with customers to provide updates, resolve issues, and ensure proper follow-up. Ensure all tools and test equipment are properly maintained and calibrated. Adhere to Health and Safety regulations and other applicable regulatory requirements. Identify and support sales opportunities including new contracts, renewals, and system sales. Manage multiple open service issues efficiently, prioritizing tasks effectively. Requirements Educational Qualification: BE/B.Tech in Electrical Engineering or Mechanical Engineering. Diploma with 3+ years of experience servicing and operating 3D printing machines. Experience: Minimum of 3 years in a customer support or technical service role, preferably with experience in 3D printing equipment. Skills: Strong technical troubleshooting and problem-solving skills. Excellent communication and customer service abilities. Ability to manage multiple tasks and prioritize effectively. Qualification : BE/B.Tech in Electrical Engineering or Mechanical Engineering

Job Title: System Engineer Job Type: Full-Time Location: Bangalore Experience Required: 2 3 Years Education: B.E / B.Tech in Electronics & Communication (ECE), Electrical & Electronics (EEE), or Instrumentation Job Summary: We are looking for a motivated System Engineer with a foundational understanding of RF systems and hands-on experience working with electronic hardware. The ideal candidate should be capable of interpreting schematics and working with standard lab equipment to support system integration and validation tasks. Key Responsibilities: Assist in the design, testing, and validation of RF-based systems. Interpret and analyze hardware block diagrams and schematics. Support schematic reviews and perform basic schematic design activities. Operate and utilize test equipment such as spectrum analyzers, multi-meters, and oscilloscopes. Work on basic concepts of acquisition and tracking, especially in systems like GPS satellite receivers. Collaborate with the hardware and system teams to support integration, debugging, and testing activities. Required Skills & Qualifications: Educational background in ECE, EEE, or Instrumentation. Basic knowledge of RF systems and principles. Familiarity with electronic schematics and hardware block diagrams. Ability to use electronic test instruments (Spectrum Analyzer, Oscilloscope, Multi-Meter). Understanding of GPS signal acquisition and tracking is a plus. Good communication skills and willingness to learn and grow in a technical environment. Qualification : B.E / B.Tech in Electronics & Communication (ECE), Electrical & Electronics (EEE), or Instrumentation

Junior Engineer - Distributed Control Systems (DCS) Location: Bengaluru Experience: 0 - 2 Years Openings: 1 About the Role: As a Junior DCS Engineer, you'll report to the Assistant Manager Engineering Services. Your primary purpose will be to support the complete product lifecycle for DCS applications, focusing on software application development, hardware programming, and crucial commissioning and testing activities. This is a hands-on technical role ideal for someone looking to build their expertise in industrial automation, requiring both analytical skills and a readiness to travel. What You'll Do: HMI Graphic Development: Develop and design Human-Machine Interface (HMI) graphics for DCS systems, ensuring intuitive and effective user interfaces. DCS Software Development: Assist with and learn to develop and program software applications for Distributed Control Systems, with a focus on ABB 800xA. System Programming & Commissioning: Participate in the programming, commissioning, and testing of 800xA systems on-site, gaining practical experience in live environments. Project Lifecycle Support: Support the team across the entire project lifecycle, from initial software development through to final commissioning. Travel: Be prepared to travel to customer sites across India for commissioning activities as needed. What We're Looking For: Educational Qualification: A Bachelor's degree in Electrical and Electronics Engineering (EEE), Instrumentation, Electronics, or Electronics & Communication. Experience: Candidates with 0-2 years of experience in industrial automation, control systems, or relevant project work will be considered. Technical Skills: Good analytical skills to understand and troubleshoot system functionalities. An understanding of the complete project lifecycle from software development to commissioning, especially in ABB 800xA, is highly beneficial. Willingness to learn and grow in a technical environment. Software Proficiency: Strong knowledge of Microsoft Office, Excel, and PowerPoint. Communication: Strong communication skills in English for effective internal and external interactions. Physical Requirements: Must be physically fit and willing to travel to customer locations across all regions of India. If you're a recent graduate or early-career engineer with a passion for DCS systems and eager to launch your career in industrial automation, we encourage you to apply! Qualification : A Bachelor's degree in Electrical and Electronics Engineering (EEE), Instrumentation, Electronics, or Electronics & Communication

Job Title: Junior Engineer Mechanical Design (Industrial Automation Projects) Reports To: Senior Engineer Mechanical Design Job Purpose To assist in the design and drafting of Special Purpose Machines (SPMs) and industrial automation systems by supporting the mechanical design team in converting concept designs into detailed manufacturing drawings. Key Responsibilities Support the mechanical design team in developing detailed mechanical designs from initial concepts. Prepare accurate manufacturing and assembly drawings for industrial automation systems and SPMs. Collaborate with cross-functional teams to ensure design intent and manufacturability. Revise and update designs based on feedback and design improvements. Qualifications & Skills Education: B.E. in Mechanical Engineering OR Diploma in Tool & Die Making (NTTF) OR Diploma in Mechanical Engineering with relevant experience Technical Knowledge: Basic understanding of mechanical and manufacturing engineering principles Familiarity with machining processes Fundamental knowledge of pneumatic and hydraulic systems Software Skills: Basic proficiency in 3D CAD tools such as SolidWorks, Solid Edge, or similar Working knowledge of Microsoft Office tools (Word, Excel, PowerPoint) Communication: Strong communication skills in English Experience: 0 1 year of experience in the machining or manufacturing industry A strong desire and aptitude to grow into a mechanical design role

Senior Memory Design Engineer Company Arm Location Noida, India Job Description This opening is for a Senior Memory Design Engineer in our PHYSICAL IP MEMORY group in Noida. We work on innovative memory architectures in leading-edge technology nodes to enable the best Arm Systems across all markets. As a memory design professional, this position is a rare opportunity to work with our successful circuits, characterization, and layout team, and gain a deep understanding of memory usage in SoCs based on Arm cores. You will discover a wide variety of circuit innovations while working on different types of memories in cutting-edge process technologies. Responsibilities In this role, you will be working in the following areas: Work on memory architecture development in the latest technologies. Transistor-level full-custom design and collaboration with the physical design team for layout realization. Develop new design features and perform circuit/layout optimizations to meet Performance, Power, and Area targets. Lead memory design verification and characterization activities. Ensure high-performance memory designs with the lowest possible power, as needed for Arm CPUs, GPUs, and SOCs. Required Skills and Experience 5-8 years of proven experience in memory design. Strong interest and command of basic electronics (Diodes, RC Circuits, CMOS, etc.). Solid understanding of digital electronics fundamentals (Flip-Flops, Latches, Decoders, Multiplexers). Understanding of setup and hold time concepts. In-depth knowledge of memory fundamentals, especially single-port SRAM: Circuit design (Bitcell, WL decoder, Sense Amp, Self-time, Assist, Low power features, DFT features). Good understanding of technology trade-offs in deep sub-micron technologies. Self-motivated, hardworking, and positive outlook. Strong organizational skills with attention to detail. Nice-to-Have Skills and Experience Understanding of advanced process technology nodes and memory product layout implementation. Experience with shell scripting, machine learning (ML), and automation. Knowledge of statistical simulations (e.g., Monte Carlo). What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, and meritocratic workplace where everyone can grow and succeed, we encourage our people to make exceptional contributions to Arm's success in the global marketplace. Accommodations at Arm If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. By sending the requested information, you consent to its use by Arm to arrange appropriate accommodations. All accommodation requests will be treated with confidentiality, and information will only be disclosed as necessary to provide the accommodation. Examples of support include breaks between interviews, having documents read aloud, or office accessibility. Hybrid Working at Arm Arm s hybrid working approach is designed to create an environment that supports both high performance and personal wellbeing. We believe in bringing people together face-to-face to enable faster work while recognizing the value of flexibility. Hybrid working patterns depend on team and role requirements, which will be discussed upon application. Some flexibility might be limited by legal, regulatory, tax, or other considerations. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to fostering an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Job Description Intel is seeking an experienced Systems Engineer to drive the design, development, and integration of hardware, firmware, and software solutions for Xeon-based platforms. The role focuses on system architecture, performance optimization, and technical risk assessment while ensuring scalability, reliability, and security in system implementations. The ideal candidate will work on customer-centric solutions, influencing next-generation system design and conducting proof-of-concept experiments to validate new features and technologies. Key Responsibilities: System Architecture & Design: Define, develop, and optimize end-to-end solutions integrating software, firmware, board, and silicon/SoC components. Customer-Centric Solutions: Translate business opportunities into use cases, develop product specifications, and implement solutions based on customer needs and system limitations. Performance & Reliability Optimization: Conduct design analysis, assess technical risks, and optimize for security, scalability, and maintainability. Hardware Validation & Debug: Perform schematic reviews, layout verification, mechanical/thermal analysis, and electrical validation (including Signal Integrity (SI) analysis). System Integration: Ensure smooth hardware-software integration, identifying and resolving hardware issues at the component and system levels. Lab-Based Proof-of-Concept Testing: Conduct real-life environment simulations, prototype testing, and performance benchmarking. Documentation & Knowledge Sharing: Develop technical documents, customer presentations, and training materials to enhance internal and external knowledge sharing. Industry Research & Collaboration: Engage in academic and industry research, driving innovation beyond existing solutions. Qualifications & Experience: Educational Requirements: B.E/B.Tech in Electronics & Communication, Computer Science, or a related field. Minimum of 10 years of relevant industry experience. Technical Expertise: Experience in Xeon platform hardware design and validation. Strong knowledge of schematics, PCB layout, mechanical, and thermal analysis. Experience with electrical validation, signal integrity (SI), and power integrity (PI) analysis (desirable). Expertise in hardware issue validation, debugging, and system integration. Strong problem-solving and analytical skills for complex, multi-layered system architectures. Excellent technical documentation and presentation skills. About Intel Validation Engineering (iVE) Group: The Intel Validation Engineering (iVE) Group plays a pivotal role in Intel s technology leadership, validating, debugging, and optimizing Intel s cutting-edge designs. iVE ensures that Intel's next-generation products meet the highest quality standards, enabling Intel to deliver world-class technology platforms. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a top-tier compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.E/B.Tech in Electronics & Communication, Computer Science, or a related field.

About Ansys For over 50 years, Ansys has been at the forefront of innovation, enabling companies across industries to push boundaries through the predictive power of simulation. From sustainable transportation to life-saving medical devices, our solutions help bridge the gap between design and reality. At Ansys, we empower our employees to turn visionary ideas into reality. Join us and shape the future of simulation technology! Role Overview As a Senior R&D Engineer, you will join the SeaScape Research and Development team, working on cutting-edge semiconductor analysis software. You will contribute to the development of ANSYS RedHawk-SC, the industry s first EDA solution built on the SeaScape Elastic Compute Architecture, designed to handle massive datasets and distributed computing. This role requires strong C++ programming skills, problem-solving abilities, and a solid foundation in semiconductor design. Key Responsibilities Software Development & Optimization Design, develop, and optimize high-performance software for semiconductor analysis. Write efficient, scalable, maintainable, and robust code in C++. Implement unit, regression, and system-level tests to ensure high-quality code. Diagnose and fix complex software issues. Collaboration & Process Adherence Work closely with technical leads, engineers, and managers to refine and improve solutions. Learn and follow best practices in software engineering and semiconductor design. Communicate effectively within the team to ensure smooth collaboration. EDA & Semiconductor Analysis Develop expertise in IC Layout specification formats (Oasis, GDS). Work on parasitic extraction, gate/transistor-level design, and power analysis. Optimize EDA software for large-scale simulations and distributed computing. Required Qualifications & Skills Education & Experience: Bachelor s or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field. 4-6 years of experience in a product-based company. Technical Expertise: Proficiency in C++ for high-performance computing. Strong knowledge of data structures, algorithms, and debugging. Experience working with Linux operating systems. Basic understanding of IC layout specifications (Oasis, GDS). Familiarity with gate-level and transistor-level electronic design. Soft Skills: Ability to learn quickly and work in a fast-paced environment. Strong problem-solving skills and attention to detail. Excellent communication and teamwork skills. Preferred Qualifications (Nice to Have) EDA & Semiconductor Analysis: Experience with parasitic extraction for advanced semiconductor nodes. Knowledge of transistor-level simulation and gate-level power analysis. Familiarity with IC physical design and RTL optimization. High-Performance Computing & Distributed Processing: Experience with distributed processing, debugging, and optimization. Knowledge of AI/ML, GPU architectures, CUDA, and vectorization libraries (Google Highway). Experience with high-bandwidth networking (InfiniBand). Software Development & Automation: Experience in commercial software development, build automation, and testing. Work on Industry-Leading Technology Build next-gen EDA and semiconductor simulation software. Career Growth Be part of an innovative, research-driven environment. Collaborate & Innovate Work alongside industry experts in high-performance computing & semiconductor analysis. Inclusive & Diverse Culture We believe diverse thinking leads to better outcomes. At Ansys, we commit to excellence, integrity, and innovation Together, we power the future of simulation. Apply Now & Be a Part of Ansys' Innovation Journey!

We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

Job Description and Requirements Synopsys is seeking a creative and talented engineer to fill a FPGA Design & Verification role in Bengaluru, India. The environment presents stimulating, challenging, and rewarding work within an excellent work environment with positive career development opportunities. About the Role The FPGA Design and Verification IP Prototyping team is responsible for building FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs and testing them to verify compliance with leading-edge industry standards. We play a vital role in supporting Synopsys IP business by validating key features and mitigating potential ASIC faults early in the prototyping phase. Responsibilities Design, implement, and verify FPGA-based systems for a variety of applications Validate FPGA-based IP prototypes against real-world devices, test equipment, and other hardware systems Create and maintain comprehensive technical documentation Develop and execute test plans and routines Detect, troubleshoot, debug, and investigate potential ASIC issues early on Collaborate with cross-functional teams, internal and external customers Key Qualifications Bachelor's or Master's degree in Electrical Engineering 1+ years of experience in FPGA design and development Design and simulate integrated circuitry using Verilog, SystemVerilog, and VHDL Familiarity with industry-standard interfaces and protocols such as AMBA AXI, APB, I2C, and SPI Expertise with scripting languages such as Tcl, Python, Perl, and Bash Proven problem-solving skills and ability to work in a collaborative team environment Excellent verbal and written communication skills in English Preferred Experience Familiarity with SCM tools like Git Experience with FPGA development tools such as Vivado or Altera Quartus Familiarity with laboratory equipment such as oscilloscopes and data analyzers Knowledge of the MIPI-I3C protocol Understanding of computer architecture and operating systems Qualification : Bachelor's or Master's degree in Electrical Engineering

General Summary: Qualcomm is the industry leader in integrated chipsets that power advanced mobile devices. We are expanding our expertise in wireless technologies and advanced multimedia capabilities to continue delivering high-performance multimedia systems with low power consumption and competitive cost, while maintaining strong feature differentiation. Join Qualcomm India s Multimedia Systems Team and work at the cutting edge of performance modeling, system architecture, and evaluation of camera, video, and computer vision hardware IPs. This role offers the chance to collaborate on image signal processors (ISP), video codec hardware, and advanced algorithms for computer vision and image/video processing. Key Responsibilities: As part of the Systems and R&D team, your responsibilities may include the following: Design and maintain transaction-accurate/static models for multimedia IPs. Perform performance validation and debugging for pre- and post-silicon platforms. Conduct architecture analysis for system performance optimization. Define use-case flows for multimedia applications. Understand product features and assess their impact on system performance. Collaborate with the product marketing team to recommend feature support configurations for specific system setups. Minimum Qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or a related field with 4+ years of relevant experience, or Master s degree with 3+ years of experience. Strong analytical and problem-solving skills with implementation experience. Solid understanding of SoC infrastructure (NoC, Memory Controller, DDR, QoS, MMU). Systems mindset with a focus on power and performance optimization. Experience in performance modeling/verification and debugging system performance issues. Proficiency in C, SystemC, and familiarity with UNIX/Win/Linux computing platforms. Preferred Qualifications: Background in system architecture, hardware IP micro-architecture, or embedded software/firmware. Experience in image/video signal processing. Knowledge of image sensor technology and codec standards. Educational Requirements: Required: Bachelor s degree in Computer Science or Electrical & Computer Engineering. Preferred: Master s degree in a related field. Qualification : Bachelors in Computer science or Electrica

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...