Chip Design Architecture Jobs in Bengaluru

Technical Manager Location: Bengaluru Hiring is still weighed down by outdated processes manual screening, unconscious bias, and heavy administrative overhead. Talview is changing that with GenAI-powered hiring and assessment platforms that make recruitment faster, fairer, and scalable. We help organizations focus on what truly matters: finding exceptional people. Our AI Products Alvy: The world s first AI Proctoring Agent for intelligent global exam monitoring. Ivy: A conversational AI Interviewer transforming first-round screenings. Impact: 10M+ assessments delivered across 120+ countries for global enterprises. The Role We re looking for a Technical Manager who thrives at the intersection of technical depth, architectural ownership, and people leadership. You will lead high-performing engineering teams, guide complex architectural decisions, and partner with product leadership to deliver enterprise-grade, AI-driven products. What You ll Do Lead & Mentor: Guide frontend, backend, and QA engineers to deliver high-impact features. Architectural Evolution: Ensure performance, scalability, security, and resilience across platforms. Product Strategy: Partner with Product and Design to translate business needs into technical roadmaps. Engineering Excellence: Set standards for code quality, testing, CI/CD, and observability. Talent Development: Conduct 1:1s, provide feedback, and coach engineers through career progression. Requirements Experience: 8+ years in software development with 2+ years in engineering leadership. Tech Stack: Strong full-stack background in JavaScript/TypeScript, React, Node.js, Java, or Python. Cloud & API: Hands-on experience with AWS, Azure, or GCP and REST/GraphQL APIs. Architecture: Deep understanding of microservices, system design, and distributed systems. Databases: Proficiency in SQL and NoSQL environments. Bonus Points Experience building and scaling SaaS products. Practical understanding of AI/ML concepts and applications. Experience with AI-assisted coding tools (Cursor, Windsurf, Codex, etc.). Our Culture: The 5Cs We are driven by Collaboration, Commitment, Credence (trust), Customer-centricity, and Candor. We ship quality, trust each other, and communicate openly. What You Get Competitive compensation and best-in-class hardware/software. Work-Life Balance: 5-day work week with flexibility. Perks: Fully stocked pantry, gourmet coffee, monthly team lunches, and annual offsites. Growth: Accelerated career growth in a fast-scaling product organization.

Engineering Manager Location: Bengaluru Hiring is still shaped by outdated processes manual screening, unconscious bias, and delayed feedback. Talview is transforming this with AI that actually works. We build GenAI-powered hiring and assessment platforms that make recruitment faster, fairer, and scalable. Our AI Products Alvy: The world s first AI Proctoring Agent for intelligent global exam monitoring. Ivy: A conversational AI Interviewer delivering unbiased first-round assessments. Impact: 10M+ assessments delivered across 120+ countries. The Role We re looking for an Engineering Manager to lead high-performing teams, drive architectural excellence, and deliver scalable products globally. You ll guide engineers across backend, frontend, QA, and DevOps, while partnering closely with Product and Design to drive meaningful outcomes. What You ll Do Leadership: Lead, mentor, and grow cross-functional engineering teams. Architecture: Own architecture and system design for cloud-native, distributed systems. Excellence: Champion code reviews, testing, automation, and security practices. Operations: Strengthen engineering processes including CI/CD, observability, and monitoring. Delivery: Own delivery outcomes, sprint planning, and team performance. People: Conduct 1:1s, performance reviews, and career development planning. You Might Be a Fit If You Have Required Qualifications: 6+ years of overall engineering experience; 5+ years in backend (Node.js, Go, or Python). 2+ years with Docker, Kubernetes, and public cloud platforms (AWS, GCP, or Azure). 2+ years in Agile delivery environments (Scrum, Squads, or Chapters). 1+ year experience managing a team of 4+ engineers. Deep understanding of cloud monitoring, deployments, and cost optimization. Bonus Points For: Building SaaS or high-scale distributed systems. Experience with AI-assisted coding tools (Cursor, Windsurf, Codex, etc.). Strong system design and architectural fundamentals. Our Culture: The 5Cs We are guided by Collaboration, Commitment, Credence (trust), Customer-centricity, and Candor. We work together, ship quality, and communicate openly. What You Get Competitive compensation and best-in-class hardware. 5-day work week with flexibility. Monthly team lunches and annual offsites. Accelerated growth in a fast-scaling product organization.

Associate Staff Frontend Engineer Location: Bengaluru Hiring is still constrained by outdated processes manual screening, unconscious bias, and heavy administrative work. Talview is changing that with AI that actually works. We build GenAI-powered hiring and assessment platforms that make recruitment faster, fairer, and scalable. Our AI Products Alvy: The world s first AI Proctoring Agent for intelligent global exam monitoring. Ivy: A conversational AI Interviewer delivering unbiased first-round assessments. Impact: 10M+ assessments delivered across 120+ countries. The Role We re looking for an Associate Staff Frontend Engineer who combines deep technical expertise with frontend leadership. You ll shape frontend architecture, raise engineering standards, and drive long-term technical strategy. This role is ideal for Senior ICs who enjoy ownership and influence without stepping into people management. What You ll Do Architecture & Strategy: Own frontend architecture and influence long-term technical direction. Design Systems: Evolve UI foundations, accessibility standards, and shared component libraries. Technical Leadership: Review critical PRs, unblock teams, and mentor engineers across multiple squads. Optimization: Solve challenges in performance, state management, and cross-service integrations. Collaboration: Partner with Product, Design, and Backend teams to deliver end-to-end solutions. Excellence: Drive standards across testing, observability, and CI/CD pipelines. You Might Be a Fit If You Have Required Qualifications: 5+ years of professional experience building modern frontend applications. Deep expertise in JavaScript/TypeScript and frameworks such as React. Strong understanding of web performance, security, and accessibility. Experience delivering complex features within large, shared codebases. Proven track record of mentoring engineers and improving frontend practices. Bonus Points For: Experience with micro-frontend architectures or design systems. Hands-on experience with AI-assisted coding tools (Cursor, Windsurf, Codex, etc.). Prior Staff-level responsibilities or cross-team technical ownership. Our Culture: The 5Cs We are guided by Collaboration, Commitment, Credence (trust), Customer-centricity, and Candor. We work together, ship quality, and stay obsessed with users. What You Get Competitive compensation and best-in-class hardware/software. Flexibility: 5-day work week with flexible hours. Engagement: Monthly team lunches, annual offsites, and a sense of belonging. Career Growth: Accelerated path toward Staff / Principal Engineer roles.

Senior Software Engineer (Frontend) Location: Bengaluru Hiring is still trapped in the past: manual screening, unconscious bias, and administrative overload. Talview is changing that with AI that actually works. We build GenAI-powered hiring and assessment platforms that make recruitment faster, fairer, and scalable. Our AI Products Alvy: The world s first AI Proctoring Agent for intelligent, scalable exam monitoring. Ivy: A conversational AI Interviewer enabling unbiased first-round assessments. Impact: 10M+ assessments delivered across 120+ countries for global enterprises. The Role We re seeking a Senior Frontend Engineer passionate about building fast, intuitive, and elegant user experiences. You will lead frontend initiatives, architect high-performance UI systems, and elevate engineering standards across the organization. This is ideal for engineers who thrive on technical leadership and solving complex UX challenges. What You ll Actually Do Lead & Mentor: Guide engineers, drive execution, and ensure top-tier UI quality. Architect Interfaces: Build scalable, high-performance, and accessible applications. Collaborate Deeply: Partner with Product, Design, and Backend teams to shape workflows. Performance & Accessibility: Optimize rendering and responsiveness while enforcing WCAG and ARIA guidelines. Engineering Standards: Maintain code quality through reviews, best practices, and improved CI/CD pipelines. You Might Be a Fit If... Required Qualifications: 4 6 years building modern frontend applications. Expert-level HTML, CSS, and JavaScript knowledge. Strong experience with React, React Hooks, Jest, and React Testing Library. Deep understanding of accessibility standards (WCAG, ARIA). Experience with Git, CI/CD pipelines, and modern build tools. Proven ability in mentoring or leading other engineers. Bonus Points For: Experience with Frontend performance optimization. Knowledge of Micro-frontend architecture or Design Systems. Hands-on experience with AI-assisted coding tools (Cursor, Windsurf, Codex, etc.). Our Culture: The 5Cs We live by Collaboration, Commitment, Credence (trust), Customer-centricity, and Candor. We work together, ship quality, and keep it real. What You Get Competitive compensation and the best hardware/software tools. Work-Life Balance: 5-day work week with flexibility. Perks: Fully stocked pantry, monthly team lunches, and annual offsites. Growth: Strong career acceleration in a fast-growing product company.

Job Title: Principal Electronics Engineer Embedded Hardware Location: Bengaluru Experience: 8 14 years Industry: Automotive / EV / Manufacturing Employment Type: Full-time About Ultraviolette Join the Charge. Create the Future. At Ultraviolette, we are more than just a company we re a movement that s reshaping the future of electric mobility. From building India s fastest electric motorcycle to designing the world s most advanced electric scooter, we thrive on pushing the boundaries of what s possible. We are a team of engineers, designers, and trailblazers united by a passion to craft machines that are sustainable, intelligent, and exhilarating. Every bolt, every line of code, and every component is designed with a singular mission: to accelerate the global shift toward next-generation mobility. Role Overview We are looking for a Principal / Lead Electronics Engineer Embedded Hardware to take ownership of vehicle electronics architecture, embedded systems design, diagnostics, and system-level validation for our next-gen electric vehicles. In this role, you will be at the forefront of developing high-performance electronic control units, telematics, and connected systems for future-ready vehicles. You will drive architecture decisions, system integration, and compliance, working alongside cross-functional teams to bring innovation from concept to the street. Key Responsibilities 1. Vehicle Electronics Architecture Design and bring to production electronic hardware including ECUs, display clusters, and telematics modules. Develop high-speed embedded designs with RF, sensor integration, and communication interfaces (CAN, LIN, UART, SPI, I2C). Create and maintain system schematics, architecture documentation, and interface definitions. 2. Embedded Hardware Design Develop embedded platforms with high-performance microcontrollers/processors to support vision systems, graphics, radar/LiDAR, audio, and OS-based applications. Architect and validate connected systems involving GNSS, LTE, BLE, Wi-Fi. Lead the design and integration of vehicle subsystems like lighting, clusters, IMUs, and more. Collaborate closely with firmware teams on hardware-software integration, bootloaders, and OTA functionality. 3. Diagnostics & Compliance Implement UDS-based diagnostics, fault logging systems, and service tools. Ensure compliance with AIS-004, ISO 26262, and other automotive design standards. 4. Testing & Validation Define and execute component-level and vehicle-level validation test plans. Utilize tools like Vector CANoe, CANalyzer, ETAS INCA, oscilloscopes, and spectrum/network analyzers for debugging and validation. 5. Cross-functional Collaboration Partner with teams across mechanical, software, UX, powertrain, and wire harness for holistic system integration. Work with mobile and cloud teams to enable real-time data streaming, diagnostics, and OTA updates. Actively contribute in design reviews, DFMEAs, and root cause analyses of field issues. Required Qualifications & Skills B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines. 8+ years of embedded hardware design experience, preferably in 2W/EV/automotive domain. Strong understanding of embedded C and scripting languages (e.g., Python, MATLAB, Octave). Experience with circuit simulation tools (e.g., PSPICE, LTSPICE, SIMPLIS, Simetrix). Hands-on expertise in RF design, signal/power integrity, EMI/EMC compliant layouts. Proficiency in PCB design tools (e.g., OrCAD, Altium, Mentor Graphics). Demonstrated experience in designing systems with multi-core processors, memory chips, SoMs, and high-speed interfaces (USB, Ethernet, LVDS, MIPI). Deep knowledge of embedded communication protocols (CAN, LIN, SPI, UART, I2C). Strong debugging and problem-solving skills in hardware validation and field testing. Nice to Have Hands-on experience in vehicle electronics development for 2W, 4W, or electric vehicles. Familiarity with DFT/DFA (Design for Testing/Assembly) methodologies. Experience with manufacturing and compliance testing for embedded hardware. Background in developing connected vehicle ecosystems with OTA capabilities. Passionate about emerging technologies in mobility, EVs, and embedded systems. Be part of India s electric mobility revolution where engineering meets adrenaline. Work on world-class technologies that are pushing global boundaries. Join a culture that encourages innovation, learning, and ownership. Collaborate with passionate teams building next-gen mobility experiences. Qualification : B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines

Job Title: Software Engineer, Backend (AI Team) Location: Bengaluru, India Company: LimeChat About LimeChat LimeChat is building the future of conversational commerce enabling brands to deliver human-level interactions at scale via WhatsApp and other messaging platforms. As a proud graduate of Y Combinator s Winter 2021 batch, we serve 300+ top-tier brands like HUL, ITC, Wow Skin Science, Piramal Health, and Snitch. Our mission is simple: use Generative AI to automate and personalize customer interactions in e-commerce and now expanding into BFSI, Health, and Retail sectors. If you're a backend engineer who thrives on impact, collaboration, and building innovative systems at scale, this is your opportunity to do work that truly matters. What You ll Do Architect and Develop Backend Systems: Design robust, scalable backend architectures for AI products that handle millions of conversations. Integrations and APIs: Build and maintain seamless, secure integrations with third-party platforms and internal services. Work with AI Products: Collaborate with ML engineers and product teams to connect AI models and agents to real-time customer journeys. Database Management: Design and optimize relational and NoSQL databases (e.g., PostgreSQL, MongoDB). Performance & Reliability: Identify bottlenecks and implement backend improvements to ensure high performance and reliability. Collaborate Cross-Functionally: Work closely with product, design, and frontend teams to ship features that delight users. Write Clean, Maintainable Code: Follow best practices in code quality, documentation, and testing. Participate in peer code reviews. You Should Have Must-Haves 2 4 years of backend experience in a high-growth tech/startup environment Proficiency in Python, Node.js, and frameworks like Django Strong command of SQL and NoSQL databases (e.g., PostgreSQL, MongoDB) Solid understanding of RESTful API design and best practices Experience with Git, code reviews, and agile development workflows Excellent debugging and code analysis skills, including performance optimization Nice-to-Haves Hands-on experience with Docker, Kubernetes, or other container orchestration tools Familiarity with CI/CD pipelines (GitLab CI, Jenkins, etc.) Experience with API load testing, monitoring, and observability tools Exposure to AI/ML pipelines and/or conversational AI systems Why You ll Love Working Here Massive Impact: Join a lean, fast-moving team where your work directly influences product and user experience. Innovation-First Culture: Work at the intersection of AI, automation, and customer experience. Smart Team: Collaborate with ex-founders, IITians, and top engineers. Fast-Growth Startup: Backed by leading VCs and part of Y Combinator, we re scaling globally. Ownership and Autonomy: You ll be trusted to take full ownership and drive initiatives end to end. Quotes We Live By It s okay to fail. It s not okay to not try. Do the right thing when others are not looking. Apply now and be part of the LimeChat revolution.

SDE I iOS Location: Bangalore, Karnataka | Department: Tech About the Team At Meesho, 5% of Indian households shop with us, and we ve built systems that manage millions of daily orders with zero downtime. It sounds impossible, but it s how we operate. Speed over perfection, learning through failure, and a Founder s Mindset drive our engineering culture. We re obsessed with continuous growth, open communication, and building a product that impacts millions. Our engineers thrive in a fast-paced, collaborative, and feedback-oriented environment. If you're excited about building impactful tech while debating storylines over chai, you ll fit right in. About the Role As a Software Development Engineer I (iOS) at Meesho, you ll help build new features from scratch using Swift and SwiftUI on one of India s fastest-growing e-commerce platforms. You ll work in an agile environment, contribute to app architecture, and write robust, clean, and scalable code that impacts millions of users. What You Will Do Develop and deliver new product features in Meesho s iOS app. Ensure the performance, quality, and responsiveness of the app. Collaborate with team members to define and ship new features. Maintain code quality through architectural reviews and code reviews. What You Will Need Bachelor s degree in Engineering or related field (BE/BTech). 1+ years of professional experience in iOS development. Proficiency in Swift, Xcode, UIKit, and SwiftUI. Familiarity with Apple design guidelines and mobile UX patterns. Understanding of core iOS concepts such as memory management, multithreading, networking, and protocols. Experience with RESTful APIs and JSON parsing. Hands-on experience with Git and collaborative development. Strong debugging skills, including identifying memory leaks and performance issues. Experience in writing unit and functional tests. Ability to write clean, maintainable, and scalable code. About Us Meesho is India s leading e-commerce platform for the next billion users. We re revolutionizing how small businesses and consumers connect online by offering a zero-commission platform with the lowest logistics costs in the country. Over 1.75 million sellers grow their businesses with us, serving every serviceable pincode in India. From tech infrastructure to logistics, we re solving India-first challenges and creating products that bring affordability and access to millions. Culture & Total Rewards Meesho is driven by a high-impact, high-performance culture. We emphasize: People-first approach with focus on feedback, growth, and open communication. Daily rituals like Reflections and Listen or Die that reinforce our 11 guiding principles. Competitive compensation both cash and equity tailored to your experience and role. Robust wellness coverage through our MeeCare Program including family medical insurance, mental wellness, telehealth, gym discounts, and more. Generous leave and parental policies, relocation support, and continuous learning programs. A vibrant work environment with personalized gifts, events, and recognition initiatives. Qualification : Bachelors degree in Engineering or related field (BE/BTech).

Android Developer - I Location: Bangalore, Karnataka | Tech About the Team When 5% of Indian households shop with us, it s important to build resilient systems to manage millions of orders every day. We ve done this with zero downtime! Sounds impossible? Well, that s the kind of Engineering muscle that has helped Meesho become the e-commerce giant that it is today. We value speed over perfection, and see failures as opportunities to become better. We ve taken steps to inculcate a strong Founder s Mindset across our engineering teams, making us grow and move fast. We place special emphasis on the continuous growth of each team member - and we do this with regular 1-1s and open communication. Software Development Engineer - I Android, you will be part of self-starters who thrive on teamwork and constructive feedback. We know how to party as hard as we work! If we aren t building unparalleled tech solutions, you can find us debating the plot points of our favorite books and games or even gossiping over chai. So, if a day filled with building impactful solutions with a fun team sounds appealing to you, join us. About the Role We are seeking problem solvers to join our team of Android Developers. We want candidates with experience in programming, user interfaces, and/or tools supporting applications on Android using the Android SDK. As SDE I - Android, you will gain experience in building maintainable and testable code bases, including API design and unit testing techniques. If you are interested in joining a world-class team of passionate engineers who work hard and play hard, we look forward to hearing from you. What you will do: Perform code reviews, write unit tests, and contribute to architectural planning and refactoring. Work on bug-fixing and improving application performance. Design and build new features and improvements for the Android platform. Mentor interns and support team members. Collaborate closely with QA, Engineers, Product Managers, and Designers across the company. Collaborate with cross-functional teams to define, design, and ship new features. What you will need: BE/BTech/BCA/BSc in any discipline. 1+ years experience in a relevant role. Experience having worked on two or more Android apps in the past. Familiarity with Java, Kotlin, Android SDK, and the ecosystem. Familiarity with Material Design guidelines, common mobile UX patterns, and anti-patterns. Experience with common Android libraries like Retrofit, OkHttp, Picasso, RxJava, Gson Arch-components etc. Experience with different programming paradigms, esp. functional and reactive programming. Familiarity with consuming REST APIs, and what makes them RESTful. Familiarity with Git and continuous integration. Proficiency at object-oriented programming and multi-threading. Understanding of advanced Android concepts like Custom Views, Accessibility Services, background processing APIs. Understanding of different architectural patterns (esp. MVVM) and their testability. Proficiency at debugging, including identifying memory leaks, performance bottlenecks and using tools like ADB, Proguard, etc. Ability to tell good design from bad design. Ability to write clean, maintainable code which others can work on. Apps published to Play Store are a plus. About Us Welcome to Meesho, where every story begins with a spark of inspiration and a dash of entrepreneurial spirit. We're not just a platform; we're your partner in turning dreams into realities. Curious about life at Meesho? Our people have a lot to say and they've made us the top-rated e-commerce workplace on Glassdoor. Our Mission Democratising internet commerce for everyone- Meesho (Meri shop) started with a single idea in mind -to be an e-commerce destination for the next billion Indian consumers and enable 100 million small businesses to succeed online. We provide sellers with a range of industry-first benefits such as zero commission and the lowest shipping cost. Over 1.75 million sellers are registered on Meesho, growing their business by tapping the company s massive customer base, state-of-the-art tech infrastructure, pan-India logistics at the lowest cost through third-party logistics providers in an 'Everyday Lowest Cost' channel for sellers. Affordable, relatable merchandise mirroring local markets has helped us make inroads with first-time internet users in the country. We cater to an underserved and unique customer base and cover every serviceable pincode in the country. Our unique business model and continuous innovation has enabled us to become the first Indian horizontal E-commerce company. Culture and Total Rewards Our focus is on cultivating a dynamic workplace characterized by high impact and performance excellence. We prioritize a people-centric culture, dedicated to hiring and developing exceptional talent. Total rewards at Meesho comprises of a comprehensive set of elements - monetary, non-monetary, tangible, and intangible in nature. Our 11 guiding principles, or "Mantras," are the backbone of how we operate - influencing everything from recognition and evaluation to growth discussions. Daily rituals & processes like Reflections , Listen or Die , Internal Mobility Program, Talent Reviews, Continuous Performance Management - all embody these principles. We provide market leading compensation - both cash and equity-based - specific to job roles, individual experience and skill along with our employee centric benefits and work environment. We focus extensively on holistic wellness - through our MeeCare Program - encompassing benefits and policies across physical, mental, financial, and social wellness aspects. This includes extensive medical insurance benefits for employees and their families, wellness initiatives like telehealth, wellness events, and gym & recreational discounts etc. To support work-life balance, we provide generous leave policies, parental support benefits, retirement benefits, and learning and development assistance. Through gratitude...

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

Java Developer Work Location: Bangalore Experience: 5+ Years Job Role We are seeking a highly skilled Java Developer with expertise in Spring Boot, Microservices, and relational databases to join our team. The ideal candidate should be proficient in Java frameworks, possess strong problem-solving skills, and have a solid understanding of software development best practices. Skills & Qualifications Educational Qualifications Bachelor s degree in Computer Science, Engineering, or a related field. Technical Skills 5+ years of experience in Java development. Proficiency in mainstream Java open-source frameworks like Spring, Spring Boot, and Spring Cloud. Strong understanding of Microservices architecture and design patterns. Experience working with MySQL or other relational databases. Soft Skills Excellent problem-solving and analytical skills. Ability to work independently and collaboratively in a team environment. Strong communication and interpersonal skills. Ability to prioritize tasks and manage time effectively. Experience with Agile development methodologies (preferred). Job Responsibilities Designing, developing, and implementing software solutions using Java technologies. Collaborating with cross-functional teams to define, design, and ship new features. Writing clean, efficient, and maintainable code. Ensuring the performance, quality, and responsiveness of applications. Troubleshooting and debugging issues to optimize performance. Staying up-to-date with the latest industry trends and technologies. Work on challenging and impactful projects using cutting-edge Java technologies. Opportunities for career growth and skill development. Collaborative and innovative work environment. Competitive salary and comprehensive benefits. Join Our Team! If you are passionate about Java development and looking for an exciting opportunity, we encourage you to apply! Apply Now! Qualification : Bachelors degree in Computer Science, Engineering, or a related field.

About NVIDIA NVIDIA has continually reinvented itself. From pioneering the GPU fueling the growth of the PC gaming industry and transforming modern computer graphics to revolutionizing parallel computing, we have consistently shaped the future of technology. Today, NVIDIA GPUs drive innovation in artificial intelligence (AI), providing highly scalable, parallel computation that powers groundbreaking advancements across industries. We are a company that thrives on learning, evolution, and tackling the world s most complex challenges. Join us, and you ll be part of a diverse, innovative, and supportive team that inspires everyone to achieve their best work. About the Role: SOC Design Engineer The System-On-Chip (SOC) group at NVIDIA is expanding! As the complexity of SOCs grows with chips now integrating tens of billions of transistors we are seeking a talented SOC Design Engineer with a passion for RTL integration and chip-level front-end design. This role focuses on padring design, pinmuxing, SOC assembly, and retiming. If you enjoy developing methodologies and automation solutions to optimize SOC creation, this is the opportunity for you. In this role, you will work on NVIDIA s advanced Tegra SOCs, collaborating closely with cross-functional teams, including System Architecture, Physical Design, CAD, and DFT. You will help define and implement scalable and efficient SOC design methodologies for future technologies. What You ll Be Doing Drive SOC assembly and design chip-level functions for Tegra SOCs. Perform front-end design quality checks, reviews, and collaborate with cross-functional teams to resolve issues. Oversee SOC execution across key milestones by defining, tracking, and managing complex dependencies with multiple stakeholders. Develop system-level methodologies, tools, and IPs to enable efficient and scalable SOC design. Identify and address inefficiencies in front-end chip implementation processes, implementing solutions for continuous improvement. What We Need to See B.Tech or M.Tech in Electronics Engineering or a related field. 2+ years of proven experience in chip design, with a focus on SOC integration and design automation. (Experience with padring design and fuse/floorsweep is a plus.) Strong analytical and problem-solving skills. Proficiency in RTL design (Verilog) and knowledge of SOC design/implementation flows. Experience with scripting languages such as Perl, Python, or other industry-standard tools. Exposure to multiple chip design functions, enabling collaboration and problem-solving across diverse teams. Excellent communication and collaboration skills with a team-oriented mindset. Bonus Skills: Experience in SOC verification, synthesis, physical design, and DFT. Familiarity with RTL build flows and Makefiles. At NVIDIA, you ll work on technologies that make a lasting global impact. We believe in fostering a diverse, inclusive work environment where everyone can grow and thrive. NVIDIA is proud to be an equal opportunity employer and does not discriminate based on race, religion, gender identity, age, disability status, or any other protected characteristic. Qualification : B.Tech or M.Tech in Electronics Engineering.

We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Job Overview: We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : 8+ Years of Experience in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises #LI-KR2 Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Qualification : A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture.

General Summary: Qualcomm CDMA Technologies (QCT) is the world s largest provider of wireless chipset technology, leading the way in 5G and Wi-Fi advancements. As an inventor-driven company, Qualcomm is committed to transforming industries and creating new possibilities through groundbreaking connectivity technologies. Qualcomm is currently seeking experienced WLAN Digital Designers for its Wireless R&D team in Bangalore. This role will involve designing next-generation WLAN chipsets and Wi-Fi subsystems, including Wi-Fi 6, 7, and 8 technologies. As part of the QCT Bangalore Wireless R&D HW team, you will be involved in sub-system architecture, RTL design, and its integration, contributing to industry-leading technologies in Wi-Fi connectivity for consumer devices such as hearables, wearables, and IoT applications. Key Responsibilities: Design and develop next-generation WLAN and micro-Wi-Fi subsystems for connectivity, hearables, wearables, and IoT chips. Work on ASIC designs using the latest technology nodes, understanding and executing all aspects of the VLSI development cycle, including architecture, micro-architecture, RTL design, and integration. Collaborate closely with Verification, SoC Design, Validation, Synthesis, and PD teams to achieve design convergence. Develop micro-architecture and implement designs in Verilog/SV. Integrate complex subsystems into SoCs. Perform various design checks and tool analyses using tools like Spyglass, RDC, CDC, PrimeTime, Synthesis, and more. Conduct post-silicon debug and work with cross-functional teams to resolve issues and optimize designs. Work independently on defined tasks, with minimal guidance, while maintaining a strong team-oriented approach. Required Skills and Experience: 8+ years of experience in digital front-end design for ASICs. Strong expertise in RTL coding using Verilog, VHDL, or SystemVerilog (SV) for complex designs, including those with multiple clock domains. Experience in low-power design methodology and clock domain crossing designs. Familiarity with various bus protocols like AHB and AXI. In-depth understanding of the RTL to GDS flow and experience interacting with DFT and PD teams. Experience in 802.11 (Wi-Fi) and wireless IP/subsystem design is a plus. Post-silicon debug experience is an added advantage. Strong documentation and communication skills to effectively interact with team members and management. Self-motivated with a teamwork-oriented attitude and the ability to work independently. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, Communications, or a related field, and 3+ years of Hardware Engineering or related work experience. Master s degree in the above fields and 2+ years of relevant experience, OR a PhD with 1+ year of related work experience.