Chip Design Jobs in Bengaluru

Senior Product Designer Bengaluru | Design | Full-Time About Fam (formerly FamPay) Fam is India s first payments app designed for everyone aged 11 and above. From UPI to the FamCard, we re making payments cool, safe, and simple for the next generation. But we re not just building a payments app we re on a mission to raise a financially smart generation of 250M+ young Indians. Founded in 2019 by IIT Roorkee alumni, we re backed by world-class investors like Elevation Capital, Y-Combinator, Peak XV (Sequoia Capital India), and top angels including Kunal Shah and Amrish Rao. The Role: Senior Product Designer "It s the product that sells not just the idea." Design isn t just part of our process it s at the heart of what we do. We re crafting experiences that don t just work well but feel **magical**. As a Senior Product Designer at Fam, you ll lead the creation of intuitive, delightful, and impactful product experiences for India s Gen Z and younger users. If you love solving complex design problems, thrive in fast-paced environments, and believe in the power of design to inspire change we d love to meet you. What You ll Do Lead design projects across the entire product lifecycle from ideation to execution and iteration. Collaborate cross-functionally with Product, Engineering, Marketing, and Business teams. Design and ship high-impact UI/UX using Figma, while obsessing over visual and interaction details. Scale and evolve Fam s design system to ensure consistency across all platforms. Champion design thinking and push the creative boundaries to elevate the brand. Conduct user research & usability tests to inform design decisions and improve experiences. Stay on top of design trends (and memes) to keep the brand relevant and fresh. Must-Haves: 3+ years of experience designing consumer-facing mobile apps (especially B2C). A strong portfolio showcasing UX, interaction design, and shipped work. Hands-on Figma expertise, along with prototyping and basic motion design tools. Ownership mindset you've taken features or products from 0 1 (research to launch to feedback). Team player who s collaborated with product designers, engineers, and product managers. Gen Z energy you're in tune with what young users love (and cringe at). Bonus Points For: Experience in FinTech or payments. Skills in motion design or micro-interactions. Having a personal blog, portfolio site, or design community presence. Experience mentoring junior designers or leading small teams. Help define how India s next generation experiences money. Work in a **high-ownership, fast-growth environment** with a strong design culture. Collaborate directly with founders and the leadership team. Build design systems from the ground up and leave a lasting impact. Grow into a design leader in one of the most exciting spaces in tech. Perks & Benefits Relocation support for a smooth move to Bengaluru. Free office meals (lunch & dinner). Mental health support & therapy sessions. Comprehensive health insurance (for you + family). Special leaves: birthday, period, paternity/maternity, and more. Salary advances and interest-free loans. Recognition & referral rewards. Latest devices and gadgets. Tax-saving benefits (food coupons, phone reimbursements, leasing options). Retirement perks: PF, gratuity, leave encashment. A Little More About Us Our flagship product, FamX, integrates UPI and card payments so users can spend, save, and learn all in one place. We ve empowered 10M+ users to ditch cash and embrace a new way of managing money. At Fam, you re not just joining a startup you re joining a **mission-driven, people-first team** building something meaningful. Apply now and let s build something iconic together.

Job Title: Software Engineer, Backend (AI Team) Location: Bengaluru, India Company: LimeChat About LimeChat LimeChat is building the future of conversational commerce enabling brands to deliver human-level interactions at scale via WhatsApp and other messaging platforms. As a proud graduate of Y Combinator s Winter 2021 batch, we serve 300+ top-tier brands like HUL, ITC, Wow Skin Science, Piramal Health, and Snitch. Our mission is simple: use Generative AI to automate and personalize customer interactions in e-commerce and now expanding into BFSI, Health, and Retail sectors. If you're a backend engineer who thrives on impact, collaboration, and building innovative systems at scale, this is your opportunity to do work that truly matters. What You ll Do Architect and Develop Backend Systems: Design robust, scalable backend architectures for AI products that handle millions of conversations. Integrations and APIs: Build and maintain seamless, secure integrations with third-party platforms and internal services. Work with AI Products: Collaborate with ML engineers and product teams to connect AI models and agents to real-time customer journeys. Database Management: Design and optimize relational and NoSQL databases (e.g., PostgreSQL, MongoDB). Performance & Reliability: Identify bottlenecks and implement backend improvements to ensure high performance and reliability. Collaborate Cross-Functionally: Work closely with product, design, and frontend teams to ship features that delight users. Write Clean, Maintainable Code: Follow best practices in code quality, documentation, and testing. Participate in peer code reviews. You Should Have Must-Haves 2 4 years of backend experience in a high-growth tech/startup environment Proficiency in Python, Node.js, and frameworks like Django Strong command of SQL and NoSQL databases (e.g., PostgreSQL, MongoDB) Solid understanding of RESTful API design and best practices Experience with Git, code reviews, and agile development workflows Excellent debugging and code analysis skills, including performance optimization Nice-to-Haves Hands-on experience with Docker, Kubernetes, or other container orchestration tools Familiarity with CI/CD pipelines (GitLab CI, Jenkins, etc.) Experience with API load testing, monitoring, and observability tools Exposure to AI/ML pipelines and/or conversational AI systems Why You ll Love Working Here Massive Impact: Join a lean, fast-moving team where your work directly influences product and user experience. Innovation-First Culture: Work at the intersection of AI, automation, and customer experience. Smart Team: Collaborate with ex-founders, IITians, and top engineers. Fast-Growth Startup: Backed by leading VCs and part of Y Combinator, we re scaling globally. Ownership and Autonomy: You ll be trusted to take full ownership and drive initiatives end to end. Quotes We Live By It s okay to fail. It s not okay to not try. Do the right thing when others are not looking. Apply now and be part of the LimeChat revolution.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Android Developer - I Location: Bangalore, Karnataka | Tech About the Team When 5% of Indian households shop with us, it s important to build resilient systems to manage millions of orders every day. We ve done this with zero downtime! Sounds impossible? Well, that s the kind of Engineering muscle that has helped Meesho become the e-commerce giant that it is today. We value speed over perfection, and see failures as opportunities to become better. We ve taken steps to inculcate a strong Founder s Mindset across our engineering teams, making us grow and move fast. We place special emphasis on the continuous growth of each team member - and we do this with regular 1-1s and open communication. Software Development Engineer - I Android, you will be part of self-starters who thrive on teamwork and constructive feedback. We know how to party as hard as we work! If we aren t building unparalleled tech solutions, you can find us debating the plot points of our favorite books and games or even gossiping over chai. So, if a day filled with building impactful solutions with a fun team sounds appealing to you, join us. About the Role We are seeking problem solvers to join our team of Android Developers. We want candidates with experience in programming, user interfaces, and/or tools supporting applications on Android using the Android SDK. As SDE I - Android, you will gain experience in building maintainable and testable code bases, including API design and unit testing techniques. If you are interested in joining a world-class team of passionate engineers who work hard and play hard, we look forward to hearing from you. What you will do: Perform code reviews, write unit tests, and contribute to architectural planning and refactoring. Work on bug-fixing and improving application performance. Design and build new features and improvements for the Android platform. Mentor interns and support team members. Collaborate closely with QA, Engineers, Product Managers, and Designers across the company. Collaborate with cross-functional teams to define, design, and ship new features. What you will need: BE/BTech/BCA/BSc in any discipline. 1+ years experience in a relevant role. Experience having worked on two or more Android apps in the past. Familiarity with Java, Kotlin, Android SDK, and the ecosystem. Familiarity with Material Design guidelines, common mobile UX patterns, and anti-patterns. Experience with common Android libraries like Retrofit, OkHttp, Picasso, RxJava, Gson Arch-components etc. Experience with different programming paradigms, esp. functional and reactive programming. Familiarity with consuming REST APIs, and what makes them RESTful. Familiarity with Git and continuous integration. Proficiency at object-oriented programming and multi-threading. Understanding of advanced Android concepts like Custom Views, Accessibility Services, background processing APIs. Understanding of different architectural patterns (esp. MVVM) and their testability. Proficiency at debugging, including identifying memory leaks, performance bottlenecks and using tools like ADB, Proguard, etc. Ability to tell good design from bad design. Ability to write clean, maintainable code which others can work on. Apps published to Play Store are a plus. About Us Welcome to Meesho, where every story begins with a spark of inspiration and a dash of entrepreneurial spirit. We're not just a platform; we're your partner in turning dreams into realities. Curious about life at Meesho? Our people have a lot to say and they've made us the top-rated e-commerce workplace on Glassdoor. Our Mission Democratising internet commerce for everyone- Meesho (Meri shop) started with a single idea in mind -to be an e-commerce destination for the next billion Indian consumers and enable 100 million small businesses to succeed online. We provide sellers with a range of industry-first benefits such as zero commission and the lowest shipping cost. Over 1.75 million sellers are registered on Meesho, growing their business by tapping the company s massive customer base, state-of-the-art tech infrastructure, pan-India logistics at the lowest cost through third-party logistics providers in an 'Everyday Lowest Cost' channel for sellers. Affordable, relatable merchandise mirroring local markets has helped us make inroads with first-time internet users in the country. We cater to an underserved and unique customer base and cover every serviceable pincode in the country. Our unique business model and continuous innovation has enabled us to become the first Indian horizontal E-commerce company. Culture and Total Rewards Our focus is on cultivating a dynamic workplace characterized by high impact and performance excellence. We prioritize a people-centric culture, dedicated to hiring and developing exceptional talent. Total rewards at Meesho comprises of a comprehensive set of elements - monetary, non-monetary, tangible, and intangible in nature. Our 11 guiding principles, or "Mantras," are the backbone of how we operate - influencing everything from recognition and evaluation to growth discussions. Daily rituals & processes like Reflections , Listen or Die , Internal Mobility Program, Talent Reviews, Continuous Performance Management - all embody these principles. We provide market leading compensation - both cash and equity-based - specific to job roles, individual experience and skill along with our employee centric benefits and work environment. We focus extensively on holistic wellness - through our MeeCare Program - encompassing benefits and policies across physical, mental, financial, and social wellness aspects. This includes extensive medical insurance benefits for employees and their families, wellness initiatives like telehealth, wellness events, and gym & recreational discounts etc. To support work-life balance, we provide generous leave policies, parental support benefits, retirement benefits, and learning and development assistance. Through gratitude...

Job Title: Senior Cloud Development Engineer Location: Bengaluru, Karnataka, India About Us: Cloud Software Group combines the capabilities of both Citrix and TIBCO, creating one of the world's largest cloud software providers, serving over 100 million users globally. By joining Cloud Software Group, you will make a significant impact, helping real people access the cloud-based products they rely on to get their work done from anywhere. Our team values passion for technology, the courage to take risks, and the empowerment of every individual to dream, learn, and build the future of work. This is an exciting time to bring your skills to the cloud and be a part of our evolving journey! About This Team: We are seeking a Senior Cloud Development Engineer to join our dynamic DaaS (Desktop as a Service) team. In this role, you'll work with cutting-edge cloud technologies to develop and maintain scalable, secure cloud services. You will be a key contributor to the Citrix DaaS Product Line, working alongside a talented team of engineers to build resilient microservices that power our customer-facing applications. Your work will directly influence the experience of customers and partners globally. Job Description: As a Senior Cloud Development Engineer, you will be responsible for: Back-End Development: Improve business logic, enhance existing features, and build new ones to support the Citrix DaaS product line. Collaboration: Work cross-functionally with teams to define, design, and ship new features that enhance the DaaS experience. Continuous Improvement: Research and evaluate new technologies to maximize development efficiency, with a focus on adopting Generative AI tools where applicable. Agile Methodology: Embrace agile practices such as Jira, SCRUM, SAFE, or Kanban to deliver high-quality products on time. Best Practices: Institute coding standards, including code reviews, integration testing, unit testing, logging, and instrumentation to ensure the robustness of the codebase. Troubleshooting: Understand and resolve field issues, performing root cause analysis and implementing preventive measures to improve performance and security in cloud environments. Required Experience/Skills: Bachelor's Degree (BE/BTech) in a technical field or equivalent work experience. 4+ years of relevant work experience in cloud development or software engineering. Strong understanding of computer science fundamentals, particularly algorithms and data structures. Excellent communication and collaboration skills to effectively discuss technical concepts with cross-functional teams. Strong problem-solving and troubleshooting abilities, with an emphasis on resolving performance and security issues in cloud environments. Preferred Qualifications: Development experience with .NET technologies such as C#. Scripting experience with languages such as Python or PowerShell. Familiarity with cloud computing technologies, including platforms like Microsoft Azure or Amazon EC2. Experience with Sumo Logic or Splunk for troubleshooting and monitoring in cloud environments. At Cloud Software Group, you're not just joining a company; you're becoming part of a team that values your contributions and encourages you to innovate. This is your chance to be a part of one of the largest cloud solution providers, working on cutting-edge technologies that impact millions of users globally. You ll have the opportunity to work in a fast-paced, collaborative environment where your skills are valued and developed. Equal Opportunity Employer: Cloud Software Group is firmly committed to Equal Employment Opportunity (EEO) and to compliance with all federal, state, and local laws that prohibit employment discrimination. All qualified applicants will receive consideration for employment without regard to age, race, color, sex, gender identity, sexual orientation, ethnicity, national origin, citizenship, religion, genetic carrier status, disability, pregnancy, childbirth, or any other protected classification. Qualification : Bachelor's Degree (BE/BTech) in a technical field or equivalent work experience.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Title: RTL Design Engineer Job Description: Join Intel s Design Team and contribute to the development of high-quality Intel products. In this role, you will work on RTL tool flow methodologies, leveraging industry-standard design tools and scripting environments such as Perl and Python to enhance design automation and optimization. Key Responsibilities: Work on digital design concepts and RTL design using Verilog. Develop and implement RTL tool flow methodologies to optimize design efficiency. Utilize industry-standard design tools to enhance digital design workflows. Develop scripts using Perl and Python to automate design processes. Apply computer architecture knowledge to drive innovations in design methodologies. Qualifications & Requirements: Educational Qualifications: Master s (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions. Technical Skills & Experience: Strong understanding of digital design concepts and computer architecture. Experience with RTL design using Verilog. Proficiency in scripting languages such as Perl and Python for automation. Familiarity with industry-standard design tools and RTL tool flow methodologies. About the Client Computing Group (CCG): The Client Computing Group (CCG) at Intel leads the development of PC products and platforms, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. By collaborating with industry partners, CCG delivers cutting-edge computing experiences that enable users to create, connect, and innovate. As Intel s largest business unit, CCG plays a pivotal role in driving technological advancements and product innovation. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development and career growth opportunities. Qualification : Masters (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

Java Developer Work Location: Bangalore Experience: 5+ Years Job Role We are seeking a highly skilled Java Developer with expertise in Spring Boot, Microservices, and relational databases to join our team. The ideal candidate should be proficient in Java frameworks, possess strong problem-solving skills, and have a solid understanding of software development best practices. Skills & Qualifications Educational Qualifications Bachelor s degree in Computer Science, Engineering, or a related field. Technical Skills 5+ years of experience in Java development. Proficiency in mainstream Java open-source frameworks like Spring, Spring Boot, and Spring Cloud. Strong understanding of Microservices architecture and design patterns. Experience working with MySQL or other relational databases. Soft Skills Excellent problem-solving and analytical skills. Ability to work independently and collaboratively in a team environment. Strong communication and interpersonal skills. Ability to prioritize tasks and manage time effectively. Experience with Agile development methodologies (preferred). Job Responsibilities Designing, developing, and implementing software solutions using Java technologies. Collaborating with cross-functional teams to define, design, and ship new features. Writing clean, efficient, and maintainable code. Ensuring the performance, quality, and responsiveness of applications. Troubleshooting and debugging issues to optimize performance. Staying up-to-date with the latest industry trends and technologies. Work on challenging and impactful projects using cutting-edge Java technologies. Opportunities for career growth and skill development. Collaborative and innovative work environment. Competitive salary and comprehensive benefits. Join Our Team! If you are passionate about Java development and looking for an exciting opportunity, we encourage you to apply! Apply Now! Qualification : Bachelors degree in Computer Science, Engineering, or a related field.

About NVIDIA NVIDIA has continually reinvented itself. From pioneering the GPU fueling the growth of the PC gaming industry and transforming modern computer graphics to revolutionizing parallel computing, we have consistently shaped the future of technology. Today, NVIDIA GPUs drive innovation in artificial intelligence (AI), providing highly scalable, parallel computation that powers groundbreaking advancements across industries. We are a company that thrives on learning, evolution, and tackling the world s most complex challenges. Join us, and you ll be part of a diverse, innovative, and supportive team that inspires everyone to achieve their best work. About the Role: SOC Design Engineer The System-On-Chip (SOC) group at NVIDIA is expanding! As the complexity of SOCs grows with chips now integrating tens of billions of transistors we are seeking a talented SOC Design Engineer with a passion for RTL integration and chip-level front-end design. This role focuses on padring design, pinmuxing, SOC assembly, and retiming. If you enjoy developing methodologies and automation solutions to optimize SOC creation, this is the opportunity for you. In this role, you will work on NVIDIA s advanced Tegra SOCs, collaborating closely with cross-functional teams, including System Architecture, Physical Design, CAD, and DFT. You will help define and implement scalable and efficient SOC design methodologies for future technologies. What You ll Be Doing Drive SOC assembly and design chip-level functions for Tegra SOCs. Perform front-end design quality checks, reviews, and collaborate with cross-functional teams to resolve issues. Oversee SOC execution across key milestones by defining, tracking, and managing complex dependencies with multiple stakeholders. Develop system-level methodologies, tools, and IPs to enable efficient and scalable SOC design. Identify and address inefficiencies in front-end chip implementation processes, implementing solutions for continuous improvement. What We Need to See B.Tech or M.Tech in Electronics Engineering or a related field. 2+ years of proven experience in chip design, with a focus on SOC integration and design automation. (Experience with padring design and fuse/floorsweep is a plus.) Strong analytical and problem-solving skills. Proficiency in RTL design (Verilog) and knowledge of SOC design/implementation flows. Experience with scripting languages such as Perl, Python, or other industry-standard tools. Exposure to multiple chip design functions, enabling collaboration and problem-solving across diverse teams. Excellent communication and collaboration skills with a team-oriented mindset. Bonus Skills: Experience in SOC verification, synthesis, physical design, and DFT. Familiarity with RTL build flows and Makefiles. At NVIDIA, you ll work on technologies that make a lasting global impact. We believe in fostering a diverse, inclusive work environment where everyone can grow and thrive. NVIDIA is proud to be an equal opportunity employer and does not discriminate based on race, religion, gender identity, age, disability status, or any other protected characteristic. Qualification : B.Tech or M.Tech in Electronics Engineering.

We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum Qualifications: Bachelor s degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. At least 5 years of experience in software development, specifically within consumer electronics or embedded systems. A minimum of 3 years of experience in leading ASIC architecture decisions from a software perspective. Proficiency with Linux kernel, bootloaders, SoC, low-power management frameworks, or performance analysis. Preferred Qualifications: Master s degree or PhD in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related discipline. 10 years of experience in software design and development, particularly with software layers in ASIC (e.g., boot processes, drivers, embedded firmware, libraries, and APIs for applications). Familiarity with Android OS or similar platforms, especially in power management. Strong understanding of hardware-software interactions across various hardware blocks, including CPUs and accelerators. About the Role: Join a dynamic, diverse team that is pioneering the development of custom silicon solutions powering the future of Google's direct-to-consumer products. As part of the team, you will contribute to groundbreaking innovations in products used by millions globally, shaping the next generation of hardware experiences for optimal performance, efficiency, and integration. As the ASIC Platform Software Architect, you will be instrumental in translating software product requirements and use cases into specific hardware blocks or sub-systems. In this role, you will define the direction of the software team, guiding them in the face of complex constraints. You will work closely with hardware architects to define system architectures for hardware blocks and collaborate with the implementation team to outline solutions. You ll also help influence design decisions to ensure software requirements are met, negotiating hardware/software trade-offs for optimal results. Google's mission is to organize the world s information and make it universally accessible and useful. Our Devices & Services team integrates the best of Google AI, software, and hardware to create transformative user experiences. We focus on researching, designing, and developing new technologies and hardware to make user interaction with computing faster, more seamless, and more powerful. Whether we re innovating on form factors, advancing sensors, or redefining interaction methods, the Devices & Services team is dedicated to improving people's lives through technology. Responsibilities: Collaborate with stakeholders to identify user experience needs and map them to hardware and software solutions. Design architectures and software interfaces that empower developers to leverage hardware accelerators and other intellectual property (IP). Analyze hardware component interactions, troubleshoot issues, propose trade-off solutions, and drive to resolution. Contribute to the design and improvement of hardware from one generation to the next, applying insights from past productization efforts and reducing technical debt.

Job Description The Client Development Group (CDG) is looking for Physicial Design Engineers with following Responsibilities - Creates bottoms up elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction and schematic layout verification. Debug using phases of physical design development including parasitic extraction ,clock generation, custom polygon editing, auto place and route algorithms, floor planning, full chip assembly, RV DFM Density and verification. Troubleshoots design issues and applies proactive intervention. May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments. Qualifications You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing. Experience, Skills, Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs. Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan. Ability to comprehend issues of RC delay electromigration, selfheating and cross capacitance. Ability to recognize failure prone layout structures and proactively contact engineers for guidance and produce electrically robust layout. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Other Locations IN, Hyderabad Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel Qualification : You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing.

Job Overview: We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : 8+ Years of Experience in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises #LI-KR2 Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Qualification : A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture.

Job Description: We are committed to delivering cutting-edge solutions and fostering innovation in the tech industry. Were seeking a highly skilled and experienced Senior Full-Stack Developer to join our dynamic team. If you have a passion for technology and a drive to solve complex problems, we want to hear from you! Key Responsibilities: Develop and maintain scalable web applications using Angular and PHP (Laravel). Design, implement, and manage MySQL databases to ensure optimal performance. Collaborate with cross-functional teams to define, design, and ship new features. Write clean, maintainable, and efficient code while adhering to best practices. Participate in code reviews and provide constructive feedback to team members. Utilize Git-based version control tools for source code management and collaboration. Communicate effectively with team members, stakeholders, and clients to ensure project goals and requirements are met. Troubleshoot and resolve issues in a timely manner to ensure seamless user experience. Requirements: Minimum of 5+ years of professional experience in full-stack development. Proficiency in Angular and PHP (Laravel) for developing robust web applications. Strong experience with MySQL for database management and optimization. Familiarity with Git-based version control tools (e.g., GitHub, GitLab, Bitbucket). Excellent communication skills with the ability to articulate technical concepts to both technical and non-technical stakeholders. Proven problem-solving abilities and a strong attention to detail. Ability to work independently and as part of a collaborative team.