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We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

General Summary: Qualcomm is at the forefront of technology innovation, enabling next-generation experiences and driving digital transformation to create a smarter, connected future. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and validate systems-level solutions, collaborating across functional teams to meet and exceed system-level requirements. The Automotive System Performance team optimizes multimedia performance on Snapdragon Automotive chipsets, covering technologies like Camera, Video, Graphics, and Display. Responsibilities: System Optimization: Support profiling and optimization of system use cases related to multimedia performance on automotive platforms. Hardware Understanding: Set up and manage hardware configurations in lab environments and conduct performance testing. Multimedia Performance Validation: Work on IP hardware functional and performance validation for multimedia domains such as Camera, Video, Display, GPU, and Audio. Debugging and Issue Resolution: Passionately debug system-level issues, utilizing Android system tools, JTAG, scripting, and other debugging tools. Cross-Team Collaboration: Work with global, cross-functional teams to meet project milestones and ensure successful execution of performance-related tasks. Pre-Silicon and Emulation Work: Leverage expertise to work in pre-silicon/emulation environments as needed. Required Skills and Experience: Experience: 6 8 years in embedded systems with expertise in multimedia hardware architecture and device driver development. Hardware Fundamentals: Strong knowledge of display, video, and camera basics; DDR, SMMU, NOC; system interconnects; and bus protocols like AXI/AHB. SoC Architectures: Deep understanding of Auto/Mobile SoC architectures and multimedia subsystems' data flows. Processor Expertise: Basics of ARM architecture, including multicore/multiprocessor systems with SMP/heterogeneous cores. Programming Skills: Proficiency in C programming for embedded platforms. Operating Systems: Familiarity with Linux kernel internals, scheduling policies, locking mechanisms, MMU/paging, and RTOS concepts. Validation Experience: Prior experience in silicon or emulation-based validation of hardware performance in multimedia domains. Debugging Tools: Experience with Android system tools, debugging tools, and scripting. Cross-Functional Skills: Ability to collaborate across geographies and teams, demonstrating excellent communication and problem-solving skills. Preferred Skills: Exposure to working in emulation/pre-silicon environments. Experience with system QoS, performance monitoring, and profiling tools. Familiarity with Android/Linux kernel fundamentals and multimedia technology stack. Educational Requirements: Required: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related fields. Preferred: Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related fields. Why Join Qualcomm? Cutting-Edge Innovation: Be part of a team driving next-generation automotive multimedia technologies. Global Collaboration: Work alongside talented professionals from diverse geographies and functional areas. Professional Growth: Opportunities to develop and advance within a company leading the technology sector. Impactful Work: Contribute to the development of automotive platforms that redefine connectivity and multimedia performance. Qualification : Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related fields.

Responsibilities: Minimum of 6+ years in supporting SQL databases in clustered environments. Design, implement, and maintain scalable SQL Server database architectures. Administer and support SQL Server Always on Availability Groups for high availability and disaster recovery. Manage and configure Failover Cluster Instances (FCI) to ensure maximum uptime. Implement and maintain log shipping and SQL Server Replication for backup and failover solutions. Maintain database Replication (transactional, snapshot, and merge) across multiple instances. Implement and manage robust Backup and Restore processes across environments. Conduct regular testing of disaster recovery plans to ensure the continuity of business operations. Performance tuning as needed to ensure SQL DATABASE is up and running healthy. Develop and maintain scripts for database automation, monitoring, and maintenance using PowerShell, T-SQL, or other relevant scripting languages. Automate database jobs, backups, indexing, and maintenance tasks to improve efficiency and reduce manual intervention. Perform performance tuning and optimization of queries, indexes, and database systems. Analyze and resolve complex database issues related to locking, blocking, and deadlocking. Knowledge of database security, user permissions, roles, and encryption techniques. Critical Database Migration on Production systems using DR setup/Pre-cutover/Cutover. Installation/Configuration/Management/Migration of MS-SQL 2012, 2016, 2019 to higher versions on Standard & Clustered environments. SQL Server migrations/Upgradations/Vulnerability patching on QA, Test, and Productions. Provide on call rotation DATABASE support, identifying and resolving DATABASE issues, problem troubleshooting, root cause analysis. End-to-end Database Support for all critical issues. Good understating on database change management procedure including drafting change request, technical review, approval, and change implementation in change maintenance window.