Custom Silicon Jobs in Bengaluru

Position: Salesforce Developer (CPQ, Service Cloud, Billing) Location: Remote/Hybrid | Bengaluru, IND We're looking for a highly skilled Salesforce Developer with specialized expertise in Salesforce CPQ, Service Cloud, and Billing. If you have a strong background in developing and customizing Salesforce solutions that enhance sales, service, and billing processes, you'll be instrumental in designing and implementing complex, tailored solutions to meet our business needs. What You'll Do: CPQ Development: Customize and enhance Salesforce CPQ applications, including product configuration, pricing rules, quote templates, and approval processes. Service Cloud Development: Implement and customize Salesforce Service Cloud to optimize customer service operations, covering case management, service processes, and SLAs. Billing Implementation: Develop and integrate Salesforce Billing solutions, ensuring seamless end-to-end billing processes like invoicing, payment processing, and revenue recognition. System Integration: Integrate Salesforce CPQ, Service Cloud, and Billing with internal and third-party systems using REST/SOAP APIs, middleware, and custom integrations. Customization & Data Management: Design and implement custom objects, workflows, validation rules, and other Salesforce features. Ensure data integrity across all Salesforce clouds and connected systems, handling data migrations and quality controls. Quality Assurance: Conduct unit testing, integration testing, and debugging to ensure the stability and performance of Salesforce customizations and integrations. Documentation: Create and maintain comprehensive technical documentation, including system architecture and design specifications. Collaboration: Work closely with business analysts, project managers, and stakeholders to translate business requirements into effective technical solutions. Continuous Improvement: Stay current with Salesforce platform updates and best practices across CPQ, Service Cloud, and Billing. Recommend enhancements to existing systems. What You'll Bring: Experience: 5+ years as a Salesforce Developer, with specific, hands-on experience in CPQ, Service Cloud, and Billing. Salesforce Core: Proficiency in Apex, Visualforce, Lightning Components, and Salesforce development tools. Integration Savvy: Extensive experience integrating Salesforce with external systems using REST/SOAP APIs. Platform Knowledge: Familiarity with Salesforce data models and architecture, particularly within CPQ, Service Cloud, and Billing. Certifications: Salesforce Certified CPQ Specialist and/or Salesforce Service Cloud Consultant certifications are highly preferred. Problem-Solving: Strong problem-solving skills with a focus on delivering customer-centric solutions. Communication: Excellent communication skills, enabling effective collaboration with both technical and non-technical stakeholders. Multitasking: Ability to manage multiple tasks and projects simultaneously in a fast-paced environment. Education: Bachelor s degree in Computer Science, Information Technology, or a related field, or equivalent practical experience. Preferred Qualifications: Experience with Agile development methodologies. Familiarity with Salesforce Communities, Marketing Cloud, or other Salesforce products. Knowledge of JavaScript, HTML, CSS, and other web development technologies. Experience with CI/CD tools and version control systems like Git.

Position: Workato Developer Location: Remote/Hybrid | Bengaluru, IND We're seeking a highly skilled Workato Developer to join our team. If you have deep expertise in automation, APIs, and data integration, you'll be responsible for designing, developing, and maintaining robust integration and automation solutions using the Workato platform. Your work will be crucial in streamlining business processes and enhancing system interoperability. What You'll Do: Integration Development: Design, develop, and implement seamless integrations between various systems using the Workato platform, ensuring data consistency and accuracy across all platforms. Automation: Create and manage powerful automation workflows to optimize business processes, significantly reduce manual tasks, and improve overall operational efficiency. API Management: Work with RESTful and SOAP APIs to build integrations that connect both cloud and on-premises applications, enabling smooth and efficient data exchange. Workflow Orchestration: Design and implement end-to-end workflows that span multiple systems, ensuring smooth data flow and comprehensive process automation. Data Transformation: Develop and manage complex data transformations, mappings, and logic to ensure accurate data migration and synchronization across diverse systems. Monitoring & Troubleshooting: Proactively monitor the performance of integrations and automations, identifying and resolving issues quickly to ensure continuous reliability and optimal performance. Collaboration: Work closely with business analysts, IT teams, and other stakeholders to thoroughly understand integration requirements and translate them into effective technical solutions. Documentation: Create and maintain comprehensive technical documentation for integration designs, workflows, data mappings, and any custom scripts or configurations. Continuous Improvement: Stay updated with the latest Workato features, integration patterns, and best practices. Provide valuable recommendations to enhance existing integrations and workflows. What You'll Bring: Experience: 3+ years in integration development, with at least 1-2 years of hands-on experience specifically with Workato. Workato Expertise: Strong understanding of Workato platform capabilities, including connectors, recipes, triggers, and actions. API Proficiency: Proven experience with RESTful and SOAP APIs, including API design, development, and management. Data Integration: Solid knowledge of data integration best practices, ETL processes, and data synchronization techniques. Cloud & SaaS: Familiarity with major cloud platforms (e.g., AWS, Azure, Google Cloud) and common SaaS applications (e.g., Salesforce, NetSuite, ServiceNow). Problem-Solving: Strong problem-solving skills with the ability to troubleshoot complex integration issues. Scripting: Proficiency in scripting languages (e.g., JavaScript, Python) used in automation and integration contexts. Integration Concepts: Excellent understanding of system integration concepts, including data formats (JSON, XML), messaging patterns, and error handling. Collaboration & Communication: Ability to work effectively both independently and within a collaborative team environment. Strong communication skills to translate business requirements into technical solutions. Attention to Detail: Meticulous attention to detail and a strong commitment to delivering high-quality, reliable integrations. Education: Bachelor s degree in Computer Science, Information Technology, or a related field, or equivalent practical experience. Preferred Qualifications: Certifications: Workato Automation Pro or equivalent certification. Other Platforms: Experience with other integration platforms like MuleSoft, Zapier, or Dell Boomi. Databases: Knowledge of database systems (e.g., SQL, NoSQL) and data modeling concepts. Agile Development: Familiarity with Agile development practices and tools like Jira or Confluence. Enterprise Systems: Experience in developing integrations for ERP, CRM, and other enterprise systems.

Senior Salesforce Developer Location: Bangalore, India About MaxVal Founded in 2004, MaxVal is a pioneer in IP services, emphasizing efficiency, cost-effectiveness, and continuous improvement. We leverage technology to enhance our service delivery and have developed proprietary internal applications that evolved into flagship products. Serving over 600 clients globally, MaxVal combines deep IP expertise with cutting-edge tech solutions, employing 725+ professionals passionate about innovation and customer success. Job Overview MaxVal is seeking a proactive Senior Salesforce Developer to join the Product Implementation team. You will play a key role in designing and enhancing Symphony, our Intellectual Property Management Software (IPMS) built on Salesforce, catering to high-profile clients. The role involves collaborating with distributed teams, ensuring adherence to best practices, managing deployments, and mentoring team members. Key Responsibilities Collaborate with customers, business units, and product managers to design and develop new Salesforce product features. Engage in solution architecture discussions to propose effective, scalable solutions. Lead technical discussions on customization vs. configuration decisions. Document design specs, architecture, APIs, and custom objects. Manage and lead a Salesforce development team, including offshore resources, in an Agile environment. Develop custom Salesforce functionality using Apex, Visualforce, Lightning, SOQL, REST/SOAP APIs. Ensure compliance with Salesforce governor limits and best practices. Design and implement integrations between Salesforce and other systems. Apply best practices in master data management on the Force.com platform. Lead sprint reviews to gather stakeholder feedback. Drive improvements in DevOps and deployment workflows. Troubleshoot complex support issues and implement robust solutions. Mentor junior developers and perform code/design reviews. Requirements Education & Experience: Bachelor s or Master s in Computer Science or related field, or equivalent experience. 5+ years hands-on Salesforce Force.com development experience. Proven expertise with Visualforce, Apex, Salesforce Lightning, SOQL. Experience in building and integrating REST or SOAP APIs. Experience delivering enterprise-grade Force.com applications. Technical Skills: Deep understanding of Salesforce platform products and ecosystem. Strong grasp of SDLC: coding standards, reviews, source control, testing, deployment. Experience with SSJS, SQL, Node.js, and Salesforce Administration. Preferred Certifications: Salesforce Platform Developer Salesforce Platform App Builder Force.com Advanced Development Certifications Qualification : Bachelors or Masters in Computer Science or related field, or equivalent experience.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

Senior Custom Standard Cell Design Engineer Company Arm Location India Job Overview The Solutions Engineering Physical IP team at Arm is home to some of the industry s top experts in deep submicron circuit design. This role offers an exciting opportunity to work with the custom standard cell design engineering team, contributing to cutting-edge technologies. Your work will have a long-lasting impact, as these designs will power Arm s Solutions Engineering products across infrastructure, client, automotive, and IoT market segments. Responsibilities Develop Arm custom standard cells in leading-edge sub-3nm process technology nodes. Collaborate closely with physical design engineers to co-optimize circuit and layout for improved Performance, Power, and Area (PPA) in Arm cores integrated into world-class SoCs. Work with mask design teams to provide optimally tuned layouts. Characterize and model all standard library views. Validate standard cells using comprehensive QA flows across various EDA tools. Required Skills and Experience Bachelor s degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Master s degree in Electrical Engineering with 6+ years of relevant circuit design experience. Proven experience identifying, designing, and verifying cells to optimize core and SoC level PPA. Deep understanding of MOSFET electrical characteristics, transistor-level device physics, and PPA trade-offs, especially at 3nm and below technology nodes. Expertise in designing static circuits, including state-retaining elements such as latches and flip-flops. Hands-on experience with standard cell characterization, modeling, and QA processes. Experience with standard cell characterization tools and SPICE circuit simulators. Proficiency in scripting languages such as Perl or Python. Strong interpersonal skills, with a willingness to mentor and support team members. Demonstrated problem-solving ability, persistence, and creativity in tackling difficult technical challenges. Positive team-oriented attitude, showing respect for all team members. Motivation to continuously develop new skills and take on various responsibilities. Ability to analyze complex data sets and present conclusions effectively. Nice-to-Have Skills and Experience Experience leading engineering teams, including project management and risk communication. Exposure to physical design implementation flows and sign-off processes. What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace, Arm empowers every team member to grow, succeed, and make a meaningful contribution to the company's global success. #LI-KR2 Qualification : Bachelors degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Masters degree in Electrical Engineering with 6+ years of relevant circuit design experience.

Job Overview: The Architecture and Technology Group (ATG) at Arm develops technologies and products for Arm s future architecture roadmap. In ATG, we are developing world-leading Secure CPU and System architectures and associated technologies; enabling our ecosystem to build compelling products. Along with the architecture definition, ATG develops products to confirm compliance to the architecture. The ATG team located in Bangalore develops a product called Architecture Compliance Kits (ACK) that are delivered to multiple internal and external CPU design teams to validate that Arm architecture CPU implementations are compliant with the Arm architecture. You will learn Arm Architecture and apply it along with hardware and software verification skills to develop products for verifying the Architecture. You will develop good engineering and technical skills, and a fair understanding of CPU architecture and microarchitecture. You will connect with a wide range of teams within ATG, architects, and with our external partners. In this role, you will also develop solutions for future Arm architecture developments and influence the product offering. Responsibilities: Technical expertise, understanding architecture definitions, carrying out investigations and feasibility studies, defining and developing verification strategies, and contributing to the development of compliance products. Design verification test plans and test cases in assembly, C, HVL, and higher abstraction languages using automation techniques as needed. Strong and continuous communication on deliveries and risks, ensuring that all engineering commitments are delivered successfully. Drive efficiency improvements through adoption of the right development flows and methodologies. Excellent verbal and written communication skills. Required Skills and Experience: B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering. 8+ years of verification experience (CPU/complex IP verification is a plus). Strong understanding of computer architecture. Proficiency in logical programming using C/C++/Assembly with experience in adopting software engineering best practices. Nice To Have Skills and Experience: Experience in CPU verification would be a plus. Knowledge of x86 or Arm processor architecture. We are guided by our core beliefs that reflect our culture and guide our decisions, defining how we work together to surpass ordinary and craft outstanding products and careers. In Return: We promise you endless opportunities to experiment and go even further in hardware! From architecture definition to complex core implementation to full custom physical IPs, here you'll have our backing to push limits in vital areas. #LI-KR2 Qualification : B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Web Automation Engineer (Cypress & JavaScript) Location: India (Bangalore) Experience: 3+ Years Education Qualification: B.E. in Computer Science / Electronics About Mirafra Founded in 2004, Mirafra is a fast-growing global product engineering services company specializing in Semiconductor Design, Embedded Systems, Digital Solutions, and Application Software. With over 1,500+ professionals worldwide, we provide cutting-edge solutions to Fortune 500 clients across industries such as Semiconductor, Internet, Aerospace, Networking, Telecom, Medical Devices, and Consumer Electronics. Recognitions: Best Company to Work For SiliconIndia (2016) Most Promising Design Services Provider SiliconIndia (2018) Top 10 Admired Companies for Software Services DigiTech Insight (2022) Roles and Responsibilities Test Automation & Scripting Develop, maintain, and optimize automated test scripts using Cypress for web applications. Implement and manage end-to-end (E2E) testing, integration testing, and regression testing. Automate API testing and validate backend services. Work with JavaScript/TypeScript for test case scripting and execution. Agile & Collaboration Participate in Agile development (Sprint planning, Retrospectives, etc.). Collaborate with Developers, QA Engineers, and Product Teams to enhance test coverage. CI/CD & Reporting Integrate Cypress tests with Jenkins, GitLab, and CI/CD pipelines. Monitor test execution, track defects, and provide detailed test reports. Skills & Qualifications Education: B.E. in Computer Science / Electronics Technical Expertise: Automation Testing Tools: Cypress (Web Automation), JMeter (Performance Testing) Programming & Scripting: JavaScript, TypeScript Software Development Methodologies: Agile (Scrum/Kanban) CI/CD & DevOps: Jenkins, GitLab, Docker Testing Strategies: Functional, Performance, Load, API, and UI Testing Soft Skills: Strong problem-solving and analytical skills. Excellent communication and team collaboration. Ability to work in fast-paced Agile environments. Work on innovative projects with cutting-edge web automation. Global work environment with top-tier clients. Career growth opportunities and exposure to the latest technologies. Award-winning workplace culture and industry recognition. Excited to take on a challenging Web Automation role? Apply now!

Minimum Qualifications: Bachelor's degree in Computer Science or IT-related field, or equivalent practical experience. 3 years of experience with systems automation and tooling using Python, Go, or any other programming language. 3 years of experience in managing technical infrastructure (e.g., deployment, maintenance, troubleshooting). 3 years of experience in Linux Internals, Networking, and Systems administration. Preferred Qualifications: 6 years of experience in implementing, troubleshooting, and supporting computing systems. Experience with DevOps tools such as Terraform, Puppet, Ansible, Jenkins. Experience with cloud provider ecosystems of cloud service providers. Experience in supporting large-scale complex cloud-based infrastructure. Experience in one of the High Performance Computing (HPC) Schedulers such as LSF, Symphony, NC, or SLURM. Excellent investigative, problem-solving, and communication skills. About the Job: Systems Development Engineering (SDE) at Google is a role where you manage services and systems at scale. SDEs creatively put their engineering discipline to use automating the mundane and reducing toil. We don t just write code to fix bugs but emphasize the development of tools and solutions that fix classes of problems. We know it s hard to control what you can t measure so we focus on observability: instrumenting first, then turning data into knowledge, and finally knowledge into action. We know that the operational efficiency of Google systems, services, virtual compute environments, and the operating systems that power them impact the environment, not just the bottom line. We know that working together we can do more, and that community matters. Google brings together people with a wide variety of backgrounds, experiences, and perspectives. We encourage them to collaborate, think big, and take risks in a blame-free environment. We promote self-direction to work on meaningful projects while striving to create an environment that provides the support and mentorship needed to learn and grow. Together we engineer and build the infrastructure, tools, access, and telemetry for systems that enable orchestration of Google-scale services. Come build things that matter. In this role, you will be responsible for building and operating the underlying foundation infrastructure used for designing custom silicon. This includes compute platforms, CI/CD, Cloud, groups and Access Control Lists (ACLs), source control, dashboards, resource economy, and bench labs used by silicon engineers in their daily work. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities: Ensure the timely delivery of silicon designs using Google Cloud Platform (GCP) within a fluid environment. Monitor and uphold high standards for internal services on Google Cloud. Provide support, maintain, and deploy team-supported infrastructure and documentation. Collaborate closely with engineering teams to implement and develop on Google Cloud infrastructure. Automate tasks wherever needed. Qualification : Bachelor's degree in Computer Science or IT-related field, or equivalent practical experience.

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Minimum Qualifications: Bachelor s degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. At least 5 years of experience in software development, specifically within consumer electronics or embedded systems. A minimum of 3 years of experience in leading ASIC architecture decisions from a software perspective. Proficiency with Linux kernel, bootloaders, SoC, low-power management frameworks, or performance analysis. Preferred Qualifications: Master s degree or PhD in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related discipline. 10 years of experience in software design and development, particularly with software layers in ASIC (e.g., boot processes, drivers, embedded firmware, libraries, and APIs for applications). Familiarity with Android OS or similar platforms, especially in power management. Strong understanding of hardware-software interactions across various hardware blocks, including CPUs and accelerators. About the Role: Join a dynamic, diverse team that is pioneering the development of custom silicon solutions powering the future of Google's direct-to-consumer products. As part of the team, you will contribute to groundbreaking innovations in products used by millions globally, shaping the next generation of hardware experiences for optimal performance, efficiency, and integration. As the ASIC Platform Software Architect, you will be instrumental in translating software product requirements and use cases into specific hardware blocks or sub-systems. In this role, you will define the direction of the software team, guiding them in the face of complex constraints. You will work closely with hardware architects to define system architectures for hardware blocks and collaborate with the implementation team to outline solutions. You ll also help influence design decisions to ensure software requirements are met, negotiating hardware/software trade-offs for optimal results. Google's mission is to organize the world s information and make it universally accessible and useful. Our Devices & Services team integrates the best of Google AI, software, and hardware to create transformative user experiences. We focus on researching, designing, and developing new technologies and hardware to make user interaction with computing faster, more seamless, and more powerful. Whether we re innovating on form factors, advancing sensors, or redefining interaction methods, the Devices & Services team is dedicated to improving people's lives through technology. Responsibilities: Collaborate with stakeholders to identify user experience needs and map them to hardware and software solutions. Design architectures and software interfaces that empower developers to leverage hardware accelerators and other intellectual property (IP). Analyze hardware component interactions, troubleshoot issues, propose trade-off solutions, and drive to resolution. Contribute to the design and improvement of hardware from one generation to the next, applying insights from past productization efforts and reducing technical debt.

Job Description The Client Development Group (CDG) is looking for Physicial Design Engineers with following Responsibilities - Creates bottoms up elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction and schematic layout verification. Debug using phases of physical design development including parasitic extraction ,clock generation, custom polygon editing, auto place and route algorithms, floor planning, full chip assembly, RV DFM Density and verification. Troubleshoots design issues and applies proactive intervention. May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments. Qualifications You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing. Experience, Skills, Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs. Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan. Ability to comprehend issues of RC delay electromigration, selfheating and cross capacitance. Ability to recognize failure prone layout structures and proactively contact engineers for guidance and produce electrically robust layout. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Other Locations IN, Hyderabad Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel Qualification : You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing.

Android Framework Engineer Location: Bengaluru Experience: 3 6 years Job Description We are looking for a skilled Android Framework Engineer with strong experience in Linux kernel and embedded systems to work on Android platform development, particularly in the Infotainment domain. The ideal candidate will have a solid understanding of Linux internals and expertise in driver porting and kernel troubleshooting. Key Skills & Requirements Hands-on experience with Linux Kernel, device drivers, and embedded Linux systems. Strong knowledge of Linux internals, real-time Linux (RT), and Android Linux Kernel. Experience with Linux driver porting for UFS, file systems, I2C, SPI, Ethernet, UART, and display interfaces. Proven ability to analyze and resolve kernel crashes and related issues. Experience contributing to or collaborating on open-source Linux development projects. Prior exposure to the Infotainment domain is a strong plus. If you re passionate about advancing Android framework development and thrive in embedded Linux environments, this role is an excellent opportunity to make a significant impact.

Android HMI Engineer Location: Bengaluru Experience: 4 10 years Job Description We are seeking a skilled Android HMI Engineer with hands-on experience in developing Android applications for automotive infotainment systems. The ideal candidate will have strong Java programming skills, a deep understanding of Android components, and expertise in UI/UX architectural patterns. Key Responsibilities Develop and maintain Android applications tailored for automotive infotainment platforms. Manage Android component lifecycles effectively to ensure optimal performance. Write clean, efficient, and maintainable code primarily in Java; Kotlin knowledge is a plus. Debug and troubleshoot using tools like Logcat, ADB, and other Android debugging utilities. Apply solid OOP concepts and design principles. Implement architectural patterns such as MVP, MVVM, and Observer to build scalable applications. Integrate third-party libraries, APIs, and Android SDK features into applications. Work proficiently with Android Studio IDE and related development tools. If you re passionate about automotive HMI development and want to work on cutting-edge infotainment systems, this is a fantastic opportunity to grow your career.

Red Team Hacker / Pen Tester (Onsite, Bangalore) Who We Are ColorTokens We re on a mission to keep businesses running safe and sound even when cyber attackers try to mess things up. Our next-gen platform, ColorTokens Xshield , stops ransomware and malware from spreading sideways inside companies, so critical stuff stays locked down and working. We ve got mad skills in spotting and controlling traffic between all kinds of devices and users from your typical laptops to IoT and medical gadgets. That means we can slice and dice security zones to keep bad actors contained. Forrester calls us a Leader in Microsegmentation (Q3 2024), and we help global companies avoid big $$$ downtime. Our Vibe We re all about hustling with heart. You ll get to own your projects, work with smart teammates, and solve tough problems that actually protect people from kids in hospitals to entire cities. If you re driven, curious, and ready to make a real impact, you ll fit right in. The Gig What You ll Do Run epic red team ops that mimic real-world hackers trying to break in. Hack (ethically!) into networks, apps (web, mobile, APIs), and cloud setups to find weaknesses. Build your own scripts and tools to level up your tests and dodge detection. Team up with defenders (blue team) to boost how we spot and stop attacks. Write clear, no-fluff reports with proof-of-concept hacks and smart fixes. Keep your finger on the pulse of the latest threats and hacker tricks. Jump into purple teaming and adversary simulations to sharpen our edge. Bachelor s in Cybersecurity, CS, or you ve got real-world chops that match. 6+ years deep in red teaming, pentesting across web, APIs, infrastructure, and cloud. Pro with tools like Cobalt Strike, Metasploit, Nessus, Burp Suite, Nmap, and scripting (Python/PowerShell/Bash). Solid grasp of MITRE ATT&CK, threat modeling, and adversary emulation. Know Windows & Linux inside out, Active Directory, plus cloud platforms (AWS, Azure, GCP). Bonus points if you re into social engineering, phishing, or physical security. Skilled at writing docs that actually make sense. Must-have certifications: OSCP is a must; CRTP, OSCE, OSEP, CRTE, GPEN, GXPN are pluses. Qualification : Bachelor's degree in Cybersecurity, Computer Science, or related field (or equivalent experience).

Job Title: Senior Software Engineer Customer Solutions Location: Bengaluru, India Employment Type: Full-time Department: Engineering About Commure Commure is revolutionizing healthcare with AI-powered technologies designed to eliminate administrative overhead and give clinicians more time with patients. Our platform combines advanced LLM AI, RTLS, and workflow automation to streamline clinical operations, improve patient engagement, and enhance care delivery. We support 250,000+ clinicians across hundreds of care sites nationwide and we re just getting started. If you're passionate about building life-changing solutions in one of the world s most vital industries, now is the time to join. About the Role As a Senior Software Engineer on the Customer Solutions team, you ll be instrumental in building and customizing applications on top of our Patient Experience Platform to address client-specific needs. Your work will directly impact how healthcare providers interact with our technology and serve patients better. Key Responsibilities Translate business and client requirements into scalable, maintainable technical solutions. Design, develop, and integrate customized applications and services using our core platform. Collaborate with internal teams and customers to prioritize features and maintain a customer-focused development backlog. Build long-term client relationships through technical leadership and delivery excellence. Implement and maintain observability through logging, monitoring, and alerting systems. Apply SRE and DevOps practices to improve stability and incident response. Coordinate testing and quality assurance activities in collaboration with QA teams. Stay informed on healthcare tech trends and integrate innovations into the platform. Participate in client-facing meetings to advise on feasibility, risks, and technical trade-offs. Mentor junior engineers and contribute to a strong engineering culture. Required Qualifications Bachelor's or Master s degree in Computer Science, Engineering, or a related field. 3+ years of professional software development experience. Frontend: React, Next.js, TypeScript Backend: Python, Node.js Cloud: Proficiency in AWS, Azure, or GCP with experience in cloud-native architectures CI/CD: Familiarity with tools like GitHub Actions, Google Cloud Build, etc. Infrastructure: Experience with Docker, Kubernetes, and IaC principles Monitoring & Observability: Implemented logging, tracing, and alerting systems Production Support: Experience with on-call rotations and incident response Strong communication and collaboration skills with cross-functional teams Experience working directly with clients to deliver technical solutions Understanding of APIs, webhooks, and third-party system integrations in healthcare Preferred Skills Familiarity with HIPAA, FHIR, HL7, and other healthcare standards Understanding of data privacy, compliance, and security best practices Strong problem-solving abilities and adaptability in dynamic environments Experience in client support, customization, or professional services engineering is a plus Why You ll Love Working at Commure + Athelas Mission-Driven Work Help transform healthcare through meaningful technology. Elite Backing Backed by General Catalyst, Sequoia, Y Combinator, and more. Explosive Growth 500%+ YoY growth pre-merger and Series D funded. Competitive Benefits Flexible PTO, health insurance, parental leave, and more (location-specific). Be part of the future of healthcare. Join Commure and help build intelligent, scalable systems that truly matter. Qualification : Bachelor's or Masters degree in Computer Science, Engineering, or a related field.