Design Methodology Jobs in Bengaluru

Position: Senior Java Web Backend Engineer Job Type: Full-time Location: Bengaluru Department: Engineering About BlueOptima: At BlueOptima, our vision is to become the global reference for optimizing the performance of software engineers across all industries. We provide industry-leading objective metrics in software development, enabling large organizations to deliver better software, faster, and at a lower cost through technology that pushes the limits of what has been done before. As a fast-growing global company, we ve consistently doubled our headcount and revenue year over year, without external investment. Our headquarters is in London, with additional offices in Mexico, India, and the US. Our diverse team consists of 210+ employees from 34+ nationalities and speaks over 25 languages. We foster an open-minded environment and encourage employees to create their own success stories within this high-performance atmosphere. Job Description: We are looking for a Senior Java Web Backend Engineer with extensive experience in designing, building, and maintaining scalable SaaS applications using Java/J2EE technologies. The ideal candidate will be a tech enthusiast, committed to excellence, and eager to take on a leadership role as a mentor to a team of talented engineers. You ll be part of a self-managed Agile team, where you will actively contribute to improving development processes, bringing new ideas to the table, and proposing improvements in methodology, management, and organization. Key Responsibilities: Application Development & Maintenance: Design, develop, implement, test, and maintain application software components. Requirements Analysis: Analyze client requirements and convert them into technical specifications, ensuring alignment with project goals. Feature Ownership: Take ownership of development for new features and continuous improvements to the platform. Performance Optimization: Identify and resolve performance bottlenecks, ensuring high scalability and efficiency of the system. Architecture Improvement: Identify architectural inefficiencies, and create and execute a roadmap to address and resolve them. Leadership & Mentorship: Lead and mentor junior developers, fostering their technical growth and career development. Client Interaction: Provide technical support to client-facing teams and occasionally interact with clients to resolve issues related to your component. What You Need to Succeed at BlueOptima: Education: Minimum Bachelor's degree in Computer Science or equivalent. Self-Sufficiency: Ability to work autonomously with minimal supervision. Problem-Solving Skills: Strong analytical and problem-solving capabilities, coupled with a can-do attitude. Agile Methodologies: Experience with Agile methodologies (e.g., SCRUM, Sprints) and leading small Scrum teams. Commitment to Excellence: Focused on completing tasks efficiently and reliably while identifying the best approach to solving complex problems. Must-Have Technical Skills: Java Expertise: 5+ years of experience with Java, J2EE/Java EE, Spring, and Spring Boot. Architectural Knowledge: Solid understanding of Monolithic, SOA, and Microservices architectures. Concurrency & Thread-Safety: Strong knowledge of Java concurrency patterns and experience building thread-safe applications. Database Skills: Expertise in relational databases, partitioning, indexing techniques, and SQL (PostgreSQL). System Design: Experience creating high and low-level design documents based on application architecture. Linux Proficiency: Familiarity with Linux shell and command-line tools. Testing Skills: Strong grasp of unit testing and integration testing frameworks. Cloud Platform Experience: Hands-on experience with cloud platforms like AWS, Azure, or Google Cloud (e.g., S3, EC2, Lambda). Message Queues & Streaming: Familiarity with message queues (e.g., Kafka, RabbitMQ, SQS) for high-performance, scalable systems. Monitoring & Logging: Experience with monitoring and logging tools (e.g., Prometheus, Grafana, Datadog, ELK Stack, Splunk). At BlueOptima, we believe in accelerating your career progression. You ll have the opportunity to strengthen your skills, take on diverse challenges, and quickly grow within the organization. We support your development every step of the way, with a clear path to leadership and technical expertise in a fast-paced, innovative environment. Qualification : Bachelor's degree in Computer Science or equivalent

Electrical Principal Engineer FPGA Team Location: Bengaluru, India Team: Electrical Engineering Company: Dell Technologies Role Overview As a Principal Electrical Engineer, you will contribute to the architecture, design, and validation of FPGA-based hardware systems for Dell s next-generation enterprise servers. This role involves working across global teams to deliver robust, scalable, and efficient PCBA (Printed Circuit Board Assembly) and logic solutions that align with industry standards and internal requirements. Key Responsibilities Architect and design next-gen hardware features in collaboration with front-end teams and partners. Analyze and recommend trade-offs in design features and costs. Guide global teams with best practices in electronic hardware design. Own and deliver system interfaces and support cross-functional development efforts. Create comprehensive documentation for testing and validation. Essential Requirements 8 12 years of experience in FPGA hardware verification using Verilog, SystemVerilog, VHDL. Expertise in UVM, ABV (Assertion-Based Verification), code coverage, and unit-level simulation. Knowledge in digital design methodologies: CDC (Clock Domain Crossing) RDC (Reset Domain Crossing) Static timing analysis Experience with x86 or ARM architectures. Familiarity with peripheral protocols: I2C, I3C, SMBus, IPMI, IPMB. Strong background in both analog and digital design. Understanding of hardware/software co-design and debugging complex systems. Desirable Qualifications Experience with Intel/AMD x86 and ARM-based systems. Hands-on with FPGA tools: Xilinx, Lattice, Altera Quartus, ModelSim/QuestaSim. Passion for mentoring and knowledge sharing. Dell Technologies offers a collaborative and innovative environment where hardware engineers work at the forefront of industry advancements. You'll be empowered to lead cutting-edge hardware projects, influence product design, and make a lasting impact on the future of enterprise technology.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Job Title: Associate Software Developer Location: Bengaluru, India Company: IBM Consulting Introduction A career in IBM Consulting is rooted in long-term relationships and close collaboration with clients globally. You will work with visionaries across multiple industries to improve hybrid cloud and AI journeys for the most innovative and valuable companies in the world. Your ability to accelerate impact and create meaningful change for your clients is supported by our strategic partner ecosystem and robust technology platforms across the IBM portfolio, including Software and Red Hat. Curiosity and a constant quest for knowledge are the foundation of success in IBM Consulting. In this role, you ll be encouraged to challenge the norm, explore ideas beyond your direct responsibilities, and come up with creative solutions that result in groundbreaking impacts for a broad network of clients. Our culture of evolution and empathy focuses on long-term career growth and development, providing opportunities to grow in an environment that embraces your unique skills and experiences. You ll work in one of our IBM Consulting Client Innovation Centers (Delivery Centers), where we provide deep technical and industry expertise to both public and private sector clients around the world. Our delivery centers enable clients to access locally-based skills and technical expertise, helping drive innovation and the adoption of new technology. Your Role and Responsibilities As an Associate Software Developer at IBM, you will work with clients to co-create solutions for major real-world challenges using best practice technologies, tools, techniques, and products. You will be responsible for translating system requirements into the design and development of customized systems. Your responsibilities will include: System Architecture & Development: Work across the entire system architecture to design, develop, and support high-quality, scalable products and interfaces for clients. Collaboration & Technical Specifications: Collaborate with cross-functional teams to understand project requirements and define technical specifications, particularly for generative AI projects. Design Thinking: Employ IBM s Design Thinking methodology to create products that offer an excellent user experience while ensuring high performance, security, quality, and stability. Database and Framework Expertise: Work with a variety of relational databases (e.g., SQL, Postgres, DB2, MongoDB), operating systems (e.g., Linux, Windows, iOS, Android), and modern UI frameworks (e.g., Backbone.js, AngularJS, React, Ember.js, Bootstrap, and JQuery). Product Development: Create mockups, UI components, algorithms, and data structures as part of delivering viable products for clients. Required Education Bachelor s Degree in Computer Science, Software Engineering, or a related field. Preferred Education Master s Degree in Computer Science, Software Engineering, or a related field (preferred, but not required). Required Technical and Professional Expertise Experience: 3-5 years of professional experience in software development. Technical Solution Translation: Ability to translate business requirements into technical solutions. Open Source Technologies: Familiarity with working in Open Source environments and technologies, particularly Python and Django. Web Services & Frameworks: Exposure to web services, application frameworks, and databases. Cloud Platforms: Familiarity with cloud platforms such as AWS, Azure, IBM Cloud, and Google Cloud. Generative AI Knowledge: Exposure to generative AI methodologies and ethical considerations in AI development. Preferred Technical and Professional Experience Full-Stack Development: Flexibility to work across architecture, building both front-end and back-end solutions. Code Quality and Automation: Help maintain and improve code quality, organization, and automation processes. Version Control: Proficiency in using Git repositories for version control and collaborative development. About IBM Consulting IBM Consulting is IBM s global consulting and professional services business, recognized for its market-leading capabilities in business and technology transformation. With deep industry expertise, we offer strategy, experience, technology, and operations services to many of the most innovative and valuable companies in the world. Our people are driven by the power of collaboration, aiming to accelerate clients' business success. At IBM Consulting, we believe in the responsible use of technology to help people, partners, and the planet. Qualification : Masters Degree in Computer Science, Software Engineering, or a related field (preferred, but not required).

Job Title: AWS / Azure Architect Job Overview: We are seeking a skilled and experienced AWS / Azure Architect to join our team. This individual will be responsible for transforming customer business requirements into innovative, scalable solutions based on Java and other open-source technologies. You will lead architecture discussions, oversee the implementation of solutions, and provide technical guidance to development teams to ensure successful project execution. Key Responsibilities: Solution Design & Architecture: Translate business requirements into cutting-edge, efficient technical solutions using Java and open-source technologies. Lead the architectural discussions and design the overall solution framework, ensuring it aligns with business goals. Define development structures, standards, and best practices for solution implementation. Implementation & Guidance: Take a hands-on approach in the implementation of solutions, providing technical direction to implementation teams. Design and implement Continuous Integration / Deployment (CI/CD) pipelines. Develop and maintain technical documentation to ensure clarity and knowledge sharing. Pre-Sales Support: Participate in Request for Proposals (RFPs) and Proof of Concept (PoC) / Proof of Value (PoV) creation. Present and communicate architectural solutions effectively to prospects and clients, building confidence in the proposed solutions. Research & Development: Stay updated on the latest technological advancements in Java, open-source technologies, cloud computing, and microservices. Share new insights with the team and continuously improve the organization's technical capabilities. Technical Skills & Experience Required: Cloud Infrastructure & Architecture: 10-12 years of experience in designing and delivering enterprise-level solutions, with a focus on Java/Python technologies. 5-6 years of hands-on experience in architecting solutions on AWS and/or Azure. Expertise in cloud architecture, including hybrid infrastructures, multi-zone/cluster setups, and disaster recovery design. Core Technical Knowledge: Strong understanding of cloud design principles, including scalability, resiliency, and high availability. Extensive experience with database systems (SQL & NoSQL) and microservices architectures. Knowledge of key technologies like Docker, Kubernetes, and containerization concepts. Software Engineering & Development: Proficient in data structures, algorithms, design patterns, and application design methodologies. Expertise in developing and deploying RESTful web services, with a focus on performance and security. Familiarity with Test-Driven Development (TDD) and Behavior-Driven Development (BDD) practices, using tools like JUnit and TestNG. Cloud-Specific Expertise: In-depth knowledge of cloud platforms (AWS / Azure), including infrastructure setup, services, networking, security policies, and Kubernetes (EKS). Experience in deploying enterprise-level applications on cloud platforms, managing production environments, and optimizing performance. Preferred Qualifications: Hands-on experience with cloud-native application architectures. Familiarity with CI/CD pipeline setup and automation tools. Strong problem-solving abilities and the capability to mentor and lead cross-functional teams. What We Offer: The opportunity to work on cutting-edge cloud solutions for enterprise clients. A collaborative and dynamic work environment. Opportunities for career growth and continuous learning in the cloud computing space.

Company Overview Intuit is a global financial technology platform that drives prosperity for individuals and communities worldwide. Serving approximately 100 million customers through renowned products like TurboTax, Credit Karma, QuickBooks, and Mailchimp, we are dedicated to creating innovative solutions that empower everyone to prosper. We are constantly evolving to ensure that we can make this vision a reality for people everywhere. Job Overview At Intuit, we are committed to creating the future of financial technology by empowering people through innovation. The Experience Design team plays a pivotal role in bringing this vision to life. Our designers are deeply involved at every stage of product development from gathering insights and brainstorming ideas to prototyping, experimentation, and launching polished, user-friendly designs. We are innovating with technologies like machine learning and conversational UI to make every interaction seamless and delightful. We are looking for a Senior Design Leader to join the Go To Market (GTM) Technology team. This team is responsible for delivering some of the most critical customer-facing experiences across Intuit s entire ecosystem, including tools for monetization and experimentation. As part of the GTM Tech team, you will lead the design of Monetization experiences that include both pre-purchase and post-purchase customer interactions, impacting the success of Intuit's products. You will be responsible for designing and implementing a Monetization design system and overseeing projects within the Intuit Enterprise Suite. Additionally, you will lead a small team of designers and collaborate with external agencies, ensuring high-quality and impactful design solutions. This is a highly strategic role that offers the opportunity to influence monetization design across Intuit s products and to work at the intersection of marketing technology, personalization, and AI-driven experimentation. Responsibilities Design Leadership & Strategy Lead the design of Monetization experiences, focusing on both pre-purchase and post-purchase customer interactions, as well as sales-driven actions. Develop and lead the Monetization design system and contribute to the design of the Intuit Enterprise Suite. Be a role model in applying user-centered design (UCD) methodologies and design principles to solve customer challenges. Own the inputs for design strategy, design processes, design systems, and information architecture. Cross-Functional Collaboration Lead cross-functional collaboration with product management, product development, and project management teams to ensure timely and high-quality delivery of design solutions. Serve as the voice of design, advocating for design vision and solutions to business, product, and technology stakeholders. Team Leadership & Mentorship Lead and mentor a team of 2-3 full-time designers, helping them grow their design craft and develop key hard and soft skills. Collaborate with third-party design agencies to ensure efficient design production and on-time delivery. Work at Scale & Innovation Lead and execute the design of complex, large-scale projects that involve high-level design systems and reusable component libraries. Drive innovation by applying cutting-edge interactive design, including Generative AI and personalization technologies. Qualifications Experience: 15-18 years of experience in interaction design, product design, service design, or related fields. At least 10 years of experience managing and leading UX/UI designers. Education: Bachelor s or Master s degree in Product Design, Human-Computer Interaction, Interaction Design, or a related field. Alternatively, a Certified Usability Analyst certification is also acceptable. Skills & Expertise: Proven experience in applying user-centered design methodologies such as user-centered analysis, information architecture, task-flow design, and usability testing. Deep knowledge of design principles and the ability to apply them to create intuitive, user-friendly designs. Experience working with design systems and reusable component libraries. Additional Attributes: Highly organized, self-directed, and able to manage multiple, complex projects efficiently. Ability to build positive, collaborative relationships across teams and functions. Strong communicator and presenter with the ability to advocate for design vision and ideas effectively. Experience working with cross-functional teams and external agencies to ensure high-quality and timely delivery of designs. This role offers an exciting opportunity to lead design efforts that directly shape the future of monetization experiences and customer engagement across Intuit s ecosystem. You will work with cutting-edge technologies like Generative AI and personalization to create innovative and impactful solutions for millions of users around the world. If you're a visionary design leader passionate about creating customer-centric, innovative solutions at scale, we d love to hear from you. Join us and be part of a dynamic team that values creativity, collaboration, and leadership. Apply Now and help us shape the future of financial technology! Qualification : Bachelors or Masters degree in Product Design, Human-Computer Interaction, Interaction Design, or a related field.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Title: RTL Design Engineer Job Description: Join Intel s Design Team and contribute to the development of high-quality Intel products. In this role, you will work on RTL tool flow methodologies, leveraging industry-standard design tools and scripting environments such as Perl and Python to enhance design automation and optimization. Key Responsibilities: Work on digital design concepts and RTL design using Verilog. Develop and implement RTL tool flow methodologies to optimize design efficiency. Utilize industry-standard design tools to enhance digital design workflows. Develop scripts using Perl and Python to automate design processes. Apply computer architecture knowledge to drive innovations in design methodologies. Qualifications & Requirements: Educational Qualifications: Master s (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions. Technical Skills & Experience: Strong understanding of digital design concepts and computer architecture. Experience with RTL design using Verilog. Proficiency in scripting languages such as Perl and Python for automation. Familiarity with industry-standard design tools and RTL tool flow methodologies. About the Client Computing Group (CCG): The Client Computing Group (CCG) at Intel leads the development of PC products and platforms, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. By collaborating with industry partners, CCG delivers cutting-edge computing experiences that enable users to create, connect, and innovate. As Intel s largest business unit, CCG plays a pivotal role in driving technological advancements and product innovation. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development and career growth opportunities. Qualification : Masters (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions.

Job Title: CPU/Core Design Engineer (Intern) Job Description: Join Intel s Core and Client Development Group (C2DG) and contribute to the development of leading-edge CPU and Core technologies. In this role, you will be involved in CPU/Core design activities across various domains, supporting Intel s ongoing and next-generation Core CPUs. Key Responsibilities: Contribute to CPU/Core logic design for Intel s high-performance processors. Support pre-silicon verification, system validation, and firmware development. Assist in physical design, layout, and DFT (Design for Testability) engineering. Work with cross-functional teams to ensure high-quality and efficient CPU designs. Utilize industry-standard tools and methodologies for design and validation processes. Qualifications & Requirements: Educational Qualifications: Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in: Microelectronics & VLSI Digital System Design Computer Architecture Preferred Skills: Logic Design and digital circuit design fundamentals. Pre-Silicon Verification using simulation and validation techniques. Physical Design & Layout methodologies for semiconductor products. DFT (Design for Testability) Engineering. System Validation for ensuring reliability and performance. Firmware development related to CPU architecture and microarchitecture. About the Core and Client Development Group (C2DG): The Core and Client Development Group (C2DG) is a global organization responsible for the development and integration of SoCs, Core processors, and critical IPs that power Intel s flagship products. C2DG drives the client roadmap for Intel s Client Computing Group (CCG), delivers server-first cores for Data Center Group (DCG), and invests in future disruptive technologies. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive pay, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career growth. Qualification : Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in:

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

About NVIDIA NVIDIA has continually reinvented itself. From pioneering the GPU fueling the growth of the PC gaming industry and transforming modern computer graphics to revolutionizing parallel computing, we have consistently shaped the future of technology. Today, NVIDIA GPUs drive innovation in artificial intelligence (AI), providing highly scalable, parallel computation that powers groundbreaking advancements across industries. We are a company that thrives on learning, evolution, and tackling the world s most complex challenges. Join us, and you ll be part of a diverse, innovative, and supportive team that inspires everyone to achieve their best work. About the Role: SOC Design Engineer The System-On-Chip (SOC) group at NVIDIA is expanding! As the complexity of SOCs grows with chips now integrating tens of billions of transistors we are seeking a talented SOC Design Engineer with a passion for RTL integration and chip-level front-end design. This role focuses on padring design, pinmuxing, SOC assembly, and retiming. If you enjoy developing methodologies and automation solutions to optimize SOC creation, this is the opportunity for you. In this role, you will work on NVIDIA s advanced Tegra SOCs, collaborating closely with cross-functional teams, including System Architecture, Physical Design, CAD, and DFT. You will help define and implement scalable and efficient SOC design methodologies for future technologies. What You ll Be Doing Drive SOC assembly and design chip-level functions for Tegra SOCs. Perform front-end design quality checks, reviews, and collaborate with cross-functional teams to resolve issues. Oversee SOC execution across key milestones by defining, tracking, and managing complex dependencies with multiple stakeholders. Develop system-level methodologies, tools, and IPs to enable efficient and scalable SOC design. Identify and address inefficiencies in front-end chip implementation processes, implementing solutions for continuous improvement. What We Need to See B.Tech or M.Tech in Electronics Engineering or a related field. 2+ years of proven experience in chip design, with a focus on SOC integration and design automation. (Experience with padring design and fuse/floorsweep is a plus.) Strong analytical and problem-solving skills. Proficiency in RTL design (Verilog) and knowledge of SOC design/implementation flows. Experience with scripting languages such as Perl, Python, or other industry-standard tools. Exposure to multiple chip design functions, enabling collaboration and problem-solving across diverse teams. Excellent communication and collaboration skills with a team-oriented mindset. Bonus Skills: Experience in SOC verification, synthesis, physical design, and DFT. Familiarity with RTL build flows and Makefiles. At NVIDIA, you ll work on technologies that make a lasting global impact. We believe in fostering a diverse, inclusive work environment where everyone can grow and thrive. NVIDIA is proud to be an equal opportunity employer and does not discriminate based on race, religion, gender identity, age, disability status, or any other protected characteristic. Qualification : B.Tech or M.Tech in Electronics Engineering.

Job Description: Arm has excellent opportunities in the Solution Engineering group - which has a charter to develop best-in-class SoCs and compute subsystems using industry-leading Arm IP products. These solutions target different market segments like premium mobile, servers, automotive, and IoT. The pre-silicon verification team in Bangalore is looking for highly-skilled engineers with experience in system validation of SoCs on Emulation platform. Responsibilities: Be part of the verification team, and define the emulation-based stress validation methodology & build verification plans. This will involve closely interacting with multiple cross-site & co-located collaborators like the SoC architects, designers, & DV engineers to come up with the extended stress validation plans for the product. Work on multiple industry-standard emulation platforms from EDA vendors, and closely collaborate with technology teams to resolve issues with porting the design on these platforms, and to improve Arm's validation methodology on emulation Take up the responsibility to identify & enable transactors, traffic exercisers, virtual host devices, and monitors on the emulation platform - which will help effective validation of the SoC design. You will be accountable for planning and developing bare-metal and OS-based test content for system stress and use-case validation targeting multiple product use-cases. The team is responsible to find bugs by enabling validation content on high-speed subsystems like PCIe, Ethernet, USB, etc. and other subsystems like DDR, HBM, UFS, HDMI, MIPI devices, LSIO, etc. on emulation Mentor junior engineers and work as a team to deliver on validation goals. Skills and experience required: 5 to 15 years of proven hands-on experience in SoC/subsystem validation. Emulation-based verification experience is a big plus. Prior knowledge of at least one of the blocks like CPU, PCIe, DDR, Ethernet, DDR, USB, etc. Experience working on industry-standard emulators, and validation using transactors or virtual devices will be a plus C/C++ skills with strong understanding of how software interacts with the SoC, firmware, and hardware components is a requirement. Understanding of OS/Linux, drivers and kernel modules is desired. Expertise on hardware behavioral language (Verilog, SystemVerilog) Knowledge of scripting (e.g. Tcl, Perl, Python etc.) In return: Our offices are amazing places to collaborate. If you are interested, but unsure whether you tick all the boxes, we still would love you to reach out! We are keen to welcome people with versatile skills and experience into Arm! Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

About the Role: Our Ins Tech professionals are essential to achieving the company's business goals by delivering valuable services to our Insurance Solutions business unit. As a Software Developer, you will play a key role in this success by designing, developing, testing, and supporting software applications. This includes collaborating with architects and analysts, participating in project planning, conducting code reviews, and mentoring junior staff. Key Responsibilities: Design, develop, and test software according to specifications. Provide production support, including 24x7 on-call availability. Consult with the Systems Architect and Systems Analyst. Participate in project planning activities. Conduct code reviews and provide feedback on best practices. Coach and mentor junior team members. Stay current with IT industry trends. Qualifications: Bachelor's degree in Computer Science or an equivalent combination of education and experience. Minimum of 5+ years of experience in a software developer role. Experience with client-server environments. Highly Desired: Proficiency in Eclipse IDE, Microfocus COBOL, JSP, JavaScript, Web Services, OOREXX, and PowerShell. Preferred: Experience with Control-M, GIT, and BitBucket. Strong Asset: Knowledge of the insurance industry and the Ingenium application. Preferred: Experience with automated testing tools like Selenium. Preferred: Experience with iterative development using Agile in a multi-site environment. Strong initiative and adaptability to change. Excellent customer service and communication skills. Solid understanding of software design, methodologies, and documentation standards. Proven leadership skills and a commitment to customer service. Strong analytical and problem-solving skills. Excellent organizational skills and a quality-focused approach. Equal Opportunity Employer: We are an equal opportunity employer committed to diversity and inclusion. All qualified applicants will receive consideration for employment without regard to age, race, color, national origin, ancestry, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, religion, physical or mental disability, military or veteran status, genetic information, or any other status protected by applicable state or local law. Qualification : A degree in computer science or an equivalent combination of education and experience

Job Overview As a Tools Support & Infrastructure Engineer at Qualcomm, you'll play a vital role in supporting and enhancing the design flows and infrastructure for Qualcomm's Digital Signal Processing (DSP) team. The DSP design team delivers high-performance DSP cores that are integral to Qualcomm's multi-tier SoC roadmap, particularly for mobile applications. This position involves managing DSP design databases, developing automation tools to streamline the verification process, and collaborating with global teams to optimize design efficiency and quality. Key Responsibilities Manage DSP Design Database: Oversee the DSP design database, supporting design and verification teams with infrastructure needs. Build Automation: Create new automation tools to enhance the productivity of design verification teams, making it easier to debug simulation failures. Collaborate with Global Teams: Work with Qualcomm s global DSP design teams (architecture, implementation, post-silicon, and back-end teams) to enhance DSP IP infrastructure. Improve Tool Methodologies: Design and deploy new tool methodologies to continuously improve the quality, efficiency, and effectiveness of design and verification processes. Support Design Flows: Contribute to and improve design flows, ensuring the seamless integration of tools and resources used by design teams. Minimum Qualifications Educational Requirements: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 6+ years of relevant work experience, or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 5+ years of relevant work experience, or PhD in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of relevant work experience. Skills & Experience Programming & Tools Support: 3-10 years of experience in programming, database management, and providing tools support for complex DSP IP designs. Automation Expertise: Extensive experience in building automation tools that improve design and verification processes. Programming Languages: Expertise in C++ and Java. Scripting & Automation: Proficiency with scripting languages and tools such as Perl, Python, Shell, Makefiles, and TCI. Analytical Skills: Strong analytic, programming, and debugging abilities. Object-Oriented Programming (OOP): Deep understanding of OOP concepts. Web Programming: Familiarity with Java for web programming is a plus. Unix Environment: Solid understanding of the Unix environment. Digital Design Flows: Knowledge of digital design flows is a plus. Communication: Excellent interpersonal and communication skills, with the ability to work collaboratively with global teams.

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Additional Job Description Additional Job Description Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team at Qualcomm. Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute. Responsibilities Design, develop, and maintain CAD infrastructure for silicon design teams enabling bringup, test and debug automations. Collaborate with silicon designers, architects, silicon validation engineer, and other stakeholders to to improve future CPU bringups Define and implement new infrastructure capabilities that can be used to accelerate design utilizing multi-site datacenters. Prepare for CPU bring up through pre-work on emulation and FPGA platforms Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs Troubleshoot and resolve issues related to CAD infrastructure, including hardware and software problems Support design engineers on the flow setup and resolve their queries Develop test contents and testing strategies to assist validation of CPU on silicon Qualifications Must have strong object-oriented programming abilities in Python. Must have knowledge and experience with silicon bringup and debugging Must have worked on Digital flows/methodologies development in the Emulation, pre-silicon and/or post-silicon. Familiarity with firmware and software debug, Silicon bring up and validation of CPU features. MS/BS in Electrical/Computer Engineering with 10+ years of demonstrated experience in CAD or EDA tools flows architecture, development, and support. Ability to document design methodologies & provide training on tools and workflows to design teams Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains Proven track record of pushing Prior experience debugging vendor tool problems Strong written and verbal interpersonal skills and track record of success in a collaborative team environment

General Summary: Qualcomm CDMA Technologies (QCT) is the world s largest provider of wireless chipset technology, leading the way in 5G and Wi-Fi advancements. As an inventor-driven company, Qualcomm is committed to transforming industries and creating new possibilities through groundbreaking connectivity technologies. Qualcomm is currently seeking experienced WLAN Digital Designers for its Wireless R&D team in Bangalore. This role will involve designing next-generation WLAN chipsets and Wi-Fi subsystems, including Wi-Fi 6, 7, and 8 technologies. As part of the QCT Bangalore Wireless R&D HW team, you will be involved in sub-system architecture, RTL design, and its integration, contributing to industry-leading technologies in Wi-Fi connectivity for consumer devices such as hearables, wearables, and IoT applications. Key Responsibilities: Design and develop next-generation WLAN and micro-Wi-Fi subsystems for connectivity, hearables, wearables, and IoT chips. Work on ASIC designs using the latest technology nodes, understanding and executing all aspects of the VLSI development cycle, including architecture, micro-architecture, RTL design, and integration. Collaborate closely with Verification, SoC Design, Validation, Synthesis, and PD teams to achieve design convergence. Develop micro-architecture and implement designs in Verilog/SV. Integrate complex subsystems into SoCs. Perform various design checks and tool analyses using tools like Spyglass, RDC, CDC, PrimeTime, Synthesis, and more. Conduct post-silicon debug and work with cross-functional teams to resolve issues and optimize designs. Work independently on defined tasks, with minimal guidance, while maintaining a strong team-oriented approach. Required Skills and Experience: 8+ years of experience in digital front-end design for ASICs. Strong expertise in RTL coding using Verilog, VHDL, or SystemVerilog (SV) for complex designs, including those with multiple clock domains. Experience in low-power design methodology and clock domain crossing designs. Familiarity with various bus protocols like AHB and AXI. In-depth understanding of the RTL to GDS flow and experience interacting with DFT and PD teams. Experience in 802.11 (Wi-Fi) and wireless IP/subsystem design is a plus. Post-silicon debug experience is an added advantage. Strong documentation and communication skills to effectively interact with team members and management. Self-motivated with a teamwork-oriented attitude and the ability to work independently. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, Communications, or a related field, and 3+ years of Hardware Engineering or related work experience. Master s degree in the above fields and 2+ years of relevant experience, OR a PhD with 1+ year of related work experience.

Job Function: As part of the Wireless R&D HW team in Bangalore, the candidate will contribute to the design and development of next-generation WLAN and micro-Wi-Fi subsystems for connectivity solutions in IoT, hearables, and wearables. This includes: Architecture and micro-architecture development. RTL design and integration. Collaboration with cross-functional teams for design convergence. Responsibilities: Develop micro-architecture and implement design using Verilog/SystemVerilog. Execute digital design (RTL) for complex WLAN subsystems involving multiple clock domains and low-power designs. Integrate and deliver WLAN subsystems to SoC-level designs. Collaborate with verification, SoC design, validation, synthesis, and physical design (PD) teams. Perform tasks such as linting (Spyglass), CDC analysis, synthesis, and simulation. Conduct RTL integration and work closely with DFT and PD teams for design-to-GDS convergence. Analyze tool reports (RDC, CLP, CDC, PrimeTime) and ensure compliance with design standards. Contribute to post-silicon debug and validation, when required. Maintain effective communication with global multi-site teams (US, UK, and India). Create and maintain documentation for design and development processes. Skills and Experience: ASIC Front-End Design: 8+ years of experience in digital ASIC design, with expertise in RTL coding using Verilog, VHDL, or SystemVerilog. Clock Domain Crossing (CDC): Strong experience in handling multiple clock domains and low-power design methodologies. Tool Proficiency: Hands-on experience with Spyglass Lint/CDC checks, DC-Compiler, PrimeTime, synthesis, simulation, etc. Protocols: Familiarity with AHB, AXI, and other standard bus protocols. WLAN/Wireless IP Expertise: Experience in 802.11/Wi-Fi subsystems is a plus. Debugging: Exposure to post-silicon debug and validation is desirable. Collaboration: Ability to work closely with multi-disciplinary teams for holistic design and development. Documentation: Strong documentation and communication skills. Minimum Qualifications: Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related fields and 3+ years of relevant experience. OR Master s degree in the same fields and 2+ years of experience. OR Ph.D. and 1+ year of experience. Experience Requirements: Strong background in ASIC front-end design, architecture, and RTL integration. Prior experience in WLAN IP/Sub-system design is a significant advantage. Why Join Qualcomm? Work on cutting-edge technologies like Wi-Fi 6/7/8 and next-gen connectivity solutions. Collaborate with diverse teams across geographies. Opportunity to contribute to groundbreaking innovations shaping the future of connectivity. Be part of an inclusive and forward-thinking culture. Qualification : Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communcations or related field.

We are looking for a Senior Product Designer (UX/UI) to help shape the future for how our clients serve their customers. You will work across every stage of the experience, from designing new features to prototyping high fidelity solutions. Our team is a close-knit collective of diverse thinkers and doers that pioneer solutions that have never been done, collaborate with our clients as partners, and design for future iteration and sustainability. The Publicis Sapient Experience Design Capability is the bridge between business strategy and technology we create meaningful, holistic experiences for our clients and their customers. We are multiskilled thinkers, computational designers, environmental designers, researchers, and architects. Sounds like you? If you are committed to not only transforming the world with the products you create, but also being a valued citizen to our growing global team, you will be instrumental in shaping how we do it with your ideas, thoughts, and solutions. Your Impact Champion the discovery, research, and data synthesis to identify critical user insights and develop hypotheses to design effective experiences Communicate with excellent aesthetic and an influential voice to shape and position ideas for customer impact Present your own work Apply best practices for human-centric design to common visual and usability challenges Contribute to the creation of new design systems Deliver interaction design and illustrations for basic digital product features Possess a thorough POV on craft, tools and process Propose optimizations and creative approaches to systems that can cultivate impact for users needs Develop specification documentation that allows for implementation in software development Facilitate design workshops with stakeholders Collaborate with teams on the development of motion, content strategy, visual design, and content Clarify and define success metrics for client and business impact Develop relationships across a project team, specifically technical team members and software developers Lead and manage small project tracks autonomously Qualifications Your Skills & Experience 7-12 Years of Experience Complex system mapping and process mapping Audits and competitive landscaping User research and design for iterative testing Wireframing functionality for features and content Prototyping skills with a familiarity of UX/UI design tools, having advanced experience with Figma Component-based design-development Solid experience with product design methodologies Solid experience of visual, sensory systems design and navigation systems Design, Creating sitemaps Interaction design Process and specifications documentation Presentation design Design process and specifications documentation Set Yourself Apart With Affinity group or employee resource group participation history Heuristic evaluation and performance data analysis Demonstrated photo or video editing capabilities Design for emerging experiences, ChatGPT, Generative AI Additional Information Gender Neutral Policy 18 paid holidays throughout the year Generous parental leave and new parent transition program Flexible work arrangements Employee Assistance Programs to help you in wellness and well being