Functional Simulation Jobs in Bengaluru

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Job Title: Solution Architect Robotics & Automation Location: Bengaluru Role and Responsibilities Engage closely with customers to understand their applications and translate requirements into detailed Solution Requirement Documents (SRD) for internal delivery. Conduct feasibility studies considering engineering constraints, system integration, ergonomics, unit economics, and process optimization. Design scalable, modular, and serviceable end-to-end automation solutions including factory layouts and workflow automation. Develop detailed solution architectures for automation systems (cells, lines), decomposing into hardware, software, and functional components. Analyze and optimize production processes using simulation tools, addressing bottlenecks to improve cycle times, throughput, and efficiency. Resolve robotic automation challenges such as part presentation, variability, path planning, precision, throughput, reliability, and safety compliance. Plan and manage project workflows, milestones, development, and testing cycles with a focus on process optimization and cycle time analysis. Create and implement test and validation frameworks for design, integration, performance, and safety based on simulation insights. Lead and collaborate with multidisciplinary teams (hardware, software, simulation) and communicate simulation outcomes effectively to customers. Provide ongoing technical guidance and support to customers throughout project lifecycles, tailoring solutions to operational needs. Oversee project planning, execution, and delivery ensuring alignment with customer expectations and production objectives. Skills and Experience Proven expertise in designing and delivering comprehensive robotic and automation solutions end-to-end. Skilled in creating scalable, modular, industry-agnostic system architectures enabling seamless production line integration. Experienced in leading multidisciplinary teams to successful solution delivery. Strong knowledge of warehousing, manufacturing, and assembly processes with an ability to customize solutions to diverse industries. Ability to troubleshoot complex technical issues and optimize performance using advanced simulation tools. Excellent communication skills, capable of explaining technical concepts and simulation results to both technical and non-technical stakeholders. Familiarity with PLCs, IPCs, sensors, IO devices, and communication protocols such as Modbus and Ethernet. Basic programming skills in Python, C++, or similar languages. Strong analytical and problem-solving aptitude with focus on production process optimization. Experience visualizing robotic work envelopes and motion constraints via simulation. Required Qualifications Bachelor s or Master s degree in Robotics, Mechatronics, Mechanical Engineering, Computer Science, or related field. Minimum 5 years experience in solution engineering or a similar role within industrial engineering. Proven customer-facing experience, preferably delivering solutions to large or Fortune 500 clients. Strong technical foundation in robotics, industrial machinery, and system-to-site integration. Demonstrated leadership in managing cross-functional teams and multiple projects. Excellent interpersonal and communication skills. Hands-on experience designing automation cells and systems. Additional Preferred Qualifications Master s degree in relevant discipline. 8-10 years of experience as a solution architect or similar senior role. Proficiency with factory simulation tools such as Siemens Plant Simulation, FlexSim, or equivalent. Credible project management experience. Familiarity with modern software development practices including Git and CI/CD pipelines. Qualification : Bachelors or Masters degree in Robotics, Mechatronics, Mechanical Engineering, Computer Science, or related field.

Job Title: Mechanical System Engineer - Robotics Location: Bengaluru Role and Responsibilities System Design & Integration: Analyze customer production lines to break down requirements and design mechanical systems integrating the CyRo platform. Ensure mechanical designs meet customer-specific constraints such as space, payload, and environmental conditions. Develop systems including CyRo, feeding mechanisms, sensors, fixtures, and other mechanical components for tailored automation solutions. Perform tolerance analysis to validate dimensional and functional requirements. Collaborate closely with electrical, software, and systems engineering teams to ensure seamless subsystem integration. Design mounting systems, fixtures, and interface components to facilitate integration into customer facilities when required. Mechanical Optimization: Optimize system designs by integrating mechanisms and sensors to enhance performance, modularity, and scalability. Select and design mechanisms for part presentation, feeding, reorientation, and manipulation considering space and performance constraints. Develop automation cells with modularity and scalability for current and future applications. Continuously refine workflows to improve cycle times, reduce errors, and increase operational efficiency. Modelling: Create and integrate detailed mechanical designs, including CAD layouts and fixtures, supporting customer automation solutions. Validate designs through tolerance analysis and develop calibration fixtures for robotic systems. Work cross-functionally to ensure mechanical designs integrate effectively with instrumentation, software, and controls. Documentation: Produce comprehensive documentation such as design specifications, validation reports, and scalability guidelines to ensure reproducibility. Develop detailed installation guides, maintenance manuals, and troubleshooting documentation for customer use. Skills and Experience Proficient in CAD software such as SolidWorks, CATIA, or AutoCAD. Strong grasp of mechanical engineering principles, materials science, and manufacturing processes. Experience in robotics, automation, or mechatronics is highly preferred. Familiarity with relevant industry standards and safety regulations (ISO, ANSI, OSHA). Excellent analytical, problem-solving, communication, and teamwork skills. Understanding of manufacturing processes, assembly lines, and automation cell design. Prior experience designing and integrating automation systems in production or process lines. Required Qualifications Bachelor s or Master s degree in Mechanical Engineering, Mechatronics, or related fields. Minimum 3 years of experience in mechanical design and automation systems integration. Strong knowledge of manufacturing processes and mechanical systems integration. Skilled in CAD and simulation tools. Additional Preferred Qualifications Experience with robotic automation systems and integration into manufacturing workflows. Familiarity with designing feeding mechanisms, part presentation systems, and end-of-arm tooling (EOAT) for robotics. Exposure to Autonomous Mobile Robots (AMRs) and other robotic mobility solutions. Understanding of sensors and actuators commonly used in automation (vision systems, force-torque sensors, linear actuators). Experience with plant simulation tools such as Siemens Plant Simulation or FlexSim. Qualification : Bachelors or Masters degree in Mechanical Engineering, Mechatronics, or related fields.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Job Summary: (Sr. Lead Engineer) Qualcomm Simulation platform team would be responsible for defining/prototyping/developing software s on the emulation platforms. Looking for an experienced BSP engineer for virtual platform, who can help us is developing virtual prototype software solution for snapdragon automotive products. Candidate must have an excellent understanding of the complex SoCs architecture & its Software stack. Education & Experience: Bachelor s/master s degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience. Primary Responsibility: Software (BSP) Bring-up on Virtual Platforms. Understand the emulation platform SoC architecture and develop single software solution. Ability to collaborate with cross functional teams and deliver the quality product under strict timeline. Define & develop custom virtio architectures. Pre-silicon software development platform prototype development Develop solution to improve performance of software running on Virtual platform. Supporting internal & external customers on Bring up & debugging from Software & emulation side. Mandatory Skills: Knowledge in Linux/QNX BSPs & Full Boot Chain. Strong System level programming skills in C/C++. Python, Rust is a plus. Excellent knowledge of OS fundamentals, Data structures, Linux kernel and its device driver model Strong debugging, analytical and problem-solving skills. Should have knowledge on debuggers like T32,gdb, etc., Strong collaboration skills with the ability to collaborate with multiple functional teams. Able to understand and debug large complex SW. Fair understanding of CPU (ARM), subsystems, SOC architecture and its SW-layers Fair understanding of the Virtual Machines with Type1 and Type2 Hypervisors Added Advantage: Fair understanding of QEMU/KVM platforms. Fair understanding of multimedia systems (GPU/Display/CAM/VPU/etc.,) knowledge. Fair knowledge of hardware-software interface and SystemC ASPICE and ISO26262 know how is preferred. Automotive experience is preferred. Qualification : Bachelors/masters degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience.

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

CPU Performance Engineer Company Arm Location Bengaluru Job Overview At Arm, we are building the Future of Computing. Achieving generational performance gains requires deep understanding of the core, microarchitecture, system-level details, and the workloads that run on them. We are seeking a highly motivated and skilled engineer to drive analysis, characterization, and deep understanding of complex infrastructure workloads. This is a versatile and high-visibility role requiring collaboration with global teams including hardware architects, software engineers, and toolchain experts. Your work will help shape the next-generation CPU microarchitecture through comprehensive workload performance analysis. Responsibilities Perform performance analysis and characterization of complex infrastructure workloads to identify software and microarchitectural improvements for next-generation processors/systems. Analyze CPU performance, power, and cost while identifying key technology challenges and opportunities for innovation. Collaborate with Arm architects to develop technologies that contribute to maintaining a best-in-class compute systems roadmap. Develop expertise in the competitive landscape and emerging technologies in areas such as infrastructure, computer vision, and machine learning. Required Skills and Experience Strong knowledge and experience in CPU architecture and microarchitecture, gained through development, research, or performance analysis/modeling/design. Ability to break down workload performance into insights spanning software (applications, toolchain, libraries) and CPU/system microarchitecture. Proven ability to work effectively both independently and as part of geographically distributed teams across multiple functional groups. Innovative mindset with a strong drive to explore new approaches, influence stakeholders through detailed investigation, and solve challenging technical problems. Bachelor s or Master s degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis. Nice-To-Have Skills and Experience Experience in CPU performance analysis and/or modeling. Background in workload analysis, characterization, and/or optimization of open-source software. Understanding of CPU infrastructure architectures and system-level constraints. Hands-on experience with advanced CPU techniques such as branch prediction and prefetching. Comfort working with emerging technologies and staying current with research advancements. Track record of influencing product roadmaps and delivering innovative solutions through prototypes and empirical analysis. What Arm Offers Arm provides an exceptional collaborative environment, offering exciting challenges and career growth opportunities. If you are interested but feel you don t meet every requirement, we encourage you to apply we value diverse skills and innovative thinking! #LI-KR2 Qualification : Bachelors or Masters degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis.

Job Title: CPU/Core Design Engineer (Intern) Job Description: Join Intel s Core and Client Development Group (C2DG) and contribute to the development of leading-edge CPU and Core technologies. In this role, you will be involved in CPU/Core design activities across various domains, supporting Intel s ongoing and next-generation Core CPUs. Key Responsibilities: Contribute to CPU/Core logic design for Intel s high-performance processors. Support pre-silicon verification, system validation, and firmware development. Assist in physical design, layout, and DFT (Design for Testability) engineering. Work with cross-functional teams to ensure high-quality and efficient CPU designs. Utilize industry-standard tools and methodologies for design and validation processes. Qualifications & Requirements: Educational Qualifications: Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in: Microelectronics & VLSI Digital System Design Computer Architecture Preferred Skills: Logic Design and digital circuit design fundamentals. Pre-Silicon Verification using simulation and validation techniques. Physical Design & Layout methodologies for semiconductor products. DFT (Design for Testability) Engineering. System Validation for ensuring reliability and performance. Firmware development related to CPU architecture and microarchitecture. About the Core and Client Development Group (C2DG): The Core and Client Development Group (C2DG) is a global organization responsible for the development and integration of SoCs, Core processors, and critical IPs that power Intel s flagship products. C2DG drives the client roadmap for Intel s Client Computing Group (CCG), delivers server-first cores for Data Center Group (DCG), and invests in future disruptive technologies. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive pay, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career growth. Qualification : Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in:

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

General Summary: Qualcomm is a company of inventors that has unlocked 5G, ushering in an era of rapid acceleration in connectivity and new possibilities across industries. But this is just the beginning. Qualcomm thrives on innovation and diversity, with teams made up of inventive minds from different backgrounds and cultures, all working together to transform cutting-edge technologies into world-changing products. As a GPU Functional Verification Engineer at Qualcomm, your responsibilities will involve a deep understanding of 3D Graphics hardware pipelines, feature sets, data paths, and block functionalities. You will play a key role in designing and developing verification strategies, implementing testbenches, and working on the functional verification of Qualcomm s Snapdragon SoC products. Key Responsibilities: Develop deep expertise in the 3D Graphics hardware pipeline, including feature sets, data paths, and block functionalities. Strategize, brainstorm, and propose Design Verification (DV) environments; develop testbenches and own test plans. Debug all RTL artifacts and work to achieve comprehensive signoff matrices. Collaborate with EDA vendors and explore innovative DV methodologies to push the limits of signoff quality. Partner with architecture, design, and systems teams globally to meet and exceed all project goals. Develop and execute UVM-based System Verilog testbenches for functional verification of complex GPU designs. Engage in property-based formal verification (knowledge of formal tools is a plus). Work on subsystem-level testbenches to analyze GPU workloads and ensure compliance. Utilize emulation platforms to analyze performance and identify potential pipeline bottlenecks. Perform power-aware and gate-level simulations to ensure high-quality GPU implementation. Implement Perl/Python scripts for regression management, optimizing runtimes, managing databases, and tracking bugs. Required Skills and Experience: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, or a related field, and 2+ years of relevant experience in Hardware Engineering or Design Verification. Master s degree in a related field and 1+ year of relevant work experience, OR PhD in a related field. Minimum 3 years of experience in design verification. Strong proficiency with UVM-based System Verilog testbenches. Experience with GPU pipeline design is a plus but not mandatory. Working knowledge of property-based formal verification tools is a plus. Strong communication skills (both written and verbal) with the ability to work in a collaborative team environment. Ability to learn quickly and deliver results with high quality. Desirable Skills and Aptitudes: Experience in GPU functional verification and knowledge of 3D graphics hardware pipelines. Familiarity with emulation platforms and the ability to analyze and address performance bottlenecks. Expertise in scripting with Perl and Python for automation and optimizing verification processes. Education Requirements: Bachelor s (BE/ME) or Master s (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities. Why Qualcomm? Be a part of a passionate GPU HW team dedicated to developing industry-leading Qualcomm Snapdragon SoCs. Play a pivotal role in shaping the future of mobile AR/VR by contributing to GPU solutions that drive benchmarks in the mobile computing industry. Qualification : Bachelors (BE/ME) or Masters (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities.

Job/Position Summary Responsibilities Lead and Perform system level testing of Chassis system Brakes, Steer, Suspension in a Hardware In Loop Testing environment Understanding of Chassis features and components involved Mentor and guide team for designing, developing and validation of software applications Collaboration with internal teams and customers within a production program Contribute best practices for System testing and validation Contribute in customer interaction, demonstration and proposal preparation Mandatory Skills: System knowledge of Vehicle Dynamics or Brakes or Suspension system or Steer system Expertise in defining the test strategy for system testing for chassis ECU Expertise in performing Hardware-In-Loop commissioning, testing and analysis Experience in requirement-based testing, diagnostic and fault insertion testing Experience in Test Automation using CAPL/Python for start up sequence, shutdown etc Experience in dSpace/Vector/NI tool chain Experience in Plant model creation and Simulation tools like CarSim, CarMaker Knowledge of CAN, UDS, XCP protocol and Flash bootloader integration Familiarity of functional safety concepts and ISO 26262 is desired Excellent communication, collaboration, analytical and problem-solving skills Familiarity with infrastructure tools like Requirements Management, Change Management and Version Management Requirement ESSENTIAL SKILLS /COMPETENCIES C++ PREFFERED SKILLS /COMPETENCIES C++

Technical Requirements: 1. Experience in Verification: SoC (System on Chip), Sub-system, and Block Level verification. Strong understanding of verification methodologies and flow. 2. ARM Architecture & AMBA Protocol: Hands-on experience in ARM architecture. In-depth knowledge of AMBA protocol at the SoC and sub-system levels. 3. Verification Methodologies: Expertise in UVM (Universal Verification Methodology), OVM (Open Verification Methodology), SV (SystemVerilog), Verilog, and C-based verification methodology. Strong command over verification languages like SystemVerilog and Verilog. 4. Additional Verification Tools & Exposure: Exposure to GLS (Gate-Level Simulation) and power-aware verification is a plus. 5. Protocols Knowledge: Practical experience with verification of various protocols, such as: PCIe, DDRx, Ethernet, USB, AXI, AHB, APB, I2C, SPI. 6. RTL Debugging & Test Automation Scripting: Strong RTL (Register Transfer Level) debugging skills. Ability to write test automation scripts using TCL, Perl, or Python. 7. Testbench (TB) and Test Cases: Experience in building testbenches (TB) and test cases from scratch. In-depth knowledge of creating scalable and reusable testbenches. 8. Verification Tools: Familiarity with industry-standard verification tools for simulation, debugging, and automation. Expectations from the Role: 1. Communication & Inter-personal Skills: Strong communication and inter-personal skills. Ability to work independently or as part of a team, collaborating effectively with cross-functional teams. 2. Learning & Adaptability: Ability to quickly learn new technologies and verification tools. Ability to work in a distributed work environment and adapt to diverse work conditions. 3. Ownership & Punctuality: Demonstrated ownership of tasks and projects. High punctuality and accountability in delivering results within agreed timelines.

Technical Requirements: 1. Verification Experience: Strong experience in SoC, sub-system, and block-level verification. Ability to handle different verification stages and methodologies for complex systems. 2. Hands-on Experience with ARM Architecture and AMBA Protocol: ARM architecture familiarity, particularly at the SoC and sub-system level. Expertise in AMBA protocol (e.g., AHB, APB, AXI) and its application in SoC verification. 3. Verification Methodologies: Proficient in UVM/OVM, SystemVerilog, Verilog, and C-based verification methodologies. Solid understanding of testbenches (TB), test cases, and automation methodologies. Experience in test automation scripting with languages such as TCL, Perl, and Python. 4. Exposure to Advanced Verification Techniques: GLS (Gate-Level Simulation) experience is a plus. Power-aware verification knowledge, ensuring low power consumption in designs. 5. Protocol Knowledge: Working knowledge of industry protocols such as PCIe, DDRx, Ethernet, USB, I2C, SPI, among others. Familiarity with AXI, AHB, APB protocols for data communication in embedded systems. 6. RTL Debugging & Tools Proficiency: Strong RTL debugging skills to identify and resolve issues in designs. Well-versed with industry-standard verification tools used in simulation, debugging, and analysis. 7. Building Testbenches & Test Cases: Extensive experience in building testbenches from scratch. Ability to create and implement detailed test cases for different verification scenarios. Expectations from the Role: 1. Communication and Interpersonal Skills: Strong ability to communicate technical concepts effectively both within the team and with other stakeholders. Clear verbal and written communication skills for reporting progress and challenges. 2. Independent and Team-based Work: Ability to work independently on projects or as part of a team. Able to take ownership of tasks and contribute to team discussions effectively. 3. Learning and Adaptability: Ability to learn quickly and adapt to evolving technologies and methodologies. Stay updated with advancements in verification techniques and tools. 4. Ownership and Accountability: Demonstrated ownership of projects, ensuring timely completion and addressing any challenges that arise. Ensuring high-quality results through attention to detail. 5. Leadership & Mentorship: Ability to mentor and lead junior engineers and verification teams. Provide guidance in solving complex problems and ensuring successful project outcomes. 6. Punctuality and Responsibility: Demonstrated punctuality in meeting deadlines and project milestones. Timely execution of tasks and troubleshooting to maintain project timelines. Ideal Candidate Profile: The ideal candidate will have significant experience with SoC verification, ARM architecture, and verification methodologies such as UVM and SystemVerilog. The candidate should possess strong protocol knowledge and be proficient in debugging RTL and automating test scenarios. A key aspect of the role is the ability to work independently, take ownership of tasks, and guide the team in solving technical challenges. Leadership and mentoring abilities are essential, as is the capacity to manage multiple tasks effectively in a distributed work environment.

Technical Requirements: 1. Digital Logic Design & RTL Coding: Strong experience in digital logic design and RTL (Register Transfer Level) coding. Proficiency in Verilog, VHDL, or System Verilog for implementing complex designs. Deep understanding of logic synthesis, timing constraints, and logic optimization. 2. Peripheral Design (High/Low-Speed): Experience in designing high-speed and low-speed peripherals, ensuring compatibility and optimal performance. Knowledge of integrating peripherals within larger system architectures, ensuring robust data flow. 3. Synthesis, Timing Constraints, and CDC: Familiarity with synthesis tools and ensuring the correctness of timing constraints. Experience with Clock Domain Crossing (CDC) and methods to avoid timing hazards in designs. Ability to optimize logic for timing closure and power efficiency during synthesis. 4. Unit Level Verification Setup & Assertions: Hands-on experience in setting up unit-level verification for RTL modules. Proficient in writing assertions to ensure the correctness of designs during simulation and functional verification. 5. Low Power Design Techniques: Exposure to low power design techniques, including managing multiple power/clock domains in complex SoC designs. Ability to design power-efficient modules for consumer electronics or embedded systems. 6. ARM SoC/AMBA IP-based Designs: Exposure to ARM SoC architectures and integration of AMBA (AXI, AHB, APB) protocols into designs. Experience with SoC-level integration, managing both hardware and software interactions in complex systems. 7. Protocol Knowledge (Additional Advantage): Working knowledge of industry-standard protocols, including PCIe, DDRx, Ethernet, USB, I2C, SPI. Ability to implement these protocols in hardware designs for various interfaces. Expectations from the Role: 1. Communication & Interpersonal Skills: Excellent communication skills for interacting with cross-functional teams, stakeholders, and clients. Ability to convey complex technical details clearly, both in writing and verbally. 2. Independent and Teamwork Capabilities: Strong ability to work both independently and as part of a team. Willingness to take initiative and demonstrate leadership in solving technical challenges. 3. Fast Learner & Adaptability: Ability to quickly absorb and apply new technologies, tools, and methodologies. Eagerness to stay updated with trends in digital design and SoC development. 4. Ownership & Accountability: Demonstrated ownership of tasks and the ability to meet deadlines. Ensure that all aspects of the design process are completed with attention to detail and high-quality standards. 5. Punctuality and Responsibility: Strong track record of punctuality, meeting project deadlines, and delivering quality work. Ability to manage multiple design tasks and optimize workflows to maintain timelines. Ideal Candidate Profile: The ideal candidate should have solid experience in digital logic design, particularly with Verilog, VHDL, or System Verilog. They should have a strong foundation in designing both high-speed and low-speed peripherals and optimizing designs for timing and power efficiency. The role also requires familiarity with ARM SoC architectures and integration of AMBA-based IPs. The candidate should be a strong communicator with the ability to work both independently and collaboratively in a fast-paced, distributed work environment. Leadership potential and a demonstrated ownership mindset are essential to the success in this role.

Job Description Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs Participates in the definition of architecture and microarchitecture features of the block being designed Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features Supports SoC customers to ensure high quality integration and verification of the IP block Drives quality assurance compliance for smooth IP SoC handoff Qualifications Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience Expertise in microarchitecture, design, development, and integration of design blocks (IP) for system-on-chip (SoC) components Knowledge of Power management is preferred. Experience with formal apps would be good. Expertise in Verilog and System Verilog-based logic design. Expertise in Verilog and System Verilog-based logic design Experience in synthesis flow and timing closure, CDC, FEV. Knowledge of Python, Perl is a must Knowledge of considerations for performance, power, and cost optimization is desirable. Knowledge of formal property verification using Jasper is preferred Demonstrate excellent Self-motivation, communication, strong problem solving, and teamwork skills Set aggressive goals and meet/beat the commitments Flexible enough to work in a dynamic environment and multitask seamlessly. Ability to work independently and in a team Knowledge in IPs like I2C, I3C, SPI, UART, etc. is preferred. Experience in the field of Dfx (ATPG coverage, SCAN insertion, VISA insertion, etc.) will be an added advantage Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience

Job Description You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. As part of Intel Core RTL Design Team,your Roles and Responsibilities include : Understand feature specification from Architects and implement the Core feature independently. Prepare micro architectural specification document. Ensure quality of RTL while meeting Power, Performance and Security requirements of the design. Work closely with Validation team, review the test-plans. Work with Back-end team and evaluate the design implementation approaches between Area, timing, and power. Drive feature/design topic-based forums, evaluate options, and provide recommendations to Management. Qualifications Candidate must possess a master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's degree with at least 9 years of experience in RTL Design.Preferred Qualifications: Good understanding of Digital Design Principles and x86 Core processor architecture. Understanding of interaction of computer hardware with Firmware/Software is a plus. Experience in the domain of Power Management, Execution Unit, Cache, and memory features is a plus. Good knowledge of Verilog/System Verilog language is a must. Experience with Static tools (UPF, lint, integration, CDC, RDC) is preferred. Candidate should demonstrate excellent Self-motivation, effective communication, problem solving, excellent cross-site communication and teamwork skills. Inside this Business Group The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core , and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Candidate must possess a master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's degree with at least 9 years of experience in RTL Design.