Interfaces Jobs in Bengaluru

Conversational AI Lead / Architect Location: Bangalore | Employment Type: Full-time About the Role We are looking for a skilled and experienced Conversational AI Lead/Architect to join our team at Avaamo. In this role, you will be responsible for designing, developing, and implementing cutting-edge Conversational AI solutions. As a subject matter expert, you'll work closely with IT managers, business teams, and customers to understand their requirements and deliver high-impact solutions that enhance the Avaamo platform. Responsibilities Lead the design, coding, and implementation of Avaamo s Conversational AI products, ensuring solutions meet both technical and business needs. Collaborate with IT managers and business stakeholders to gather requirements and translate them into actionable technical solutions. Drive the implementation of solutions using Conversational Design principles and best practices. Develop, deploy, and maintain customized extensions to the Avaamo platform tailored to specific customer requirements. Provide technical guidance and training sessions to partner and customer development teams, ensuring smooth onboarding and ongoing success. Evaluate reported defects and prioritize them for resolution, ensuring product quality and customer satisfaction. Travel to customer locations for on-site support, providing hands-on assistance and expertise as needed. Document best practices, implementation guidelines, and "how-to" guides to support customer and partner teams in leveraging Avaamo s products effectively. Requirements (Mandatory) 6+ years of strong programming experience in JavaScript, HTML, and CSS. Proven expertise in creating and consuming REST APIs and SOAP services. In-depth knowledge of web technologies and current industry trends. Solid understanding of security in web applications and services. At least 2 years of experience using Node.js, with a deep understanding of its architecture. Hands-on experience with Git and other version control systems. Experience deploying web applications on Linux servers in production environments. Familiarity with deployment processes and CI/CD tools. Exceptional communication skills, with the ability to work with both technical and non-technical teams. Minimum of 2 years of experience in client-facing roles, working closely with customers to deliver solutions. Good to Have Full-stack development experience, with expertise in UI/UX design or insights. Working knowledge of AI, ML, and NLP technologies. Experience with enterprise system integrations, such as MS Dynamics CRM, Salesforce, ServiceNow, and MS Active Directory. Experience implementing Single Sign-On (SSO) in web/mobile applications. Ability to quickly learn new technologies and manage small engineering teams. At Avaamo, we re redefining the future of Conversational AI. We specialize in creating advanced conversational interfaces that solve high-impact challenges for enterprises. Join our team and contribute to pioneering AI-driven technologies that are transforming how businesses engage with customers and employees.

OpenBMC Developer Location: Bangalore, Karnataka, India Experience: 2 10 Years Job Type: Full-Time Education: Bachelor s Degree (Master s preferred) Industry: Technology / Firmware Development Company: IBM India Systems Development Lab (ISDL) Introduction: IBM is one of the world s largest and most innovative technology companies, operating in over 170 countries. With a legacy of more than 100 years, IBM is at the forefront of global transformation, reshaping industries through the power of Cloud, AI, Analytics, Security, Mobile, and IoT. At IBM, we believe in doing work that matters. We re building a smarter business and a better world and we want bright, driven minds like yours to join us. This is your opportunity to become an essential part of a company that fosters creativity, growth, and the pursuit of innovation. About the Role: As a Firmware Developer in our India Systems Development Lab (ISDL), you will contribute to the design and development of features for IBM's next-generation enterprise Power servers. Working within the global WW Firmware Development Organization, you will focus on cutting-edge development on the OpenBMC stack, helping shape the future of server infrastructure. Your Responsibilities: Design and develop firmware components and features independently and collaboratively. Work on the OpenBMC stack, contributing to the architecture and feature development for IBM Power systems. Collaborate with cross-functional, global teams in an Agile environment. Participate in code reviews, debugging, and hardware bring-up activities. Ensure the delivery of high-quality, efficient, and scalable code. Required Technical and Professional Expertise: 2 10 years of relevant industry experience. Strong programming skills in Modern C++ (including STL, data structures, and design patterns). Solid understanding of Linux operating systems, with hands-on experience across various flavors. Experience with open-source tools and scripting: Git, Gerrit, Jenkins, Bitbake, Python/Perl. Excellent debugging and problem-solving skills. Ability to work independently as a self-starter and as part of a global agile team. Preferred Technical and Professional Experience: Prior experience in OpenBMC development. Exposure to server management protocols: Redfish, REST, HTTP. Familiarity with hardware abstraction, including protocols like I2C, SPI, GPIO and Device Tree manipulation. Understanding of networking concepts (Socket programming, SSL, certificates, Linux firewalls). Experience with C++17 or C++20 standards is highly desirable. Involvement in hardware bring-up or low-level firmware debugging is a strong plus. Work on industry-leading systems powering the world's critical infrastructure. Collaborate with global innovators across cutting-edge domains. Enjoy a workplace that values diversity, learning, and career growth. Be part of a company committed to building a smarter planet. Qualification : Bachelors Degree (Masters preferred)

Software Development Manager CephFS Location: Bangalore, Karnataka, India Job Type: Full-Time Experience Level: Senior / Leadership Company: IBM Ceph Engineering Team Education: Bachelor s Degree (Master s preferred) Introduction: At IBM, we re not just redefining business we re redefining what s possible through technology, collaboration, and innovation. As one of the world's leading technology companies, IBM is transforming industries through the power of AI, Cloud, Analytics, Security, and IoT. With a presence in over 170 countries, we bring together diverse minds to solve complex challenges and build a smarter future. Join IBM s Ceph Engineering Organization and be a part of shaping the future of software-defined distributed storage. We're looking for an experienced and visionary Software Development Manager to lead the CephFS team the group responsible for the file system layer of the Ceph ecosystem. About the Role: As a Software Development Manager for CephFS, you ll play a key leadership role in designing, developing, and delivering new capabilities in CephFS, the scalable and highly available POSIX-compliant distributed file system built atop Ceph. You ll lead a global team of engineers, working in an open-source community, to develop enterprise-grade storage solutions for modern workloads. You will focus on building next-generation distributed file system features like instant cloning, file overlays, coherent snapshots, and advanced client-side caching. This role is a mix of hands-on technical leadership and people management, with strong collaboration across open-source communities, IBM product teams, and clients. Key Responsibilities: Lead and mentor a team of talented engineers working on CephFS. Drive the design and implementation of new distributed features and algorithms for file system scalability, performance, and resiliency. Collaborate with the global Ceph open-source community to contribute and review code, resolve issues, and plan new features. Guide the team in debugging complex production issues, both live and offline. Collaborate with client-facing and support teams to perform root cause analysis for customer-reported issues. Contribute to the architecture and roadmap of CephFS in alignment with product and client needs. Engage in code reviews, triaging, and architectural discussions. Promote engineering best practices and a culture of continuous improvement. Required Skills & Experience: Bachelor s degree in Computer Science or related field. Strong experience working with C++ or other systems programming languages. Excellent debugging skills (live system and core file analysis). Hands-on experience in open-source development (preferably with contributions to GitHub). Good understanding of large-scale codebases and the ability to design and implement major features or changes. Comfortable working with Python for automation and testing. Proficiency with Git and GitHub workflows. Excellent verbal and written English communication skills to coordinate with a distributed, global team. Proven ability to mentor and support engineers while driving technical excellence. Preferred Qualifications: Master s degree in Computer Science or related field. Experience in building or maintaining file systems or distributed storage platforms. Prior work in distributed systems, high-performance computing, or cloud-native storage. Experience working in remote/distributed teams. Familiarity with systems like OpenStack, Kubernetes, or NFS-Ganesha. Work with world-class engineering teams on products that power global enterprise infrastructure. Be part of a vibrant open-source community, contributing to widely adopted storage technologies. Enjoy a culture of continuous learning, innovation, and impact. Competitive salary, benefits, and flexible work arrangements. Be essential. Be a leader in redefining how the world stores and accesses data. Apply today to join IBM s CephFS team and help build the future of enterprise file storage. Qualification : Bachelors degree in Computer Science or related field.

Job Title: Senior Filesystem Developer (NFS, SMB) Location: Bangalore Experience: 6+ Years Job Overview We are looking for a highly skilled Senior Filesystem Developer with extensive experience in developing, optimizing, and maintaining filesystem protocols such as NFS (Network File System) and SMB (Server Message Block). The ideal candidate will be responsible for creating efficient and robust distributed storage solutions while enhancing filesystem performance. You will be working on cutting-edge projects to build and improve the infrastructure of our storage systems. Key Responsibilities Filesystem Protocol Development: Develop and maintain filesystem protocols like NFS (v3/v4) and SMB/CIFS, ensuring high performance and scalability in distributed environments. Optimization & Performance Tuning: Continuously improve the efficiency and performance of filesystem protocols, analyzing bottlenecks and addressing performance issues. System-Level Integration: Collaborate with system-level teams to integrate and optimize filesystem components with kernel-level subsystems and user-space applications. Debugging & Troubleshooting: Utilize diagnostic tools (e.g., tcpdump, Wireshark, perf, ftrace) to identify and resolve network, protocol, and filesystem-related issues. Collaboration & Documentation: Work closely with cross-functional teams (e.g., networking, storage) to ensure seamless integration and implementation of storage solutions. Document processes, best practices, and optimizations. Required Skills & Qualifications Technical Expertise: Proven experience in filesystem development or protocol-level programming. Proficiency in C programming, with a solid understanding of kernel-level and user-space interactions. Deep knowledge of NFS (v3/v4) and SMB/CIFS protocols, including their implementation and behaviors. System-Level Knowledge: Strong experience with kernel-level filesystems and the Virtual File System (VFS) layer. Familiarity with distributed storage systems and clustered filesystem architectures. Networking & Protocols: Solid understanding of network protocols such as TCP/IP, RPC, and DNS, particularly as they relate to file-sharing systems. Experience in debugging network and protocol-level issues in a distributed environment. Debugging & Troubleshooting: Expertise with diagnostic tools such as tcpdump, Wireshark, perf, and ftrace. Strong analytical and problem-solving skills to identify and resolve bugs and performance bottlenecks in filesystem protocols. Preferred Skills Distributed & Parallel Filesystems: Experience working with distributed and parallel filesystems, ensuring high availability and fault tolerance in storage systems. Cloud-Based Storage Solutions: Familiarity with cloud-based file storage solutions (e.g., object storage systems, cloud NAS/SAN). Security: Knowledge of encryption and security standards related to file storage and secure file sharing. This role presents an exciting opportunity to work with cutting-edge technology and make significant contributions to the development of high-performance, distributed filesystem solutions. You will be part of a dynamic team focused on pushing the boundaries of storage systems while solving complex problems.

Job Title: Senior Networking Developer (System/Protocol Level) Location: Bangalore Experience: 6+ Years Job Overview We are seeking an experienced Senior Networking Developer with deep expertise in developing, optimizing, and troubleshooting high-performance networking systems and protocol stacks. In this role, you will be responsible for designing, implementing, and maintaining network solutions at both the system and protocol levels, focusing on high efficiency and performance in modern networking environments. Key Responsibilities Networking Protocol & System Development: Design and implement networking protocols at the system level, ensuring efficient, high-performance networking solutions. Protocol Stack Development: Work with L2/L3 protocols (Ethernet, ARP, IP, ICMP) and L4 protocols (TCP, UDP), enhancing their implementation and performance. Advanced Networking: Leverage your knowledge of advanced networking concepts such as Quality of Service (QoS), load balancing, and multicast to improve network performance and scalability. Linux Networking Subsystems: Contribute to the optimization and development of Linux networking subsystems like netfilter, iptables, and eBPF. Kernel-Level Development: Work on kernel-level networking stack optimization, focusing on high-performance and low-latency solutions. Troubleshooting & Debugging: Use network diagnostic tools (Wireshark, tcpdump, strace, gdb) to troubleshoot and resolve issues at all OSI layers, ensuring network reliability and performance. Collaboration: Collaborate with cross-functional teams to address complex networking challenges and implement solutions that meet business and technical objectives. Required Skills & Qualifications Technical Expertise: Strong experience in networking protocol or system-level development. Proficiency in C or C++ for low-level systems programming and optimization. In-depth knowledge of networking protocols, including L2/L3 (Ethernet, ARP, IP, ICMP) and L4 (TCP, UDP). Familiarity with advanced networking concepts such as QoS, load balancing, and multicast. System-Level Knowledge: Experience with Linux networking subsystems, such as netfilter, iptables, and eBPF. Hands-on experience in kernel-level networking stack development and optimization. Debugging & Analysis: Expertise with network diagnostics tools like Wireshark, tcpdump, strace, and gdb. Strong troubleshooting skills at all OSI layers. Preferred Skills High-Performance Networking: Experience with high-performance networking technologies to enhance scalability and network throughput. Programmable Network Devices: Experience working with programmable network devices and integrating them into modern network architectures. SDN (Software-Defined Networking): Familiarity with SDN controllers and protocols like OpenFlow, and their integration in modern networking solutions. As a Senior Networking Developer, you will be at the heart of building cutting-edge networking solutions, contributing to high-performance network infrastructures. This role offers the opportunity to work with the latest networking technologies in a dynamic and collaborative environment. If you're passionate about networking and system-level programming, we encourage you to apply.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Full-Stack Developer - Windows on Snapdragon Platform Team Company Qualcomm India Private Limited Job Area Engineering Group > Software Engineering General Summary Qualcomm Technologies Inc., the maker of the industry-leading Snapdragon SoCs, is the largest provider of complete chipset solutions for Microsoft Windows on Snapdragon products. Qualcomm is committed to developing solutions for the next generation of Windows on Snapdragon devices. The ideal software engineer will act as a key member of an Agile Scrum Team and play a pivotal role in the end-to-end lifecycle of all Windows-on-Snapdragon product lines. This role requires strong software development skills to act as a hands-on contributor responsible for gathering requirements, designing, and developing improvements to the Windows-on-Snapdragon continuous integration build systems, software release process, and developer operations tools. Strong communication and collaboration skills are essential, as this platform team works closely with internal and external teams to bring up, support, triage, and resolve issues on Qualcomm chipsets. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master s degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Languages such as C, C++, Java, Python, etc. Key Responsibilities Design, develop, test, and maintain web applications using Python and C#. Implement front-end interfaces using ASP.net, HTML, CSS, and JavaScript. Design and maintain SQL databases, writing efficient SQL queries. Develop and maintain automation scripts using PowerShell, CMD, and BAT. Work within version control systems such as Git and Perforce. Contribute to embedded Windows software development with solid programming skills. Apply strong understanding of Operating System concepts, both Windows and Linux. Participate in Windows and/or Linux kernel development activities. Preferred Qualifications 2-5 years of Software Engineering or related work experience. Proficiency in Python, C/C++/C#, SQL, and Shell Scripting. Strong communication and interpersonal skills. Effective problem-solving and debugging capabilities. Experience with Windows OS internals. Experience debugging device drivers using WinDbg, JTAG, or similar tools. Basic understanding of processor architecture and cache subsystems. Experience with PC software development (System BIOS, UEFI, ACPI, Drivers, Applications). Working knowledge of Jenkins and Artifactory. Hands-on experience with Windows program/driver development. Proficiency in Visual Studio as an integrated development environment. Exposure to ARM assembly. Basic understanding of Embedded OS (Kernel architecture, OS services, heap, memory management, multi-core processing, multi-threading, and crash debugging). Strong motivation and ability to learn quickly. Equal Opportunity Employer Statement Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email [email protected] or call Qualcomm s toll-free number listed on their careers page. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities during the hiring process. (Please note: this email address is intended solely for accommodation requests. Qualcomm will not respond to requests for application status updates or resume inquiries through this contact.) Recruitment Policy Qualcomm s Careers Site is exclusively for individuals seeking employment directly with Qualcomm. Staffing agencies and third-party recruiters are not authorized to submit profiles, applications, or resumes via this site. Any such submissions will be considered unsolicited, and Qualcomm will not be responsible for any associated fees. Compliance Notice All Qualcomm employees must adhere to applicable company policies and procedures, including but not limited to those regarding security, confidentiality, and protection of proprietary information, in compliance with applicable laws.

Job Title: Pre-Silicon Validation Engineer SoC/IP Job Description: Join the Devices Development Group (DDG), one of Intel s premier System-on-Chip (SoC) design teams, driving innovation in future Intel SoCs and IPs. As a Pre-Silicon Validation Engineer, you will be part of a dynamic team responsible for ensuring the functionality, performance, and reliability of Intel s cutting-edge designs. Key Responsibilities: Validate IP blocks or features at the SoC level, ensuring compliance with design specifications. Develop validation plans and test strategies based on architectural specifications, RTL code, and existing test methodologies. Analyze microarchitecture and debug failures to identify root causes and improve design quality. Develop and utilize various debugging and validation tools to implement validation plans effectively. Participate in silicon debugging, identifying issues and enhancing testing methodologies for future RTL models. Collaborate with IP providers and internal customers to define, develop, and deliver essential infrastructure while addressing issues identified during execution. Qualifications & Requirements: Educational Qualifications: Bachelor s (B.Tech/BS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of experience, OR Master s (M.Tech/MS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 3+ years of experience. Technical Skills & Experience: Minimum 2 years of experience in IP or SoC development, verification, or integration using SystemVerilog and UVM (Universal Verification Methodology). Minimum 2 years of experience in writing validation plans and developing software to execute those plans. Minimum 2 years of experience with object-oriented programming languages. Minimum 2 years of experience working with SystemVerilog and UVM. Minimum 1 year of experience with UNIX/Linux environments. Exposure to Graphics Verification and/or Security Verification is a plus. Preferred Qualifications: Minimum 1 year of experience with computer architecture. Minimum 2 years of experience in validation or testing, particularly in silicon design teams. About the Client Computing Group (CCG): The Client Computing Group (CCG) is at the forefront of Intel s PC product and platform development, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. Through strategic partnerships across the industry, CCG delivers innovative computing experiences that empower users to create, connect, and collaborate. As Intel s largest business unit, CCG drives innovation, scalability, and IP development, helping the company fulfill its mission of enriching lives through technology. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, which includes: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development opportunities to support career growth.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

Job Description Intel is seeking an experienced Systems Engineer to drive the design, development, and integration of hardware, firmware, and software solutions for Xeon-based platforms. The role focuses on system architecture, performance optimization, and technical risk assessment while ensuring scalability, reliability, and security in system implementations. The ideal candidate will work on customer-centric solutions, influencing next-generation system design and conducting proof-of-concept experiments to validate new features and technologies. Key Responsibilities: System Architecture & Design: Define, develop, and optimize end-to-end solutions integrating software, firmware, board, and silicon/SoC components. Customer-Centric Solutions: Translate business opportunities into use cases, develop product specifications, and implement solutions based on customer needs and system limitations. Performance & Reliability Optimization: Conduct design analysis, assess technical risks, and optimize for security, scalability, and maintainability. Hardware Validation & Debug: Perform schematic reviews, layout verification, mechanical/thermal analysis, and electrical validation (including Signal Integrity (SI) analysis). System Integration: Ensure smooth hardware-software integration, identifying and resolving hardware issues at the component and system levels. Lab-Based Proof-of-Concept Testing: Conduct real-life environment simulations, prototype testing, and performance benchmarking. Documentation & Knowledge Sharing: Develop technical documents, customer presentations, and training materials to enhance internal and external knowledge sharing. Industry Research & Collaboration: Engage in academic and industry research, driving innovation beyond existing solutions. Qualifications & Experience: Educational Requirements: B.E/B.Tech in Electronics & Communication, Computer Science, or a related field. Minimum of 10 years of relevant industry experience. Technical Expertise: Experience in Xeon platform hardware design and validation. Strong knowledge of schematics, PCB layout, mechanical, and thermal analysis. Experience with electrical validation, signal integrity (SI), and power integrity (PI) analysis (desirable). Expertise in hardware issue validation, debugging, and system integration. Strong problem-solving and analytical skills for complex, multi-layered system architectures. Excellent technical documentation and presentation skills. About Intel Validation Engineering (iVE) Group: The Intel Validation Engineering (iVE) Group plays a pivotal role in Intel s technology leadership, validating, debugging, and optimizing Intel s cutting-edge designs. iVE ensures that Intel's next-generation products meet the highest quality standards, enabling Intel to deliver world-class technology platforms. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a top-tier compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.E/B.Tech in Electronics & Communication, Computer Science, or a related field.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

About the Role As a Senior Support Engineer, you will play a critical role in post-sales technical support, acting as the primary interface between Oracle and its customers. Your primary responsibility will be to analyze, troubleshoot, and resolve complex issues related to Oracle E-Business Suite (EBS) R12 and Fusion Applications. You will provide technical expertise and guidance to customers, ensuring smooth operation and optimization of their Oracle solutions. This role requires strong problem-solving skills, a customer-focused approach, and the ability to work independently while collaborating with internal teams. You will also be involved in process improvements, knowledge sharing, and documentation to enhance support efficiency. Career Level: IC3 Key Responsibilities Provide technical support and troubleshooting for Oracle EBS R12/Fusion Supply Chain, Financials, Planning, and Process Manufacturing. Develop and maintain Oracle SQL, PL/SQL, XML/BI Publisher, Unix Scripts, Forms, Reports, Workflow, OA Framework, SOA/BPEL, OTBI, OIC, XML/HTML, and REST APIs. Perform technical debugging and root cause analysis of complex issues using the above tools. Collaborate with internal and external stakeholders, ensuring timely resolution of critical issues while setting realistic customer expectations. Work on CEMLI (Configurations, Extensions, Modifications, Localizations, and Integrations) development, support, and implementation. Provide proactive support and guidance, helping customers optimize their Oracle applications. Ensure high-quality documentation for architecture, design, technical implementation, support, and testing activities. Work in shifts, including night shifts, as per business requirements (Bangalore, Hyderabad, Noida). Required Qualifications 6+ years of techno-functional experience in Oracle EBS R12/Fusion Applications. Strong hands-on experience in PL/SQL, XML/BI Publisher, Unix, Forms, Reports, Workflow, OAF, SOA/BPEL, OTBI, OIC, REST APIs. Experience in development, support, and implementation of CEMLIs. Strong debugging and troubleshooting skills. Ability to handle customer escalations, set expectations, and provide quality solutions. Strong communication and customer service orientation to ensure customer satisfaction. BE, BTech, MCA preferred; other qualifications with relevant experience will be considered. Preferred Attributes Self-driven and result-oriented, with a proactive approach to problem-solving. Strong analytical skills and the ability to work under pressure in a fast-paced environment. Excellent communication skills (verbal and written) to effectively engage with customers and internal teams. Team player with a collaborative mindset. High flexibility and adaptability in an evolving business environment. Passion for learning and knowledge-sharing to improve processes and mentor colleagues. Why Join Oracle? Work on cutting-edge technologies in Oracle Cloud and EBS. Be part of a global team delivering world-class support solutions. Competitive compensation, career growth opportunities, and access to continuous learning programs. Contribute to the success of some of the largest enterprises leveraging Oracle solutions. If you are a highly skilled technical professional with a passion for solving complex problems and delivering exceptional customer support, we invite you to join Oracle s Support Organization and make an impact! Qualification : BE, BTech, MCA preferred; other qualifications with relevant experience will be considered.

Minimum Qualifications: Bachelor s degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. At least 5 years of experience in software development, specifically within consumer electronics or embedded systems. A minimum of 3 years of experience in leading ASIC architecture decisions from a software perspective. Proficiency with Linux kernel, bootloaders, SoC, low-power management frameworks, or performance analysis. Preferred Qualifications: Master s degree or PhD in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related discipline. 10 years of experience in software design and development, particularly with software layers in ASIC (e.g., boot processes, drivers, embedded firmware, libraries, and APIs for applications). Familiarity with Android OS or similar platforms, especially in power management. Strong understanding of hardware-software interactions across various hardware blocks, including CPUs and accelerators. About the Role: Join a dynamic, diverse team that is pioneering the development of custom silicon solutions powering the future of Google's direct-to-consumer products. As part of the team, you will contribute to groundbreaking innovations in products used by millions globally, shaping the next generation of hardware experiences for optimal performance, efficiency, and integration. As the ASIC Platform Software Architect, you will be instrumental in translating software product requirements and use cases into specific hardware blocks or sub-systems. In this role, you will define the direction of the software team, guiding them in the face of complex constraints. You will work closely with hardware architects to define system architectures for hardware blocks and collaborate with the implementation team to outline solutions. You ll also help influence design decisions to ensure software requirements are met, negotiating hardware/software trade-offs for optimal results. Google's mission is to organize the world s information and make it universally accessible and useful. Our Devices & Services team integrates the best of Google AI, software, and hardware to create transformative user experiences. We focus on researching, designing, and developing new technologies and hardware to make user interaction with computing faster, more seamless, and more powerful. Whether we re innovating on form factors, advancing sensors, or redefining interaction methods, the Devices & Services team is dedicated to improving people's lives through technology. Responsibilities: Collaborate with stakeholders to identify user experience needs and map them to hardware and software solutions. Design architectures and software interfaces that empower developers to leverage hardware accelerators and other intellectual property (IP). Analyze hardware component interactions, troubleshoot issues, propose trade-off solutions, and drive to resolution. Contribute to the design and improvement of hardware from one generation to the next, applying insights from past productization efforts and reducing technical debt.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

Engineer will be working on Embedded Firmware which involves feature development, integration, and bug fixing and maintenance. Experience in embedded architecture, external interfaces, product constraints, along with ability to develop architectures/features that meet these constraints while providing new value for the platform. Strong Experience in C\C++ Strong Experience in embedded Systems Strong Experience in RTOS System level design Experience in low level programming in ARM or ARC architecture Experience in debugging Embedded system software with Innovative techniques Experience in capturing and debugging based on HW Signals. Experience in Requirement understanding and designing solution with good presentation skills.Add-on:- Experience in USB Protocol- Experience in PCI System flows- Experience in Bluetooth Controller / Host protocols( BR\EDR) and Bluetooth Low Energy- Exposure to Python scripting.- Agile and scrum practices Qualifications Bachelor's or Master s degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience. Proven experience in Embedded system software / Firmware development in RTOS environment with strong system knowledge in understanding the requirements and making the design, development and deployment in embedded products. Solid understanding of software development life cycle (SDLC) and Agile methodologies. Excellent problem-solving skills and attention to detail. Strong written and verbal communication skills. Experience in maintaining and managing codebases, ensuring high standards of code quality. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Bachelor's or Masters degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience.

General Summary The Wireless R&D HW team in Bangalore is seeking experienced Wireless Modem Hardware Model Developers to work on Qualcomm s industry-leading chipset solutions, specifically focusing on modem WWAN IPs. This role involves contributing to flagship modem core IP development for 5G (NR) and 4G (LTE) technologies. Roles and Responsibilities Modem Development: Contribute to defining and developing next-generation multi-mode 5G modems. Hardware Model Development: Develop and verify hardware models for modem core IP using C++/SystemC. These models serve as golden references for RTL verification and pre-silicon firmware development (virtual prototyping). Hardware Microarchitecture: Understand and abstract hardware microarchitectures for accurate modeling. Technology Application: Work on wireless technologies such as NR, LTE, WLAN, and Bluetooth to enhance modem functionality. Signal Processing: Leverage expertise in digital signal processing to improve hardware modeling and design processes. Cross-Domain Expertise: Candidates with backgrounds in SW/FW development or DSP-based HW IP design/verification will also be considered. Required Skills and Qualifications Programming Skills: Proficient in C++ with exposure to SystemC, System Verilog, and/or MATLAB. Hardware Microarchitecture: Strong understanding of hardware microarchitectures and modeling abstraction. Wireless Technology: Working knowledge of physical layers in NR, LTE, WLAN, and Bluetooth. DSP Expertise: Experience in digital signal processing and its applications in hardware modeling or RTL design/verification. Collaboration Skills: Ability to work effectively within a multi-functional team. Preferred Experience Hands-on experience with HW modeling, design, or verification of IPs. Experience with firmware/software development in wireless IP. Technical knowledge of DSP-based HW IPs. Educational Requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience. Master's degree with 1+ year of relevant work experience. PhD in a related field. Why Qualcomm? Leading Innovation: Be part of a team developing cutting-edge wireless modem solutions for next-generation technologies. Diverse Opportunities: Gain exposure to multiple domains, including DSP, firmware, and hardware design. Global Impact: Contribute to solutions that drive connectivity and transform industries worldwide. Professional Growth: Work with industry leaders on groundbreaking projects with significant career development opportunities. Qualification : Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience.

Job Description We seek a skilled User Experience Designer and UI Developer to drive and develop the user experience for snowflake platform supporting planning data hub. We are looking for an experienced UI developer for Cloud Software (Snowflake) application to join our Supply Chain IT team. As a UI Development Engineer, you will play a vital role in designing, implementing, and maintaining UIs for our Snowflake cloud data platform for Supply Chain Planning Data. We are also looking for the supply chain background so this UI developer have the experience to develop functional knowledge in a reasonable time. Design, develop, and implement intuitive UI applications for demos, samples, and solutions. Collaborate with cross-functional teams to understand and translate user needs into functional applications. Ensure the technical feasibility of UI/UX designs. Optimize applications for maximum speed and scalability. Maintain an understanding of the latest web applications and programming practices. Participate in all development lifecycle phases, including design and support, following agile methodologies. Qualifications Bachelor's degree in Computer Science, Information Technology, or a related field. 7 years of experience as a UI Developer or in a similar role. Knowledge of multiple front-end languages and libraries. Experience with back-end languages (e.g., Java, Python) and JavaScript frameworks (e.g., Angular, React, Node.js). Familiarity with databases (e.g., MySQL, MongoDB), web servers (e.g., Apache), and UI/UX design. Excellent communication and teamwork skills. Great attention to detail and organizational skills. Inside this Business Group Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Bachelor's degree in Computer Science, Information Technology, or a related field.

Front End Engineer (React) Location: Bengaluru Job Type: Full-time About the Role We are seeking a curious and motivated Frontend Software Engineer to join our team at Intellicar. You will be part of our groundbreaking IoT platform and various applications that handle billions of data points every day. You will design and develop innovative, intuitive interfaces that bring complex functionalities to life. The platform you build will provide novel functionality to millions of IoT customers and users. We prioritize scalability, performance, flexibility, security, and simplicity in everything we do. If you are excited about working in a fast-paced environment and want to dive into the exponentially growing EV and IoT industry, this is the place for you! Responsibilities Web Application Development Design and build top-tier web applications using JavaScript (React preferred), HTML, CSS, and D3.js. Application Architecture Architect scalable, modular, and high-performance front-end applications and frameworks. Maintainability & Testing Ensure application stability, maintainability, and usability through test-driven development and rigorous testing practices. Modernization & Efficiency Champion efforts to modernize the development process and identify opportunities for improved team efficiency. Collaboration Provide technical expertise and work closely with product and project stakeholders throughout the development lifecycle. Qualifications Education: Bachelor s degree in Computer Science, Engineering, or relevant experience. Experience: Minimum of 5 years of professional experience in front-end development. Technical Skills: Strong proficiency in JavaScript (5+ years), React.js (3+ years), HTML, CSS, and D3.js. Experience with modern build systems and cloud APIs (e.g., Google Maps) is a plus. Working knowledge of SQL database design is preferred. Communication: Excellent written and verbal communication skills. Life at Intellicar At Intellicar, we foster a continuous learning environment that encourages skill development and skill porting. We offer plenty of opportunities for growth, and many of our developers have been mentored to become tech leads. Our culture is rooted in respect and collaboration, where every team member is encouraged to contribute ideas. Benefits include: Health and wellness programs Self and dependent insurance Unlimited Parle-G and Chai :) Qualification : Bachelors degree in Computer Science, Engineering, or relevant experience