LOW Voltage Systems Jobs in Bengaluru

Job Title: Industrialization Engineer Location: Bengaluru, India Experience Required: 5 10 years Industry: Electronics / Electric Vehicles Employment Type: Full-time Company: Ultraviolette Automotive Pvt Ltd Join the Charge. Create the Future. At Ultraviolette, we are redefining mobility. From building India s fastest electric motorcycle to developing the world s most advanced electric scooter, we thrive on innovation, bold thinking, and performance that thrills. We're a diverse, passionate team of engineers, designers, and creators united by one mission: to build machines that are not only sustainable, but exhilarating. If you re driven by purpose and ready to shape the future of mobility, this is your moment. Role Overview: We are looking for a technically strong and hands-on Industrialization Engineer (Electronics) to lead the transition from R&D prototypes to scalable, high-quality mass production. In this cross-functional role, you will work at the intersection of design, manufacturing, sourcing, and embedded systems, ensuring our products are built for scale, reliability, and performance without compromising innovation. Key Responsibilities: Technical Ownership & Industrialization: Lead industrialization from EVT (Engineering Validation Test) to DVT (Design Validation Test) and PVT (Production Validation Test), up to mass production. Translate R&D designs into production-ready documentation (BOMs, Gerbers, PCBA specs, test jigs, etc.). Conduct Design for Manufacturability (DFM) and Design for Testability (DFT) reviews. Own ramp-up metrics such as yield, test coverage, defect trends, and field return analysis. Collaborate with R&D teams on thermal design, layout optimization, and component derating strategies. Ensure compliance with voltage isolation, creepage/clearance, and relevant safety standards. Supplier & EMS Collaboration: Act as a technical bridge between internal teams and EMS vendors, ensuring alignment from design to execution. Coordinate with EMS on NPI builds, process validation, line setup, and FAI (First Article Inspection). Support firmware flashing, version control, and hardware-software integration testing at production lines. Assist in troubleshooting mechanical, electrical, or firmware-related issues during production. Component Engineering & Cost Optimization: Evaluate and qualify alternate components and suppliers. Drive cost engineering and BOM optimization without compromising on quality. Engage in component lifecycle management and ensure availability through the production lifecycle. Required Qualifications & Skills: B.E./B.Tech in Electronics, Electrical, or related field 5 10 years experience in hardware industrialization, preferably in EV or electronics manufacturing Strong knowledge of PCB design reviews, SMT/PCBA processes, and box build Hands-on with tools like Altium, OrCAD, or similar for PCB-level evaluations Experience with ICT/FCT test setups, test fixture design, and test station validation Basic embedded systems understanding firmware flashing, serial log analysis, GPIO testing Experience working directly with EMS vendors, test labs, and component suppliers Excellent cross-functional communication skills Willing to travel to EMS or supplier sites for builds and validation Nice to Have (Preferred): Familiarity with FMEA, APQP, PPAP, ISO/IATF 16949 processes Knowledge of compliance and safety standards (e.g., IEC, ISO 26262) Background in value engineering, cost-down programs, and process audits Work on industry-defining EV products with world-class engineering challenges Collaborate with cutting-edge R&D and manufacturing teams Be part of a mission-led company that s changing the landscape of mobility A workplace culture that values ownership, audacity, and excellence Apply now and be a part of something bigger. Let s create the future together. Qualification : B.E./B.Tech in Electronics, Electrical, or related field

Position: Electrical Engineer Location: Bengaluru, Karnataka, India Reporting To: Project Manager Industry: Semiconductor / Automation Qualifications: Education: Bachelor of Engineering (BE) in Electrical Engineering (Mandatory) Experience: 2 to 5 years in related fields (Control Panels, Power Calculations, Circuit Breakers) Software: Proficient in AutoCAD Electrical 2018 or later Candidate Profile: Preferably from Semiconductor Industry or Automation Sector. Hands-on experience in electrical design and control panel schematics. Essential Skills and Experience: Minimum 1 year experience creating detailed point-to-point schematics for Control Panels, Motor Control Centres, Power Distribution Panels. Minimum 2 years of electrical design experience including: Power calculations Component selection Schematic and Bill of Materials (BOM) creation I/O list creation Wire, cable, and harness selection/design Sensor selection (voltage, current, arc, temperature, etc.) Working knowledge of circuit components such as circuit breakers, contactors, relays, protection relays, push buttons, indicators, connectors, terminal blocks, cable routing accessories, and sensors. Desirable Skills: Familiarity with various process sensors: pressure, vacuum, flow, distance, displacement, proximity, limit, rotary and linear position sensors. Knowledge of EMI/EMC principles and panel design. Working knowledge of motor control systems. Responsibilities: Conduct professional electrical engineering research, design, development, modification, and testing related to electrical systems and power distribution/generation. Collaborate with a multidisciplinary engineering team (electrical, mechanical, software, technical support, productivity engineers, suppliers) on design and modifications. Maintain and develop process checkpoints to ensure compliance with design standards and project schedules. Drive process improvements in collaboration with leadership peers. Create electrical schematics and systems based on requirements; generate and release engineering drawings and BOMs. Assist in developing and refining functional specifications for electrical systems and power distribution. Qualification : Bachelor of Engineering (BE) in Electrical Engineering (Mandatory)

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Job Title: India Solutions Partner Manager Corporate Location: Madhavanagar, Bengaluru, KA 560001 Mode of Work: At Office Qualification: Bachelor s degree in Business, Marketing, Research or a related field, an MBA is a plus. Experience: 7 to 18 years No. of Positions: 1 Location: Bangalore Department: Business About the Role: We are seeking an exceptionally talented India Solutions Partner Manager Corporate who shall focus on establishing and nurturing strategic partnerships with the corporate sector in India to service the market with PIXEL s solutions, specifically GIS. The role shall involve building and managing relationships with corporate partners and clients, identifying the clients GIS based needs along with the partners, and aligning the company s solutions to help clients achieve their business goals. Below is a breakdown of the key responsibilities and qualifications for the position: Skills & Requirements: Very specifically tying up with MNC organisations operating in India with their offerings in India (who service with GIS and GIS based solutions) and to partner with these companies for GIS projects (other related projects like Low Code App projects etc as well) in India and be their GIS partner of choice. Go To Market with these companies and even front end projects as and when needed. Act also as a backend for these companies for major GIS / certain Utilities projects to service (including both corporate and Government projects that these organisations service themselves). Tie up directly with other large B2B companies for domain specific GIS projects like retail, agriculture, rural banking etc. Tie up with e-commerce start-ups to tap the GIS business generated by the start-up eco system. Tie up with domain consulting companies like irrigation consultants / smart city consultants etc for commissioning of GIS based projects and delivery based projects. Tie up with domain companies for big ticket GIS govt projects and while these domain companies get govt businesses, the partner manager should ensure sub sourcing / partnering with these companies specifically for large GIS projects especially in the land / D fense / irrigation etc sectors. Tie up with Telecom/broadband service providers, other utility companies, SCADA (Supervisory Control and Data Acquisition) solution providers in India. Drive a revenue goal through the defined partner ecosystem. Collaborate with internal teams (e.g., Sales, Marketing, Product Development) to drive joint business plans, strategies, and promotional activities. Develop and deliver training materials, presentations, and other resources to help partners understand and sell the company s solutions effectively. Ensure all partnerships align with corporate policies, legal requirements, and regulatory standards. Identify and manage potential risks related to partnerships, including financial, legal, and operational risks. Existing relationships with organization types mentioned in the job responsibilities is an absolute must. Relationships with Smart City / Irrigation consultants will be an added advantage. Industry Knowledge: Familiarity with the Indian corporate landscape servicing GIS and knowledge of relevant technologies and solution is very critical. Analytical Skills: Ability to analyse market data, understand industry trends, and make data-driven decisions. Communication and Interpersonal Skills: Strong presentation, negotiation, and relationship-building skills. Problem-Solving: Ability to address and resolve issues promptly and efficiently. Bachelor s degree in Business, Marketing, Research or a related field, an MBA is a plus. Experience: Typically, 7 -18 years of experience in partnership management, business development, or a related role within the tech, consulting, or corporate solutions sector. Note that existing relationships with organization types mentioned in the job responsibilities is an absolute must. Relationships with Smart City / Irrigation consultants will be an added advantage. This job might be for you if: You enjoy solving problems. You love taking on difficult challenges and finding creative solutions. You don t get flustered easily. If you don t know the answer, you ll dig until you find it. You pay attention to the details. As far as you re concerned, anything worth doing is worth doing right, every single time. You stay focused, and nothing falls through the cracks on your watch. You think on your feet. You like learning new things, and you can learn quickly. When things change, you know how to roll with the punches. You communicate clearly. You write well, you speak eloquently and you can explain just about anything to anyone. You are motivated and driven. You are ready for new challenges without waiting to be asked. You re going to take ownership of the time you spend with us and truly make a difference. Qualification : Bachelors degree in Business, Marketing, Research or a related field, an MBA is a plus.

Job Description: Electrical Manager Experience: 3+ Years Qualification: B.TECH (Mandatory), M.TECH (Preferred) Job Description: We are seeking an experienced Electrical Manager with at least 3 years of experience to oversee the electrical works for construction projects. The ideal candidate will have a deep understanding of electrical drawings, materials management, and project planning. The role involves managing all stages of electrical works, from planning and scheduling to execution and handover. The candidate should have completed and handed over at least two projects, including one residential and one commercial project. Key Responsibilities: Electrical Project Management: Lead the electrical team and manage electrical works for construction projects. Oversee the planning, coordination, and execution of all electrical works, ensuring they align with project specifications and timelines. Monitor and manage electrical works for both residential and commercial projects. Electrical Drawings and Works: Possess a strong knowledge of electrical drawings and works, ensuring their proper execution. Review and prepare electrical shop drawings for approval, and ensure timely submission of samples for technical approval. Tender Analysis and Worker Orders: Analyze the Tender Bill of Quantities (BoQ) and worker orders to ensure accurate estimation and cost management for electrical works. Planning & Scheduling: Create and manage electrical project schedules using MSP (Microsoft Project), ensuring efficient and timely completion of tasks at each project stage. Monitor progress and implement corrective actions when necessary to avoid delays. Material Management: Prepare and manage material requisitions and procurement processes for electrical works. Ensure proper material handling, tracking, and inventory management. Documentation & Reporting: Prepare and maintain various project documentation such as MIR (Material Inspection Reports), RPI (Request for Inspection), ECR (Engineering Change Requests), DPR (Daily Progress Reports), DLR (Daily Log Reports), and other important documents. Create and review method statements, micro work schedules, cash flow statements, and other documentation related to the electrical works. Approval and Certification: Prepare and submit client bills, ensuring that they are certified in a timely manner. Coordinate with clients and vendors to ensure that all approvals are obtained as needed. Coordination: Collaborate with other project teams to ensure the smooth integration of electrical systems with other construction works. Coordinate with vendors, PMO teams, and clients to ensure timely and successful project completion. Communication and Leadership: Provide leadership and guidance to the electrical team, ensuring high-quality work and adherence to project timelines. Exhibit excellent communication skills to interact effectively with clients, subordinates, vendors, and PMO teams. Qualifications and Skills: Experience: Minimum 3 years of experience as an Electrical Manager in the construction industry. Proven experience in completing at least two projects (one residential and one commercial). Technical Skills: Strong knowledge of electrical drawings and works, with the ability to review and approve shop drawings. Proficiency in MS Office, CAD, and MSP (Microsoft Project) for planning and scheduling electrical works. Documentation & Compliance: Experience in preparing and reviewing project documentation such as MIR, RPI, ECR, DPR, DLR, JMS, and other critical documents. Project Management: Experience in planning and scheduling electrical works, monitoring project progress, and ensuring timely completion. Familiarity with material management, procurement processes, and cost estimation. Communication Skills: Strong communication skills to interact with clients, vendors, subordinates, and other project stakeholders. Ability to lead a team and ensure seamless coordination between different departments. Qualification: A B.TECH degree in Electrical Engineering is mandatory. M.TECH is preferred. Other Skills: Strong problem-solving abilities and attention to detail. Ability to work under pressure and manage multiple tasks effectively. What We Offer: Competitive salary and benefits. Opportunity to work on diverse and high-profile construction projects. A collaborative and growth-oriented work environment. Qualification : A B.TECH degree in Electrical Engineering is mandatory. M.TECH is preferred.

Job Description: Underground Cable Designer Transmission & Distribution Description: Experience in Design of Underground Power line projects using different software or relevant such as Civil 3D, MicroStation, ArcGIS. Role and Responsibilities: Prepare designs and drawings to be carried out in accordance with relevant codes of practice, standards, regulatory authorities, and clients' requirements. Coordinate with lower-level drafting personnel. Support their mentorship and technical development. Delegate and oversee workload to lower-level drafting personnel assigned to projects. Perform documented quality reviews of drawing packages adhering to the terms of the quality management system. Provide specialist knowledge input and keep up to date with the latest developments in particular fields. Innovate and identify optimal methods to perform design tasks. Be willing to make the necessary travels to carry out project requirements. Coordinate with project engineering and project management teams to ensure timely and quality deliverables. Perform QA/QC reviews of pulling calculations, alignments, layers, design standards, and construction design packages. Promote the interests of the company, for example through personal contacts, representation in professional groups, contributions at meetings and the publication of material where opportunities arise. Qualifications: Diploma in Electrical/Civil with 3-4 years of experience OR ITI in Electrical/Civil with 6-8 years of experience. Underground experience a plus. Transmission or distribution experience preferred. Proven verbal and written communication and IT (office packages) skills. Track record in finding solutions to complex problems within deadlines. Experience leading a team of engineers and designers. Managing multiple projects, deadlines, and deliverables in parallel. Communicating with multiple teams and stakeholders. Priority management and schedule planning. Knowledge of underground powerlines construction methods a plus. Knowledge regarding easements, right-of-way, and permitting considerations and impacts. Knowledge of creating plan & profile drawings using Civil-3D or MicroStation. Able to handle multiple projects simultaneously and to prioritize work. Knowledge of utility telecommunications, distributed energy resource integration, and advanced distribution technologies a plus. Strong analytical capability. Flexibility to work in different roles for different clients both locally and worldwide. Traveling will be a considerable advantage. Capable of devising new approaches to problems encountered. Qualification : Diploma in Electrical/Civil with 3-4 years of experience OR ITI in Electrical/Civil with 6-8 years of experience.

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

Job Description: Experience in Low & High voltage w/h Creation of 3D CAD models for Electrical Routing, Schematic, Sheet metal or plastic components, PDM & PLM exposure. Experience with Automotive product development. Good in NX wiring harness, Electrical Routing & Sheetmetal & Part modeling module. Educational Qualification: BE / ME / B.Tech /M.Tech Number of Positions: 2 Qualification : BE / ME / B.Tech /M.Tech

Senior Memory Design Engineer Company Arm Location Noida, India Job Description This opening is for a Senior Memory Design Engineer in our PHYSICAL IP MEMORY group in Noida. We work on innovative memory architectures in leading-edge technology nodes to enable the best Arm Systems across all markets. As a memory design professional, this position is a rare opportunity to work with our successful circuits, characterization, and layout team, and gain a deep understanding of memory usage in SoCs based on Arm cores. You will discover a wide variety of circuit innovations while working on different types of memories in cutting-edge process technologies. Responsibilities In this role, you will be working in the following areas: Work on memory architecture development in the latest technologies. Transistor-level full-custom design and collaboration with the physical design team for layout realization. Develop new design features and perform circuit/layout optimizations to meet Performance, Power, and Area targets. Lead memory design verification and characterization activities. Ensure high-performance memory designs with the lowest possible power, as needed for Arm CPUs, GPUs, and SOCs. Required Skills and Experience 5-8 years of proven experience in memory design. Strong interest and command of basic electronics (Diodes, RC Circuits, CMOS, etc.). Solid understanding of digital electronics fundamentals (Flip-Flops, Latches, Decoders, Multiplexers). Understanding of setup and hold time concepts. In-depth knowledge of memory fundamentals, especially single-port SRAM: Circuit design (Bitcell, WL decoder, Sense Amp, Self-time, Assist, Low power features, DFT features). Good understanding of technology trade-offs in deep sub-micron technologies. Self-motivated, hardworking, and positive outlook. Strong organizational skills with attention to detail. Nice-to-Have Skills and Experience Understanding of advanced process technology nodes and memory product layout implementation. Experience with shell scripting, machine learning (ML), and automation. Knowledge of statistical simulations (e.g., Monte Carlo). What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, and meritocratic workplace where everyone can grow and succeed, we encourage our people to make exceptional contributions to Arm's success in the global marketplace. Accommodations at Arm If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. By sending the requested information, you consent to its use by Arm to arrange appropriate accommodations. All accommodation requests will be treated with confidentiality, and information will only be disclosed as necessary to provide the accommodation. Examples of support include breaks between interviews, having documents read aloud, or office accessibility. Hybrid Working at Arm Arm s hybrid working approach is designed to create an environment that supports both high performance and personal wellbeing. We believe in bringing people together face-to-face to enable faster work while recognizing the value of flexibility. Hybrid working patterns depend on team and role requirements, which will be discussed upon application. Some flexibility might be limited by legal, regulatory, tax, or other considerations. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to fostering an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Job Title: Junior 5G RAN Developer Location: Bengaluru, India Experience: 1 to 4 years Education: B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or equivalent. About Tietoevry At Tietoevry, we are committed to driving innovation in Wireless Telecommunications and shaping the future of connectivity. As part of our global R&D initiatives, we collaborate with industry leaders to develop state-of-the-art solutions for 5G networks. We foster an inclusive and collaborative environment, offering opportunities for growth, learning, and cutting-edge development in next-generation technologies. Role Overview As a Junior 5G RAN Developer, you will play a key role in the design, development, and testing of software components across multiple layers of the 5G NR protocol stack. You will work on gNodeB development, collaborating with global teams in an agile environment, delivering high-performance solutions for future wireless networks. Key Responsibilities Contribute to the development and verification of features within the 5G NR Radio Access Network (RAN), focusing on gNodeB. Develop Low-Level Design (LLD) and implement new features for 5G RAN software, ensuring compliance with 3GPP standards. Collaborate with cross-functional teams, including system integrators, to ensure smooth integration across different RAN components. Analyze and resolve complex issues, including log file analysis and debugging in live environments. Continuously work towards improving system performance and delivering high-quality solutions. Document development processes, test cases, and outcomes comprehensively for future reference. Mandatory Skills & Experience Hands-on experience in LTE/5G NR Layer-1, Layer-2, and Layer-3 protocol software development. Expertise in 3GPP specifications, particularly related to Layer-1, Layer-2, and Layer-3 protocols. Strong understanding of MAC Scheduler and Layer1-Layer2 and Layer2-Layer3 interfaces. Solid understanding of networking protocols such as TCP/IP, UDP, SCTP, etc. Proficiency in C/C++ programming, with experience in software debugging and troubleshooting complex RAN-related issues. Familiarity with Agile methodologies and hands-on experience with Jira and similar project management tools. Experience working with Git, Gerrit, or equivalent version control tools. Prior experience with cloud technologies (e.g., microservices, containers) is an added advantage. Strong communication skills, with the ability to work effectively in a global, multicultural environment. Work on pioneering 5G technology projects in a dynamic, collaborative environment. A global culture built on Nordic values transparency, low hierarchy, respect, and trust. Opportunities for ongoing learning and professional development in cutting-edge technologies. A supportive environment where innovation and work-life balance are actively encouraged. Inclusive workplace where diversity, equity, and inclusion are valued and celebrated. Diversity & Inclusion Commitment At Tietoevry, we believe that diversity drives innovation. We welcome applications from candidates of all backgrounds, genders (m/f/d), and walks of life, fostering an inclusive and inspiring work environment where everyone feels valued and empowered to contribute. Qualification : B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or equivalent.

Job Title: Senior 5G RAN Developer Location: Bengaluru, India Experience: 4 to 8 years Education: B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or an equivalent discipline About Tietoevry At Tietoevry, we are at the forefront of 5G innovation, collaborating with global telecom leaders to design and deliver next-generation wireless solutions. Our inclusive, innovation-driven culture offers the perfect platform to work on cutting-edge technologies and contribute to shaping the future of connectivity. Role Overview As a Senior 5G RAN Developer, you will play a critical role in designing, developing, and maintaining 5G NR protocol software components. You will lead the systemization, development, and verification processes for various RAN subsystems, contributing to the development and optimization of gNodeB solutions. This role requires deep technical expertise in 5G RAN Layer 1, 2, and 3, combined with strong architectural insight and a proactive, problem-solving mindset. You will collaborate closely with clients and global teams, provide technical guidance to peers, and help drive innovation in our 5G product portfolio. Key Responsibilities Contribute to product development, maintenance, and delivery, including requirement analysis, high-level design (HLD), low-level design (LLD), coding, and verification of gNodeB. Analyze and prioritize 3GPP features for development across different subsystems. Lead system integration and testing activities in collaboration with client and internal teams. Provide technical leadership by guiding teams on complex design and architectural decisions. Drive continuous performance improvement and ensure quality deliverables. Identify and implement architectural enhancements to optimize product performance and scalability. Document development processes, system designs, and testing outcomes thoroughly. Mandatory Skills & Experience Proven hands-on experience in developing LTE/5G NR MAC Scheduler and Layer-2 protocols. Deep knowledge of 3GPP specifications, particularly across Layer 1, Layer 2, and Layer 3. Strong understanding of Layer1-Layer2 and Layer2-Layer3 interfaces. Solid understanding of networking protocols such as TCP/IP, UDP, SCTP, etc. Experience debugging complex gNodeB issues, including log file analysis and troubleshooting in live environments. Proficiency in C/C++ programming, with experience implementing complex algorithms. Hands-on experience with any of the following features: MAC, RLC, PDCP, Scheduler, Power Control, SPS, TTI Bundling, Link Adaptation, GTP-C, GTP-U In-depth understanding of 3GPP Radio Access Standards, ORAN split architecture, and radio protocol algorithms. Experience in feasibility studies and simulations related to Layer 1/PHY features and packet scheduler algorithms. Experience in software development and systemization for 5G Layer 1/Layer 2/Layer 3 protocols. Strong grasp of Linux OS and optimization techniques using DPDK. Hands-on expertise with version control tools like Git and Gerrit, and project management tools like Jira. Experience working in Agile environments. Preferred Skills Experience with cloud technologies, such as microservices and containers. Exposure to ORAN/Open RAN ecosystems is a plus. Strong analytical mindset with a self-driven and proactive approach. Soft Skills Excellent communication skills, with the ability to work in a dynamic, multicultural environment. Strong collaboration skills to work closely with cross-functional teams across geographies. Ability to mentor and guide junior developers, fostering knowledge sharing within the team. Opportunity to work on cutting-edge 5G technology projects in collaboration with global telecom leaders. A Nordic-inspired culture based on trust, transparency, respect, and low hierarchy. Professional growth through continuous learning, training programs, and exposure to emerging technologies. An inclusive workplace that supports work-life balance. Opportunities for global collaboration, contributing to innovative solutions that shape the future of mobile connectivity. Diversity & Inclusion Commitment At Tietoevry, we believe that diversity fuels innovation. We actively encourage applications from all genders (m/f/d) and candidates from diverse backgrounds. We are committed to fostering an open, inclusive, and inspiring workplace where every individual can thrive. Qualification : B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or an equivalent discipline

Overview The Microsoft Azure Storage team is looking for a Senior Software Engineer - Azure Storage with design, coding, and testing skills, to develop strategy and automation to validate Azure's massive distributed storage system. We are looking for talented Senior Software Engineer - Azure Storage who are customer obsessed and passionate about creating high quality end to end experiences that delight customers. You will have an opportunity to make high impact changes on a daily basis as you work on a hyperscale storage system that may indirectly or directly be used daily by your friends and family. Microsoft s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. Qualifications Required Qualifications: Bachelor's Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, or C# OR equivalent experience. 3+ years of experience in developing software/drivers for Windows PCs or Embedded systems. 3+ years of experience with Windows Kernel debugging, Windbg Debug Extensions, and auto analysis 3+ years of experience building scalable, distributed services. Familiarity with engineering build tooling and automation at scale. Other Requirements: Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter. Additional / Preferred Qualifications: Experience with a large scale storage, high quality code, distributed systems, and cloud services. Competent in software engineering practices, coding and foundation in data structures, algorithms with testing, debugging and analytical skills. Knowledge of UMDF/KMDF driver fundamentals and knowledge of new hardware platform enablement and bring-up activities. #Azurecorejobs Responsibilities Design, develop and operate scalable, low latency and high throughput cloud services and frameworks to stress storage backend. Work on complex and critical cloud scale storage features integration. Play a crucial role in the product quality by designing end to end scenario validation. Develop software and infrastructure for new hardware storage solutions (Windows Drivers, Windows services, fault analysis automation, performance analysis). Experiment, study and analyze the system behavior, health under different load conditions. Take an active role and partner with peer teams and external partners to ensure new storage features meeting target availability, security and reliability. Drive cross organization Quality initiatives to streamline release quality gates and release pipeline. Being part of Azure core team, work on the product code base to improve its test-ability, diagnostic-ability, debug-ability and overall product health for the storage system. Qualification : Bachelor's Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, or C# OR equivalent experience.

We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

General Summary: Qualcomm is the industry leader in integrated chipsets that power advanced mobile devices. We are expanding our expertise in wireless technologies and advanced multimedia capabilities to continue delivering high-performance multimedia systems with low power consumption and competitive cost, while maintaining strong feature differentiation. Join Qualcomm India s Multimedia Systems Team and work at the cutting edge of performance modeling, system architecture, and evaluation of camera, video, and computer vision hardware IPs. This role offers the chance to collaborate on image signal processors (ISP), video codec hardware, and advanced algorithms for computer vision and image/video processing. Key Responsibilities: As part of the Systems and R&D team, your responsibilities may include the following: Design and maintain transaction-accurate/static models for multimedia IPs. Perform performance validation and debugging for pre- and post-silicon platforms. Conduct architecture analysis for system performance optimization. Define use-case flows for multimedia applications. Understand product features and assess their impact on system performance. Collaborate with the product marketing team to recommend feature support configurations for specific system setups. Minimum Qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or a related field with 4+ years of relevant experience, or Master s degree with 3+ years of experience. Strong analytical and problem-solving skills with implementation experience. Solid understanding of SoC infrastructure (NoC, Memory Controller, DDR, QoS, MMU). Systems mindset with a focus on power and performance optimization. Experience in performance modeling/verification and debugging system performance issues. Proficiency in C, SystemC, and familiarity with UNIX/Win/Linux computing platforms. Preferred Qualifications: Background in system architecture, hardware IP micro-architecture, or embedded software/firmware. Experience in image/video signal processing. Knowledge of image sensor technology and codec standards. Educational Requirements: Required: Bachelor s degree in Computer Science or Electrical & Computer Engineering. Preferred: Master s degree in a related field. Qualification : Bachelors in Computer science or Electrica

Minimum qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or equivalent practical experience. 20 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Experience in leading chip development projects. Experience in working with external ASIC vendors. Preferred qualifications: Master's degree or PhD in Engineering, or a related field. Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation). Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners. Ability to motivate and focus a large collaboration to reach challenging goals. Excellent communication and facilitation skills. About the job In this role, you ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As a Chip Leader, you will be responsible for overseeing the design and development of AI accelerators for our data center. You will be responsible for leading the chip design, from architecture requirements up to tape-out. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Own the chip development and execution. Accountable for Quality, Schedule and Performance, Power, Area (PPA), being the primary point of contact for day-to-day execution of chip development, planning and tracking. Coordinate the work of different disciplines, such as design, verification, and test, to ensure the chip meets all specifications and requirements. Collaborate with the leadership team of each chip project: Technical Program Manager, Design Verification lead, Physical Design lead, DFT lead, and architecture team, to make execution decisions and drive the development process. Resolve technical issues that arise during the chip development process. Ensure chip quality by implementing best practices and implementing quality control measures. Be responsible for project development with the highest quality, manage issues as they arise through design and implementation. Work with Software and Platform teams for hardware-software co-development. Qualification : Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.

SolarEdge (NASDAQ: SEDG), is a global leader in high-performance smart energy technology, with over 4000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. Our R&D division is growing globally, as a IoT/IoE Firmware Engineer, you will be a crucial member of the SolarEdge India R&D team in Bangalore, responsible for developing embedded systems and firmware for our advanced solar energy products. You will play a key role in designing, implementing, and testing embedded software, ensuring its reliability, performance, and seamless integration with our hardware platforms. Responsibilities: Design, develop, test and maintain code for modern embedded Linux based IOT devices, both in low level and system level development. Collaborate with cross-functional teams, including Embedded firmware/hardware engineers, software developers, and product managers, to define system requirements and architect innovative embedded solutions. Develop and deploy secure, scalable, and reliable IoT/IoE architectures. Interface with sensors, actuators, and microcontrollers, Collect, process, and analyze sensor data using advanced tools Develop and implement efficient and reliable embedded software in C and C++ for Embedded Linux system used in SolarEdge products" Troubleshoot and debug embedded software and hardware interactions, identifying and resolving issues throughout the product development lifecycle. Participate in code reviews, providing constructive feedback to team members and ensuring code quality and adherence to coding standards. Job Requirements Bachelor's (B.E./B.Tech.) or master s degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field. 2+ years of experience in IoT/IoE embedded systems design and firmware development. Strong programming skills in both C and C++ Experience with Python is desirable. Proven experience in building complex, high-performance systems and applications. Proficiency in using modern development tools and version control systems (e.g., Git, Docker) Experience in user space application development in Linux Ability to identify, troubleshoot hardware and software technical problems. Strong debugging and Analytical thinking, problem-solving skills Excellent communication and teamwork skills to collaborate effectively with cross-functional teams. Experience in the renewable energy or power electronics industry is an added advantage. Provide technical support and troubleshooting assistance during product development. Stay up to date with the latest advancements in power electronics and firmware technologies. Drive results within constraints of Product life cycle development and production at scale. Results-oriented mindset with a focus on achieving tangible and measurable results. SolarEdge recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people. SolarEdge is committed to seeking out and retaining the finest human talent to ensure top business growth and performance. Qualification : Bachelor's (B.E./B.Tech.) or masters degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field.

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

Job Overview As a Hardware Engineer at Qualcomm, you'll be part of a dynamic team that plans, designs, optimizes, verifies, and tests cutting-edge electronic systems, including circuits, mechanical systems, digital/analog/RF/optical systems, and more. Your role will focus on SerDes PHY Analog Design, specifically within the BDC SerDes Mixed-Signal Design team. This team is directly involved in delivering next-generation custom PHY designs for SoCs (System on Chips), with a key focus on low-power analog designs to support Qualcomm s wireless products. You ll work with cross-functional teams to meet performance requirements and help bring innovative products to market. Key Responsibilities Analog Circuit Design: Hands-on experience in analog circuit design, working on multiple analog building blocks, including LDO, high-speed TX and RX (Equalizer, Sampler, PI, Deserializer), Bias, and Reference circuits. PLL and Frequency Synthesis: Design and implement Analog and Digital PLLs for frequency synthesis and SerDes applications, including Charge Pumps, Loop Filters, VCO/DCO, PFD/TDC, and high-speed dividers. PLL Loop Dynamics: Model PLL Loop Dynamics, including sources of Jitter (RJ & DJ). Schematic to Post-Layout Verification: Take designs from initial schematic to post-layout verification, and ensure integration sign-off for post-silicon bring-up. Collaboration: Work closely with RTL, DD, PD, DV, and SoC Verification teams to integrate the PHY into SoCs. Minimum Qualifications Educational Background: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 3+ years of relevant work experience, or Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 2+ years of relevant work experience, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field, with 1+ year of relevant work experience. Skills & Experience Analog Circuit Design: Hands-on experience with designing analog building blocks such as LDO, high-speed TX/RX, bias, and reference circuits. PLL Design: Strong background in Analog and Digital PLLs for frequency synthesis and SerDes applications. Charge Pump and VCO/DCO: Experience in designing charge pumps, loop filters, VCO/DCO, PFD/TDC, and high-speed dividers. Jitter and PLL Loop Dynamics: In-depth understanding of PLL loop dynamics, jitter modeling, and frequency synthesis for SerDes systems. Design Verification: Experience in taking designs from schematic through post-layout verification, integration, and post-silicon bring-up. Team Collaboration: Ability to work with cross-functional teams such as RTL, DD, PD, DV, and SoC verification teams to ensure smooth integration.

Engineer will be working on Embedded Firmware which involves feature development, integration, and bug fixing and maintenance. Experience in embedded architecture, external interfaces, product constraints, along with ability to develop architectures/features that meet these constraints while providing new value for the platform. Strong Experience in C\C++ Strong Experience in embedded Systems Strong Experience in RTOS System level design Experience in low level programming in ARM or ARC architecture Experience in debugging Embedded system software with Innovative techniques Experience in capturing and debugging based on HW Signals. Experience in Requirement understanding and designing solution with good presentation skills.Add-on:- Experience in USB Protocol- Experience in PCI System flows- Experience in Bluetooth Controller / Host protocols( BR\EDR) and Bluetooth Low Energy- Exposure to Python scripting.- Agile and scrum practices Qualifications Bachelor's or Master s degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience. Proven experience in Embedded system software / Firmware development in RTOS environment with strong system knowledge in understanding the requirements and making the design, development and deployment in embedded products. Solid understanding of software development life cycle (SDLC) and Agile methodologies. Excellent problem-solving skills and attention to detail. Strong written and verbal communication skills. Experience in maintaining and managing codebases, ensuring high standards of code quality. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Bachelor's or Masters degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience.