Memory Subsystem Verification Jobs in Bengaluru

Position: Senior Test Engineer Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication (EC) Experience: 4 to 10 Years Key Skills & Expertise Strong experience in testing, troubleshooting, and debugging complex PCBAs and electronic subsystems. Proficient in analyzing and working with FPGAs, processors, DDR memory, and ADC components. Skilled problem solver with the ability to think creatively and troubleshoot effectively. Hands-on experience with testing equipment such as oscilloscopes, spectrum analyzers, function generators, power meters, and other test instruments. Familiarity with programming tools and materials/component specifications. Excellent communication skills for customer interaction regarding queries and status updates. Proven team player with the ability to train and mentor junior engineers. Deep understanding of engineering principles and product design, with keen attention to detail. Job Responsibilities Test, troubleshoot, and debug complex PCBAs and electronic subsystems incorporating FPGAs, processors, DDRs, and ADCs. Analyze and comprehend complete test procedures and parameters; develop customized test procedures tailored to FPGA, processor, and ADC boards and subsystems. Lead qualification and environmental stress screening (ESS) tests, coordinating efforts with engineering teams and customers. Design and implement straightforward yet comprehensive quality-check processes to ensure optimal product performance. Collaborate with cross-functional teams to resolve issues and improve testing methodologies. Provide training and guidance to team members, fostering a culture of continuous learning and improvement. Qualification : B.E./B.Tech. in Electronics & Communication (EC)

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

Senior Memory Design Engineer Company Arm Location Noida, India Job Description This opening is for a Senior Memory Design Engineer in our PHYSICAL IP MEMORY group in Noida. We work on innovative memory architectures in leading-edge technology nodes to enable the best Arm Systems across all markets. As a memory design professional, this position is a rare opportunity to work with our successful circuits, characterization, and layout team, and gain a deep understanding of memory usage in SoCs based on Arm cores. You will discover a wide variety of circuit innovations while working on different types of memories in cutting-edge process technologies. Responsibilities In this role, you will be working in the following areas: Work on memory architecture development in the latest technologies. Transistor-level full-custom design and collaboration with the physical design team for layout realization. Develop new design features and perform circuit/layout optimizations to meet Performance, Power, and Area targets. Lead memory design verification and characterization activities. Ensure high-performance memory designs with the lowest possible power, as needed for Arm CPUs, GPUs, and SOCs. Required Skills and Experience 5-8 years of proven experience in memory design. Strong interest and command of basic electronics (Diodes, RC Circuits, CMOS, etc.). Solid understanding of digital electronics fundamentals (Flip-Flops, Latches, Decoders, Multiplexers). Understanding of setup and hold time concepts. In-depth knowledge of memory fundamentals, especially single-port SRAM: Circuit design (Bitcell, WL decoder, Sense Amp, Self-time, Assist, Low power features, DFT features). Good understanding of technology trade-offs in deep sub-micron technologies. Self-motivated, hardworking, and positive outlook. Strong organizational skills with attention to detail. Nice-to-Have Skills and Experience Understanding of advanced process technology nodes and memory product layout implementation. Experience with shell scripting, machine learning (ML), and automation. Knowledge of statistical simulations (e.g., Monte Carlo). What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, and meritocratic workplace where everyone can grow and succeed, we encourage our people to make exceptional contributions to Arm's success in the global marketplace. Accommodations at Arm If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. By sending the requested information, you consent to its use by Arm to arrange appropriate accommodations. All accommodation requests will be treated with confidentiality, and information will only be disclosed as necessary to provide the accommodation. Examples of support include breaks between interviews, having documents read aloud, or office accessibility. Hybrid Working at Arm Arm s hybrid working approach is designed to create an environment that supports both high performance and personal wellbeing. We believe in bringing people together face-to-face to enable faster work while recognizing the value of flexibility. Hybrid working patterns depend on team and role requirements, which will be discussed upon application. Some flexibility might be limited by legal, regulatory, tax, or other considerations. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to fostering an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

CPU Verification Engineer Company Arm Location Bengaluru Job Overview Responsibilities Contribute technically as part of project teams to deliver high-quality ARM CPU designs. Execute comprehensive CPU design verification, focusing on improving design quality through stress testing and bug identification. Effectively plan, conduct reviews, provide status updates, and meet delivery expectations. Collaborate with design and architecture teams to ensure effective coverage and provide accurate project planning inputs. Design and develop verification testbenches and components required for effective verification. Maintain knowledge of company processes to work effectively within defined standards and methodologies. Drive efficiency improvements in verification tools and methodologies and mentor team members to support career development. Required Skills and Experience 3+ years of experience in CPU, IP, or SoC product development environments. Experience in design verification/validation, including developing test plans, testbenches, and executing measurable verification processes. Familiarity with processor verification using assembly language and C/C++. Knowledge of microprocessor and/or SoC architecture and microarchitecture, preferably ARM processors and ARM-based systems. Strong problem-solving and debugging skills, with a commitment to continuous improvement. Nice-To-Have Skills and Experience Strong understanding of CPU architecture and microarchitecture. Experience with ARM-based system designs and hierarchical memory systems. Programming languages: Verilog, Assembly, C/C++, Perl, Python. Experience with verification languages such as SystemVerilog. Familiarity with power-aware verification methodologies. What Arm Offers This is a fantastic opportunity to shape the future of CPU verification at Arm while advancing your own career. Join our CPU design verification team and play a key role in delivering Arm's strategic goals! #LI-KR2

CPU Performance Engineer Company Arm Location Bengaluru Job Overview At Arm, we are building the Future of Computing. Achieving generational performance gains requires deep understanding of the core, microarchitecture, system-level details, and the workloads that run on them. We are seeking a highly motivated and skilled engineer to drive analysis, characterization, and deep understanding of complex infrastructure workloads. This is a versatile and high-visibility role requiring collaboration with global teams including hardware architects, software engineers, and toolchain experts. Your work will help shape the next-generation CPU microarchitecture through comprehensive workload performance analysis. Responsibilities Perform performance analysis and characterization of complex infrastructure workloads to identify software and microarchitectural improvements for next-generation processors/systems. Analyze CPU performance, power, and cost while identifying key technology challenges and opportunities for innovation. Collaborate with Arm architects to develop technologies that contribute to maintaining a best-in-class compute systems roadmap. Develop expertise in the competitive landscape and emerging technologies in areas such as infrastructure, computer vision, and machine learning. Required Skills and Experience Strong knowledge and experience in CPU architecture and microarchitecture, gained through development, research, or performance analysis/modeling/design. Ability to break down workload performance into insights spanning software (applications, toolchain, libraries) and CPU/system microarchitecture. Proven ability to work effectively both independently and as part of geographically distributed teams across multiple functional groups. Innovative mindset with a strong drive to explore new approaches, influence stakeholders through detailed investigation, and solve challenging technical problems. Bachelor s or Master s degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis. Nice-To-Have Skills and Experience Experience in CPU performance analysis and/or modeling. Background in workload analysis, characterization, and/or optimization of open-source software. Understanding of CPU infrastructure architectures and system-level constraints. Hands-on experience with advanced CPU techniques such as branch prediction and prefetching. Comfort working with emerging technologies and staying current with research advancements. Track record of influencing product roadmaps and delivering innovative solutions through prototypes and empirical analysis. What Arm Offers Arm provides an exceptional collaborative environment, offering exciting challenges and career growth opportunities. If you are interested but feel you don t meet every requirement, we encourage you to apply we value diverse skills and innovative thinking! #LI-KR2 Qualification : Bachelors or Masters degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis.

Job Overview: The Architecture and Technology Group (ATG) at Arm develops technologies and products for Arm s future architecture roadmap. In ATG, we are developing world-leading Secure CPU and System architectures and associated technologies; enabling our ecosystem to build compelling products. Along with the architecture definition, ATG develops products to confirm compliance to the architecture. The ATG team located in Bangalore develops a product called Architecture Compliance Kits (ACK) that are delivered to multiple internal and external CPU design teams to validate that Arm architecture CPU implementations are compliant with the Arm architecture. You will learn Arm Architecture and apply it along with hardware and software verification skills to develop products for verifying the Architecture. You will develop good engineering and technical skills, and a fair understanding of CPU architecture and microarchitecture. You will connect with a wide range of teams within ATG, architects, and with our external partners. In this role, you will also develop solutions for future Arm architecture developments and influence the product offering. Responsibilities: Technical expertise, understanding architecture definitions, carrying out investigations and feasibility studies, defining and developing verification strategies, and contributing to the development of compliance products. Design verification test plans and test cases in assembly, C, HVL, and higher abstraction languages using automation techniques as needed. Strong and continuous communication on deliveries and risks, ensuring that all engineering commitments are delivered successfully. Drive efficiency improvements through adoption of the right development flows and methodologies. Excellent verbal and written communication skills. Required Skills and Experience: B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering. 8+ years of verification experience (CPU/complex IP verification is a plus). Strong understanding of computer architecture. Proficiency in logical programming using C/C++/Assembly with experience in adopting software engineering best practices. Nice To Have Skills and Experience: Experience in CPU verification would be a plus. Knowledge of x86 or Arm processor architecture. We are guided by our core beliefs that reflect our culture and guide our decisions, defining how we work together to surpass ordinary and craft outstanding products and careers. In Return: We promise you endless opportunities to experiment and go even further in hardware! From architecture definition to complex core implementation to full custom physical IPs, here you'll have our backing to push limits in vital areas. #LI-KR2 Qualification : B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering.

Job Description: We are seeking a highly skilled and experienced CPU Verification Engineer with a focus on ARM and NCC-based ARM architecture. This role requires a deep understanding of CPU microarchitecture, SOC integration, and verification methodologies. The ideal candidate will lead verification efforts, collaborate with cross-functional teams, and mentor junior engineers to ensure high-quality CPU design verification. Key Responsibilities: Lead and execute verification plans for CPU designs based on ARM and NCC-based ARM architecture. Develop and enhance testbenches and verification environments using advanced automation techniques. Collaborate with design and architecture teams to identify and resolve specification gaps, ensuring comprehensive verification coverage. Perform SOC-level verification, including integration and validation of CPU subsystems. Utilize industry-standard verification tools and methodologies such as UVM, SystemVerilog, and simulation/emulation platforms. Mentor and guide junior verification engineers, providing technical leadership and support. Continuously improve verification processes and methodologies to enhance efficiency and effectiveness. Qualifications: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. 8 14 years of experience in CPU verification, with a focus on ARM and NCC-based ARM architecture. Proficiency in verification languages and methodologies, including SystemVerilog, UVM, and scripting languages (Python, Perl, etc.). Strong understanding of CPU microarchitecture, memory hierarchy, and SOC integration. Experience with simulation, emulation, and formal verification tools. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills, with the ability to work in a collaborative environment. Preferred Qualifications: Experience with low-power design verification and performance verification. Knowledge of hardware security verification techniques. Familiarity with machine learning and AI-based verification approaches. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of hardware engineering or related work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or related field and 1+ year of hardware engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

Technical Requirements: 1. Experience in Verification: SoC (System on Chip), Sub-system, and Block Level verification. Strong understanding of verification methodologies and flow. 2. ARM Architecture & AMBA Protocol: Hands-on experience in ARM architecture. In-depth knowledge of AMBA protocol at the SoC and sub-system levels. 3. Verification Methodologies: Expertise in UVM (Universal Verification Methodology), OVM (Open Verification Methodology), SV (SystemVerilog), Verilog, and C-based verification methodology. Strong command over verification languages like SystemVerilog and Verilog. 4. Additional Verification Tools & Exposure: Exposure to GLS (Gate-Level Simulation) and power-aware verification is a plus. 5. Protocols Knowledge: Practical experience with verification of various protocols, such as: PCIe, DDRx, Ethernet, USB, AXI, AHB, APB, I2C, SPI. 6. RTL Debugging & Test Automation Scripting: Strong RTL (Register Transfer Level) debugging skills. Ability to write test automation scripts using TCL, Perl, or Python. 7. Testbench (TB) and Test Cases: Experience in building testbenches (TB) and test cases from scratch. In-depth knowledge of creating scalable and reusable testbenches. 8. Verification Tools: Familiarity with industry-standard verification tools for simulation, debugging, and automation. Expectations from the Role: 1. Communication & Inter-personal Skills: Strong communication and inter-personal skills. Ability to work independently or as part of a team, collaborating effectively with cross-functional teams. 2. Learning & Adaptability: Ability to quickly learn new technologies and verification tools. Ability to work in a distributed work environment and adapt to diverse work conditions. 3. Ownership & Punctuality: Demonstrated ownership of tasks and projects. High punctuality and accountability in delivering results within agreed timelines.

Technical Requirements: 1. Verification Experience: Strong experience in SoC, sub-system, and block-level verification. Ability to handle different verification stages and methodologies for complex systems. 2. Hands-on Experience with ARM Architecture and AMBA Protocol: ARM architecture familiarity, particularly at the SoC and sub-system level. Expertise in AMBA protocol (e.g., AHB, APB, AXI) and its application in SoC verification. 3. Verification Methodologies: Proficient in UVM/OVM, SystemVerilog, Verilog, and C-based verification methodologies. Solid understanding of testbenches (TB), test cases, and automation methodologies. Experience in test automation scripting with languages such as TCL, Perl, and Python. 4. Exposure to Advanced Verification Techniques: GLS (Gate-Level Simulation) experience is a plus. Power-aware verification knowledge, ensuring low power consumption in designs. 5. Protocol Knowledge: Working knowledge of industry protocols such as PCIe, DDRx, Ethernet, USB, I2C, SPI, among others. Familiarity with AXI, AHB, APB protocols for data communication in embedded systems. 6. RTL Debugging & Tools Proficiency: Strong RTL debugging skills to identify and resolve issues in designs. Well-versed with industry-standard verification tools used in simulation, debugging, and analysis. 7. Building Testbenches & Test Cases: Extensive experience in building testbenches from scratch. Ability to create and implement detailed test cases for different verification scenarios. Expectations from the Role: 1. Communication and Interpersonal Skills: Strong ability to communicate technical concepts effectively both within the team and with other stakeholders. Clear verbal and written communication skills for reporting progress and challenges. 2. Independent and Team-based Work: Ability to work independently on projects or as part of a team. Able to take ownership of tasks and contribute to team discussions effectively. 3. Learning and Adaptability: Ability to learn quickly and adapt to evolving technologies and methodologies. Stay updated with advancements in verification techniques and tools. 4. Ownership and Accountability: Demonstrated ownership of projects, ensuring timely completion and addressing any challenges that arise. Ensuring high-quality results through attention to detail. 5. Leadership & Mentorship: Ability to mentor and lead junior engineers and verification teams. Provide guidance in solving complex problems and ensuring successful project outcomes. 6. Punctuality and Responsibility: Demonstrated punctuality in meeting deadlines and project milestones. Timely execution of tasks and troubleshooting to maintain project timelines. Ideal Candidate Profile: The ideal candidate will have significant experience with SoC verification, ARM architecture, and verification methodologies such as UVM and SystemVerilog. The candidate should possess strong protocol knowledge and be proficient in debugging RTL and automating test scenarios. A key aspect of the role is the ability to work independently, take ownership of tasks, and guide the team in solving technical challenges. Leadership and mentoring abilities are essential, as is the capacity to manage multiple tasks effectively in a distributed work environment.

Job Description You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology.As a DFT engineer Direct Responsibilities of the role, but not limited to: Working on various aspects of PCORE DFT including Spyglass DFT, RTL implementation, Verification, Scan, and ATPG. The candidate must be able to drive the DFT implementation for various features incl Scan, MBIST, TAP, etc. Previous experience working with manufacturing engineering, pattern delivery, and post-silicon support is a definite plus. Qualifications Candidate must possess a master's degree in Electronics or Computer Engineering with at least 5 or more years of experience or a bachelor's degree with at least 7 years of experience of DFT experience. Strong knowledge of ATPG, various fault models, fault grading. Knowledge of memory BIST, IJTAG/TAP architecture. DFT logic generation, integration, and verification. EDA vendor-supported scan architectures and tools, covering synthesis, timing, DRC, ATPG, GLS (Unit delay and Timing/SDF based), and tester bring up preferably Mentor/Siemens Tessent Shell, TestKompress, ATPG coverage debug Experience in Design Verification (DV) using standard simulators e.g. VCS, Verdi waveform viewer. Post Silicon/ATE Bring-Up Support. Experience with RTL (Verilog, System Verilog, VHDL). Inside this Business Group The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core , and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Candidate must possess a master's degree in Electronics or Computer Engineering with at least 5 or more years of experience or a bachelor's degree with at least 7 years of experience of DFT experience.

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. ASIC Engineer, Design Verification Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve functional failures in the design, partnering with the Design team Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry Minimum Qualifications Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience of at least 9+ years Track record of 'first-pass success' in ASIC development cycles Hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle At least 9+ years of hands on experience Preferred Qualifications Experience in development of UVM based verification environments from scratch Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs Experience with revision control systems like Mercurial(Hg), Git or SVN Experience with verification of ARM/RISC-V based sub-systems or SoCs Experience with IP or integration verification of high-speed interfaces like PCIe, DDR, Ethernet Experience working across and building relationships with cross-functional design, model and emulation teams Qualification : Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience of at least 9+ years

Job Title: Principal Electronics Engineer Embedded Hardware Location: Bengaluru Experience: 8 14 years Industry: Automotive / EV / Manufacturing Employment Type: Full-time About Ultraviolette Join the Charge. Create the Future. At Ultraviolette, we are more than just a company we re a movement that s reshaping the future of electric mobility. From building India s fastest electric motorcycle to designing the world s most advanced electric scooter, we thrive on pushing the boundaries of what s possible. We are a team of engineers, designers, and trailblazers united by a passion to craft machines that are sustainable, intelligent, and exhilarating. Every bolt, every line of code, and every component is designed with a singular mission: to accelerate the global shift toward next-generation mobility. Role Overview We are looking for a Principal / Lead Electronics Engineer Embedded Hardware to take ownership of vehicle electronics architecture, embedded systems design, diagnostics, and system-level validation for our next-gen electric vehicles. In this role, you will be at the forefront of developing high-performance electronic control units, telematics, and connected systems for future-ready vehicles. You will drive architecture decisions, system integration, and compliance, working alongside cross-functional teams to bring innovation from concept to the street. Key Responsibilities 1. Vehicle Electronics Architecture Design and bring to production electronic hardware including ECUs, display clusters, and telematics modules. Develop high-speed embedded designs with RF, sensor integration, and communication interfaces (CAN, LIN, UART, SPI, I2C). Create and maintain system schematics, architecture documentation, and interface definitions. 2. Embedded Hardware Design Develop embedded platforms with high-performance microcontrollers/processors to support vision systems, graphics, radar/LiDAR, audio, and OS-based applications. Architect and validate connected systems involving GNSS, LTE, BLE, Wi-Fi. Lead the design and integration of vehicle subsystems like lighting, clusters, IMUs, and more. Collaborate closely with firmware teams on hardware-software integration, bootloaders, and OTA functionality. 3. Diagnostics & Compliance Implement UDS-based diagnostics, fault logging systems, and service tools. Ensure compliance with AIS-004, ISO 26262, and other automotive design standards. 4. Testing & Validation Define and execute component-level and vehicle-level validation test plans. Utilize tools like Vector CANoe, CANalyzer, ETAS INCA, oscilloscopes, and spectrum/network analyzers for debugging and validation. 5. Cross-functional Collaboration Partner with teams across mechanical, software, UX, powertrain, and wire harness for holistic system integration. Work with mobile and cloud teams to enable real-time data streaming, diagnostics, and OTA updates. Actively contribute in design reviews, DFMEAs, and root cause analyses of field issues. Required Qualifications & Skills B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines. 8+ years of embedded hardware design experience, preferably in 2W/EV/automotive domain. Strong understanding of embedded C and scripting languages (e.g., Python, MATLAB, Octave). Experience with circuit simulation tools (e.g., PSPICE, LTSPICE, SIMPLIS, Simetrix). Hands-on expertise in RF design, signal/power integrity, EMI/EMC compliant layouts. Proficiency in PCB design tools (e.g., OrCAD, Altium, Mentor Graphics). Demonstrated experience in designing systems with multi-core processors, memory chips, SoMs, and high-speed interfaces (USB, Ethernet, LVDS, MIPI). Deep knowledge of embedded communication protocols (CAN, LIN, SPI, UART, I2C). Strong debugging and problem-solving skills in hardware validation and field testing. Nice to Have Hands-on experience in vehicle electronics development for 2W, 4W, or electric vehicles. Familiarity with DFT/DFA (Design for Testing/Assembly) methodologies. Experience with manufacturing and compliance testing for embedded hardware. Background in developing connected vehicle ecosystems with OTA capabilities. Passionate about emerging technologies in mobility, EVs, and embedded systems. Be part of India s electric mobility revolution where engineering meets adrenaline. Work on world-class technologies that are pushing global boundaries. Join a culture that encourages innovation, learning, and ownership. Collaborate with passionate teams building next-gen mobility experiences. Qualification : B.E. / M.E. / B.Tech / M.Tech in Electronics, Electrical, Mechatronics, or related disciplines

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Job Title: Lead Satellite Design & Development Location: Bengaluru Experience Required: 10 to 15 years Minimum Qualification: Bachelor s or Master s degree in Engineering (BE/BTech/ME/MTech) or Science (MSc) Specialization in Aerospace, Mechanical, Electronics, or Systems Engineering preferred Key Skills Satellite Systems Engineering System Architecture & Integration Flight Mechanics & Control Systems NX and Concept Design Tools Project & Resource Management Systems Engineering Lifecycle (V&V, Risk, Interfaces) Strategic & Technical Leadership Stakeholder Management Job Summary We are seeking a seasoned and visionary Lead Satellite Design & Development to lead end-to-end execution of satellite programs. The role requires deep technical expertise, hands-on project management skills, and a proven ability to lead multidisciplinary engineering teams. The ideal candidate will be instrumental in shaping system architecture, ensuring technical excellence, and aligning with organizational goals in the dynamic field of space systems. Key Responsibilities Team Leadership Lead and mentor a multi-functional engineering team across systems, mechanical, electronics, aerospace, software, and reliability disciplines. Foster a collaborative, innovation-driven work culture aligned with project objectives and company strategy. Project Management Manage full project lifecycle: from concept development through design, integration, testing, and deployment. Define project plans, budgets, schedules, and resource allocations using Agile, Waterfall, or hybrid methodologies. Conduct regular project reviews to monitor performance, identify risks, and implement mitigation strategies. Systems Engineering & Integration Drive system architecture and engineering processes: requirements definition, interface control, verification & validation, and risk management. Balance trade-offs between performance, cost, risk, and reliability throughout the development lifecycle. Ensure all engineering documentation is maintained in line with industry standards and internal processes. Quality Assurance & Risk Management Champion adherence to quality benchmarks and reliability targets. Develop and enforce comprehensive risk mitigation plans across design, development, and integration phases. Stakeholder Engagement Interface with internal teams (R&D, QA, Production, Finance, Executive Leadership) for cross-functional alignment. Engage external partners clients, suppliers, regulators to ensure compliance, clarity, and project alignment. Represent the organization in technical forums, industry panels, and client briefings. Innovation & Continuous Improvement Drive adoption of emerging technologies and design innovations to strengthen competitive edge. Lead process optimization initiatives to improve development efficiency, product quality, and team performance. Preferred Qualifications & Experience Proven leadership in full-cycle satellite or satellite bus development from mission planning and architecture to launch and mission control. In-depth knowledge of satellite sub-systems and technology providers. Familiarity with international standards and best practices in satellite design and development. Strong strategic acumen in planning, budgeting, and resource management for complex aerospace projects. Qualification : Bachelors or Masters degree in Engineering (BE/BTech/ME/MTech) or Science (MSc)

Job Title: Software Design & LabVIEW Engineer Location: Bengaluru Overview: Join CynLr s Product Design and Algorithm Team as a Software Design & LabVIEW Engineer, where you will be instrumental in developing LabVIEW code for advanced algorithms and experiments, optimizing performance, and supporting the software development lifecycle with strong architectural discipline. You will also provide critical interface and support for hardware-in-the-loop validation and customer implementation. Key Responsibilities: LabVIEW Development & Experimentation Translate concepts and algorithms from Design and Algorithm teams into well-structured LabVIEW code and experiments. Optimize LabVIEW code for timing and memory performance. Build custom data visualizations and user-friendly UI elements to accelerate experimental workflows. Enhance Lab experiment applications for usability and efficiency. Code Refactoring & Architecture Understand and apply established LabVIEW design patterns and coding standards (including STQ). Refactor legacy spaghetti code to comply with architecture and design guidelines. Document and maintain code quality and design consistency. Software Development Lifecycle Integration Implement and maintain source and version control using GIT or equivalent tools. Integrate evolving C++ DLL libraries seamlessly into LabVIEW codebases without disruption. Verification & Validation (V&V) Develop test cases and execute validation tests for C++ and LabVIEW code. Perform hardware-in-the-loop testing to validate algorithm functionality and performance. Customer Interface & Support Assist in application implementation and provide technical support to customers. Serve as a LabVIEW knowledge resource for the Algorithm and Design engineers and onboard new team members. Job Requirements: Programming Fundamentals Strong understanding of Data Flow programming paradigm and parallel programming in LabVIEW. Experience with dynamic thread management and service spawning. Software Design & Development Proven involvement in the full software development lifecycle, including distributed development with source/version control (GIT). Expertise in State Machine architecture and familiarity with other design patterns applied in LabVIEW. UI/UX Skills Proficient in building custom controls, data visualizations, and UI elements (experience with XControls is a plus). Strong knowledge of subpanels, resolution reflow, and splitter management for UI design. LabVIEW IDE Expertise Deep knowledge of VI Server (methods and attributes) and VI scripting (preferred). Mastery of LabVIEW project and environment settings, including front panel customization, function palettes, debugging, VI properties, and productivity features. Connectivity & Hardware Interface Experience integrating .dll libraries and C++ header files into LabVIEW applications. Familiarity with registry coding is advantageous. Hands-on experience with communication protocols including Ethernet (UDP, TCP), RS232/485, and industrial protocols like Modbus, CAN, etc.