Optical Simulations Jobs in Bengaluru

Staff Engineer, Solutions Automation (NMS/SMx) Location: Bangalore Type: Full-Time Experience Required: 12+ Years (QA Lead/Architect Level) The Opportunity: Strategic Quality Architect We are seeking a Staff Engineer to act as the technical architect for Solution Test Automation of our Network Management System (SMx). This senior individual contributor role requires a rare blend of deep L2/L3 networking expertise and proficiency in modern AI-driven automation. You will drive the vision for product quality, mentor a growing team, and solve the complex challenges of testing fiber-optic and telecom infrastructures. Technical Expertise & Domain Depth Networking & Fiber Optics: L2/L3 Protocols: Strong mastery of OSPF, BGP, ISIS, VLAN, and VRF. Network Protocols: Expert knowledge of Ethernet, TCP/IP, and SNMP. Optical Technology: Familiarity with GPON and XGSPON technologies and telecom network devices. Automation Stack: Framework Architecture: Advanced proficiency in Robot Framework, PYART, and Playwright. Programming: Expert Python skills for developing maintainable scripts and custom libraries. Modern Tooling: Experience implementing AI-based GUI testing and visual validation tools. CI/CD & DevOps: Integration of automated suites into Jenkins/GitLab CI using Docker/Kubernetes. Key Responsibilities Engineering Leadership & Mentorship: Team Guidance: Mentor junior automation engineers, conduct rigorous code reviews, and foster a high-performance culture. Project Ownership: Drive the end-to-end automation lifecycle from test strategy and environment planning to advanced results analytics. Cross-functional Alignment: Partner with Product Management and Dev teams to triage issues and align quality goals with release schedules. Innovation & Domain Application: Scenario Design: Leverage domain expertise to simulate realistic network topologies and complex customer use cases. Process Optimization: Champion the transition from manual efforts to high-efficiency automation by refining methodologies and frameworks. Troubleshooting: Resolve complex issues related to Optical Communication and Network Management Systems. What You Bring Proven Track Record: 12+ years in QA/Automation with significant experience in NMS/EMS or complex enterprise applications. Educational Background: Bachelor s or Master s in Computer Science, Telecommunications, or a related field. Certifications (Preferred): CCNA, CCNP, or ISTQB Advanced Test Manager. Soft Skills: Exceptional ability to simplify complex technical networking concepts for diverse stakeholders. Qualification : Bachelors or Masters in Computer Science, Telecommunications, or a related field

Red Team Hacker / Pen Tester (Onsite, Bangalore) Who We Are ColorTokens We re on a mission to keep businesses running safe and sound even when cyber attackers try to mess things up. Our next-gen platform, ColorTokens Xshield , stops ransomware and malware from spreading sideways inside companies, so critical stuff stays locked down and working. We ve got mad skills in spotting and controlling traffic between all kinds of devices and users from your typical laptops to IoT and medical gadgets. That means we can slice and dice security zones to keep bad actors contained. Forrester calls us a Leader in Microsegmentation (Q3 2024), and we help global companies avoid big $$$ downtime. Our Vibe We re all about hustling with heart. You ll get to own your projects, work with smart teammates, and solve tough problems that actually protect people from kids in hospitals to entire cities. If you re driven, curious, and ready to make a real impact, you ll fit right in. The Gig What You ll Do Run epic red team ops that mimic real-world hackers trying to break in. Hack (ethically!) into networks, apps (web, mobile, APIs), and cloud setups to find weaknesses. Build your own scripts and tools to level up your tests and dodge detection. Team up with defenders (blue team) to boost how we spot and stop attacks. Write clear, no-fluff reports with proof-of-concept hacks and smart fixes. Keep your finger on the pulse of the latest threats and hacker tricks. Jump into purple teaming and adversary simulations to sharpen our edge. Bachelor s in Cybersecurity, CS, or you ve got real-world chops that match. 6+ years deep in red teaming, pentesting across web, APIs, infrastructure, and cloud. Pro with tools like Cobalt Strike, Metasploit, Nessus, Burp Suite, Nmap, and scripting (Python/PowerShell/Bash). Solid grasp of MITRE ATT&CK, threat modeling, and adversary emulation. Know Windows & Linux inside out, Active Directory, plus cloud platforms (AWS, Azure, GCP). Bonus points if you re into social engineering, phishing, or physical security. Skilled at writing docs that actually make sense. Must-have certifications: OSCP is a must; CRTP, OSCE, OSEP, CRTE, GPEN, GXPN are pluses. Qualification : Bachelor's degree in Cybersecurity, Computer Science, or related field (or equivalent experience).

Instructional Designer Location: Bengaluru (Rathi Legacy, Rohan Tech Park, Hoodi) Team: Global Strategic Services Industry Innovation and Solutions Employment: Full-Time | Hybrid About Cognite Cognite is a global SaaS leader in AI-driven industrial digital transformation, working with major sectors like Oil & Gas, Pharma, Chemicals, and Manufacturing. We create innovative platforms like Cognite Data Fusion and Cognite Atlas AI to empower smarter operations. Role Overview Join the Cognite Academy team, which provides training and educational content for customers and partners. You will design and develop engaging courses, learning paths, and training materials primarily for technical users (data engineers, software developers, data scientists) and Cognite application users. Your work will enhance onboarding, self-service learning, and certification programs. Key Responsibilities Redesign and develop entire courses, micro-learning modules, and curricula using various instructional design models (e.g., ADDIE). Collaborate with subject matter experts to analyze training needs and target audiences. Create engaging multimedia content: videos, simulations, role-plays, and interactive assessments using tools like Active Presenter, Genially, Vyond. Implement courses and manage content in LMS platforms (Skilljar preferred). Design formative assessments and certification exams. Support the learning community and contribute to customer and partner engagement. Use HTML and basic coding to build learning paths and interactive content. Your Profile 2 to 5 years instructional design experience in the SaaS industry. Strong knowledge of learning theories and instructional design methods (ADDIE a plus). Proficient with authoring tools such as Active Presenter, Genially, Vyond, and at least one LMS (Skilljar a plus). Basic HTML and visual design/storyboarding skills (Adobe Creative Suite, Miro, etc.). Experience with video editing and social media content management. Basic project management and agile work methodology skills. Excellent written and verbal communication skills, able to connect with both technical and non-technical audiences. Eager to learn new technologies and improve programming skills (Python, HTML, Adobe Premiere Pro). Passionate about making a real impact on user learning and adoption. Work with a diverse global team of 70+ nationalities focused on inclusion and innovation. Modern, engaging Bengaluru office with a hybrid work model. Flat organizational structure with direct access to leaders. Opportunity to collaborate on cutting-edge projects in a fast-growing tech company. Strong community and partner ecosystem to learn from and contribute to. Excited to shape the future of learning in industrial AI? Apply to join Cognite s Academy team today!

Lead Cloud Engineer HPC (High Performance Computing) Location: Bengaluru, India Company: Chevron Experience Level: 5 10 Years Department: IT Cloud Engineering Work Mode: Hybrid (Global Operations Support) About the Role Chevron is seeking a Lead Cloud Engineer HPC to deliver next-generation High Performance Computing (HPC) infrastructure and application solutions. This position plays a key role in supporting compute-intensive workloads such as geophysics, reservoir simulations, AI/ML models, and parallel file systems, with a focus on cloud-native solutions and low-latency architectures. This role is ideal for someone experienced in cloud engineering, Linux system administration, and HPC architecture. Key Responsibilities Design, deploy, and support HPC environments for compute-intensive workloads. Configure and manage HPC job scheduling systems (e.g., Slurm, PBS). Implement and maintain parallel file systems such as Lustre. Manage Azure-based cloud infrastructure using VM Scale Sets. Collaborate with data scientists and developers to optimize infrastructure. Leverage Ansible, Satellite, and Python for automation. Optimize low-latency networks for distributed computing. Modernize HPC architecture with an eye on cost control and performance. Required Qualifications Bachelor s degree in Computer Science, Information Systems, or related field. 5 10 years of experience in: Linux system administration in a large-scale environment Microsoft Azure, including VM Scale Sets HPC job schedulers Slurm, PBS Parallel file systems Lustre Automation tools Ansible, Satellite, Python Supporting compute-heavy scientific/engineering applications Understanding of storage systems, networking, and performance tuning in HPC. Willingness to support global operations and participate in after-hours support. Preferred Skills Experience deploying HPC workloads in hybrid cloud environments. Familiarity with reservoir simulation or geophysical applications. Knowledge of security compliance and cost optimization in HPC/cloud. Working Hours Chevron supports global operations. Work hours may be aligned across international teams: Standard Work Days: Monday to Friday Shift Options: 8:00 AM 5:00 PM or 1:30 PM 10:30 PM IST Benefits & Perks Competitive compensation package Health, life, and accident insurance Flexible work schedule and hybrid options Professional development and certification support Work on cutting-edge HPC and AI infrastructure Equal Opportunity Employer Chevron is committed to a diverse and inclusive workforce. All qualified applicants will receive consideration without regard to race, gender, religion, sexual orientation, nationality, age, or disability. Chevron participates in E-Verify in applicable regions. Apply Now If you re passionate about building scalable HPC infrastructure in the cloud, apply now to join Chevron s Cloud Engineering team in Bengaluru. Qualification : Bachelors degree in Computer Science, Information Systems, or related field.

Job Title: Computer Vision Location: Bengaluru, India Type: Full-time Roles and Responsibilities: Constantly research, prototype and build solutions to computer vision problems. Actively find new solutions that we can provide to industry-specific problems. Build prototypes to display new analysis and insight. Build new tools to streamline the overall process flow as requirements develop. Add new features to existing tools. Requirements: Strong command over all computer vision related use-cases, algorithms and approaches. Familiarity with Deep Learning frameworks such as TensorFlow (and keras), PyTorch, and strong experience in at least one of those. [Using Python programming language is a must.]. Familiar with different machine learning algorithms and when to use them. Strong math fundamentals in areas including but not limited to linear algebra and computational geometry. Ability to write clean, concise and well documented code. Familiar with version control, writing tests and writing documentation. Open to learning new technologies and languages. Comfortable working in a low monitoring/guidance environment. Strong sense of initiative, ownership, urgency and drive. Experience in training and applying CNNs on various datasets. Excellent organisational and leadership skills. Basically we re looking for people who are passionate about solving problems, and doing things the best way. If this is like you, we look forward to hearing from you. Years of Experience: 2- 8 years

Position: Application Engineer, Analog & Power Job Overview: We are seeking an Application Engineer specializing in Analog & Power to join our team. In this role, you will provide advanced engineering design services and support to the regional engineering team, with a focus on power electronics and analog engineering solutions. You will be responsible for hardware engineering support, including PCB design and review, electronic simulations, and laboratory analysis, all while ensuring compliance with industry standards and customer specifications. Key Responsibilities: Provide advanced engineering design and support for power electronics and analog systems, assisting the regional engineering team. Conduct hardware engineering tasks, including PCB reviews, electronic simulations, and using lab equipment such as PCBA rework tools and oscilloscopes for product development. Lead PCB design from initial concept (block diagrams) to part selection, schematics, layout, Gerber files, and prototype testing. Develop clear and concise technical documentation, such as whitepapers, technical reports, and internal training materials. Support the development and validation of reference designs to meet customer specifications. Ensure that all designs comply with relevant industry standards and customer specifications. Attend technical and sales training to stay up to date with current technologies and trends. Maintain accurate documentation of engineering designs and solutions for future reference. What We Are Looking For: Bachelor s Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field. At least 7 years of experience in electronics/semiconductors, power management, and analog product design. Strong technical expertise in power conversion topologies (DC-DC, AC-DC, DC-AC). Experience working with WBG (Wide Bandgap) devices such as SiC and GaN. Solid experience with electrical instrumentation, including Op-Amps, signal conditioning, sensors, and data acquisition systems. Familiarity with industry standards and compliance (e.g., IEC, UL, ISO) for high-power systems. In-depth understanding of EMI/EMC standards and mitigation techniques for high-power designs. Experience in reference design development, validation, and component optimization. Strong communication and interpersonal skills to collaborate effectively with internal teams and customers. A passion for innovation and a commitment to delivering high-quality engineering solutions. What s In It For You: Access to training and professional development opportunities. Performance coaching and growth support. The chance to work with a fun and supportive team. Opportunity to be part of a growing and strong company. Community involvement opportunities. About Arrow: Arrow Electronics, Inc. (NYSE: ARW), a Fortune 133 company and one of Fortune Magazine s Most Admired Companies, is a global leader in technology solutions. With 2023 sales of USD $33.11 billion, Arrow develops innovative technology solutions that improve business and daily life. Our broad portfolio helps customers create, make, and manage forward-thinking products that make technology accessible to more people. Location: Bangalore, India Employment Type: Full-time Job Category: Engineering and Technology Qualification : Bachelors Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field.

Join Us in Revolutionizing the Data Storage Industry We re at the forefront of a transformative tech movement, fundamentally reshaping the data storage industry. At Pure Storage, you ll have the chance to lead with innovative thinking, grow alongside us, and collaborate with the smartest team in the industry. If you re ready to make a lasting impact and seize boundless opportunities, come join us! SHOULD YOU ACCEPT THIS CHALLENGE... As an Instructional Designer, you will create high-impact learning experiences that empower our partners. This role is critical in designing, developing, and delivering training programs that provide our partners with the knowledge and skills necessary to succeed with our products, solutions, and go-to-market strategies. Working as part of the GTM & Partner Experience team, you will design scalable, engaging learning solutions that drive partner adoption, sales effectiveness, and technical expertise. You'll collaborate cross-functionally with Subject Matter Experts (SMEs), partner managers, sales, and technical teams to ensure the training aligns with business goals and partner needs. In This Role, You Will: Develop structured learning courses and paths tailored to various partner personas (e.g., sales, technical sales, marketing, operations, executives), ensuring they have the right knowledge to drive business success. Design and develop effective and engaging learning modules using Articulate 360, incorporating videos, simulations, and instructional best practices. Convert complex content into clear, concise, and engaging training materials, such as e-learning modules, instructor-led training, job aids, videos, infographics, simulations, and assessments. Collaborate with SMEs to gather and refine content that aligns with learning objectives. Apply instructional design models (e.g., ADDIE, SAM), gamification, and interactive learning strategies to create impactful experiences. Utilize our Intellum LMS (Learning Management System) to publish, track, and manage learning content. Develop assessments to measure learning outcomes and knowledge retention. Continuously evaluate training effectiveness using metrics, data, and partner feedback to assess engagement, course completion rates, and learning impact, iterating on content as needed. Stay updated on trends in instructional design, e-learning technologies, and gamification to enhance training programs. What You ll Need to Bring to This Role: Basic Qualifications: Bachelor s or Master s degree in Instructional Design, Learning & Development, Education, or a related field. 12+ years of experience in instructional design, curriculum development, or e-learning development. Proficiency in e-learning authoring tools (Articulate Storyline, Rise, Captivate, Camtasia, Vyond, etc.) is a plus. Familiarity with Intellum LMS or similar learning platforms, and SCORM-compliant content. Experience designing training programs for partners, channel sales, or reseller networks. Strong writing, communication, and project management skills. Ability to translate complex technical and sales topics into engaging, digestible learning experiences for partners. Solid understanding of adult learning principles, instructional methodologies, and training needs analysis. Excellent project management skills, attention to detail, and the ability to meet deadlines. What You Can Expect from Us: Pure Innovation: We celebrate those who think critically, embrace challenges, and aspire to be trailblazers. Pure Growth: We provide the space and support for you to grow alongside us and contribute meaningfully. Pure Storage has been recognized as one of Fortune's Best Large Workplaces in the Bay Area, Fortune s Best Workplaces for Millennials, and certified as a Great Place to Work. Pure Team: We build each other up, setting aside egos for the greater good. Additionally, we understand the importance of a healthy work-life balance and offer various perks, including flexible time off, wellness resources, and company-sponsored team events. For more details, check out purebenefits.com. Qualification : Bachelors or Masters degree in Instructional Design, Learning & Development, Education, or related field.

Software Engineer Power/Thermal Software Products Team Company Qualcomm India Private Limited Job Area Engineering Group > Software Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world-class products that meet and exceed customer needs. You will collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master s degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Languages such as C, C++, Java, Python, etc. Job Description Job Overview: The Power/Thermal Software Products Team at Qualcomm focuses on delivering industry-leading power, thermal, and limit software management solutions across Qualcomm s Mobile, Automotive, Compute, IoT, and AR/VR chipsets. In this role, you will work with cross-functional teams to: Identify power optimization and performance tuning opportunities. Perform thermal/limits hardware tuning, characterization, and risk assessment. Develop optimized solutions and mitigation strategies. Conduct system-level analysis of power/thermal use cases. Collaborate with Architecture, Hardware Design, Performance, Power/Thermal Systems, and various Software teams to create optimal system-level power/thermal software solutions. Develop tools and methodologies for competitive analysis to understand competitors strengths and weaknesses. Design and implement thermal mitigation schemes that are best in the industry. Preferred Qualifications 3+ years of experience with Programming Languages such as C, C++, Java, Python, etc. Strong systems/hardware background with a solid understanding of microprocessor architecture and common SoC hardware blocks (interconnects, display, graphics, etc.). Good understanding of operating system concepts including scheduling, memory management, process management, interrupt handling, and device drivers. Experience using debug tools such as JTAG debuggers, oscilloscopes, and logic analyzers. Experience developing power/thermal management software. In-depth knowledge of embedded systems, microcontrollers, SoC power, modems, multimedia, wireless communications, and system-level debugging/analysis for SoC power optimization. Equal Opportunity Employer Statement Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email [email protected] or call Qualcomm s toll-free number found on their website. Upon request, reasonable accommodations will be provided to support individuals with disabilities during the hiring process. Qualcomm is also committed to ensuring its workplace is accessible to individuals with disabilities. (Please note that this email address is exclusively for accommodation requests. Qualcomm will not respond to requests for application status updates or resume inquiries via this email.) Recruitment Policy Qualcomm s Careers Site is only for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies, as well as candidates represented by agencies, are not authorized to use this site to submit profiles, applications, or resumes. Any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies and is not responsible for any associated fees. Compliance Notice Qualcomm employees are expected to comply with all applicable policies and procedures, including but not limited to security requirements and protection of company confidential and proprietary information, in line with applicable laws. Qualification : Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

About Ansys For over 50 years, Ansys has been at the forefront of engineering simulation, empowering innovators across industries. From cutting-edge optics and photonics to sustainable energy solutions, our technology helps close the gap between design and reality. At Ansys, we cultivate a culture of excellence, collaboration, and growth. Join our Customer Excellence team and play a pivotal role in helping customers succeed with Ansys Zemax OpticStudio and other optical simulation tools. Role Overview As an Optics Technical Support Engineer, you will assist customers in integrating Ansys software into their workflows, resolving technical challenges, and improving their engineering simulations. You will apply your expertise in optics and optical system modeling to support customers worldwide, ensuring they achieve optimal results with Ansys Zemax OpticStudio. This is a customer-facing role that requires strong problem-solving, communication, and technical expertise in optical simulation. Key Responsibilities Customer Support & Technical Expertise Provide technical support for Ansys Zemax OpticStudio and other optics simulation tools. Troubleshoot complex optical modeling challenges and recommend solutions. Deliver high-quality, timely customer service to ensure customer satisfaction. Product & Process Improvement Identify and submit product improvement suggestions and file defect reports as needed. Participate in field testing of new software releases to validate features and workflows. Knowledge Sharing & Training Develop best practices documentation and technical content. Support sales and marketing efforts by conducting demonstrations, webinars, and training sessions. Cross-Team Collaboration & Strategic Initiatives Work closely with internal teams, including R&D, Sales, and Product Management. Engage in strategic projects to improve Ansys optics solutions. Required Qualifications & Skills Education & Experience: Master s degree in Physics, Optics, Optical Engineering, or a related field. 3+ years of experience in an engineering software environment (or PhD with no prior experience). Technical Expertise: Hands-on experience in optical system modeling and simulation. Proficiency in commercial optical design software (e.g., Ansys Zemax OpticStudio, Synopsys CodeV). Strong knowledge of optical theory and simulation techniques. Soft Skills: Excellent problem-solving and analytical abilities. Strong communication skills in English (written & spoken). Ability to work independently and manage tasks efficiently in a distributed team environment. Customer Engagement: Experience in technical support, consulting, or customer-facing roles. Ability to translate complex technical concepts into clear and accurate solutions. Preferred Qualifications (Nice to Have) Programming & Automation: Familiarity with Python and/or MATLAB for optical simulations. Ansys Software Experience: At least 2 years of hands-on experience using Ansys Zemax OpticStudio. Customer-Facing Experience: Prior experience in customer support, technical consulting, or training. Travel Flexibility: Willingness to travel up to 10% of the time. Innovate & Impact Work on cutting-edge optics simulation technology. Career Growth Enhance your expertise in optical engineering & simulation. Collaborate & Lead Engage with industry experts & global customers. Inclusive Culture Be part of a company that values diversity & innovation. At Ansys, we are committed to helping customers succeed while pushing the boundaries of simulation technology! Apply Now & Be a Part of Ansys' Optical Simulation Excellence!

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

Technical Requirements: 1. Digital Logic Design & RTL Coding: Strong experience in digital logic design and RTL (Register Transfer Level) coding. Proficiency in Verilog, VHDL, or System Verilog for implementing complex designs. Deep understanding of logic synthesis, timing constraints, and logic optimization. 2. Peripheral Design (High/Low-Speed): Experience in designing high-speed and low-speed peripherals, ensuring compatibility and optimal performance. Knowledge of integrating peripherals within larger system architectures, ensuring robust data flow. 3. Synthesis, Timing Constraints, and CDC: Familiarity with synthesis tools and ensuring the correctness of timing constraints. Experience with Clock Domain Crossing (CDC) and methods to avoid timing hazards in designs. Ability to optimize logic for timing closure and power efficiency during synthesis. 4. Unit Level Verification Setup & Assertions: Hands-on experience in setting up unit-level verification for RTL modules. Proficient in writing assertions to ensure the correctness of designs during simulation and functional verification. 5. Low Power Design Techniques: Exposure to low power design techniques, including managing multiple power/clock domains in complex SoC designs. Ability to design power-efficient modules for consumer electronics or embedded systems. 6. ARM SoC/AMBA IP-based Designs: Exposure to ARM SoC architectures and integration of AMBA (AXI, AHB, APB) protocols into designs. Experience with SoC-level integration, managing both hardware and software interactions in complex systems. 7. Protocol Knowledge (Additional Advantage): Working knowledge of industry-standard protocols, including PCIe, DDRx, Ethernet, USB, I2C, SPI. Ability to implement these protocols in hardware designs for various interfaces. Expectations from the Role: 1. Communication & Interpersonal Skills: Excellent communication skills for interacting with cross-functional teams, stakeholders, and clients. Ability to convey complex technical details clearly, both in writing and verbally. 2. Independent and Teamwork Capabilities: Strong ability to work both independently and as part of a team. Willingness to take initiative and demonstrate leadership in solving technical challenges. 3. Fast Learner & Adaptability: Ability to quickly absorb and apply new technologies, tools, and methodologies. Eagerness to stay updated with trends in digital design and SoC development. 4. Ownership & Accountability: Demonstrated ownership of tasks and the ability to meet deadlines. Ensure that all aspects of the design process are completed with attention to detail and high-quality standards. 5. Punctuality and Responsibility: Strong track record of punctuality, meeting project deadlines, and delivering quality work. Ability to manage multiple design tasks and optimize workflows to maintain timelines. Ideal Candidate Profile: The ideal candidate should have solid experience in digital logic design, particularly with Verilog, VHDL, or System Verilog. They should have a strong foundation in designing both high-speed and low-speed peripherals and optimizing designs for timing and power efficiency. The role also requires familiarity with ARM SoC architectures and integration of AMBA-based IPs. The candidate should be a strong communicator with the ability to work both independently and collaboratively in a fast-paced, distributed work environment. Leadership potential and a demonstrated ownership mindset are essential to the success in this role.

Job Description: We are looking for an experienced CPU Circuit Design Engineering Manager to lead and manage Intel's cutting-edge CPU design projects. As part of a world-class team, you will oversee a group of engineers working on complex circuit designs, driving the development of Intel s most advanced CPUs. You will play a pivotal role in shaping the architecture and ensuring the high performance, power efficiency, and reliability of next-generation processors. Key Responsibilities: 1. Team Leadership and Development: Lead, mentor, and develop a team of talented circuit design engineers. Oversee all aspects of CPU circuit design, from initial conceptualization to post-silicon validation. Foster an environment of innovation, excellence, and collaboration. 2. Design Execution and Methodology: Manage the design, implementation, and validation of high-performance CPU circuits, including critical components like logic circuits, clock distribution, and power management. Drive the adoption of best practices and state-of-the-art design methodologies to ensure efficient design execution. Ensure that the designs meet Intel s performance, power, and area (PPA) targets. 3. Cross-functional Collaboration: Collaborate closely with cross-functional teams including architecture, layout, validation, and manufacturing to ensure a seamless transition from design to silicon. Communicate effectively with senior management and other stakeholders to drive the successful delivery of CPU designs. 4. Process and Efficiency Improvement: Continuously work on improving design processes, tools, and methodologies to optimize efficiency and reduce time-to-market. Implement strategies to mitigate design risks, enhance quality, and maintain high standards across all CPU designs. 5. Performance, Power, and Area Optimization: Ensure the CPU circuits are designed to meet optimal power, performance, and area (PPA) goals. Collaborate with other teams to ensure that design specifications align with broader product requirements. 6. Innovation and Strategy: Stay abreast of industry trends, new technologies, and cutting-edge circuit design techniques. Lead efforts to incorporate new circuit design innovations into Intel s CPU development pipeline. Qualifications: Minimum Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in CPU circuit design, with at least 5 years in a leadership role. Proven track record of successfully leading complex CPU circuit design projects from concept to implementation. Strong understanding of circuit design principles, including logic design, timing, power, and signal integrity. Preferred Qualifications: Experience with advanced semiconductor process technologies (e.g., 7nm, 5nm, or lower nodes). Expertise in tools for circuit design, simulation, and analysis (e.g., Cadence, Synopsys). Knowledge of high-performance CPU architecture and chip design. Strong problem-solving skills and the ability to work under pressure in a fast-paced environment. Excellent communication and interpersonal skills, with experience working in a cross-functional and global environment. Inside this Business Group: The Core and Client Development Group (C2DG) is at the heart of Intel s product development, creating the next generation of CPU architectures and technologies. The group is responsible for driving Intel's leadership in the computing industry, delivering high-performance processors that power both client and server markets. Equal Opportunity Employer: Intel is an equal opportunity employer and considers all qualified applicants for employment without regard to race, color, religion, sex, national origin, age, disability, veteran status, or any other characteristic protected by local law. Qualification : You must possess a Masters Degree in Electrical or Computer Engineering with atleast 10 or more years of experience in related field or a Bachelors Degree with atleast 12 years of experience.

Job Description The Client DDRPHY team is looking for an energetic and passionate Logic Methodology Engineer who conceptualizes, documents, and designs tools, flows, and methods (TFM) for use in the logic/RTL design of IPs, SoCs, and the interaction/handoff/reuse between IPs and SoCs. Defines methodologies that produce enhancements in power, performance, and area for designs on the new architectures and process technology nodes and aids high-speed digital design targeted towards low power optimized IP implementations. Analyzes retrospective data on current generation quality and efficiency gaps to identify proper incremental, evolutionary, or transformative changes to the existing logic/RTL related TFM. Works closely with the logic design teams to create and enhance logic design methodologies that enable fast design convergence and facilitate seamless integration. You will be responsible for setting up Automation flows for IP Logic Design, ensuring RTL quality via Front End tools like Lint, CDC, VCLP, Synthesis QA checks etc, creating FE packages for IP milestones that meet SoC Collateral requirements, create innovative automated solutions to help Logic Design in areas like Coverage closure, timing convergence etc. You will also have an opportunity to work on ensuring the RTL quality of IP is high and will contribute to automating various Front End Tool, Flows and Methods. You will be able to utilize your scripting skills to innovate the IP RTL delivery to Validation teams, Backend Teams as well as SoC teams. The ideal candidate should exhibit behavioral traits that indicate: Excellent written and verbal communication skills are critical on a small, fast-moving team. As part of a growing, dynamic new business, the candidate must be successful working with many cross functional teams and manage multiple tasks and changing requirements, in an innovative environment.Objectives of the position Own and deliver TFM flows which aid in the logic design of Mixed Signal IP Continuously drive the Turnaround time, robustness of Logic design via Architecture engagement and Tools/Methodology improvements Drive area/power of IPs and come up with improvements on IP Area/Power metrics Critical Decision making on Technical issues. Qualifications The successful candidate will possess a BS, MS degree with a 5-10 years of relevant industry experience. Additional qualifications ideally include: Strong scripting skills, experience in working with Front End design tools, Synthesis, Low power design, understanding analog design concerns and driving to an optimal solution between analog and digital designs, familiarity with pre-silicon and post-silicon validation. Experience in the following areas/ skills are desired: Strong communicator Self-starter with a penchant for creative problem solving through quick thinking Good aptitude for automation Git/Perforce/CVS know how Perl/Python/TCL Spyglass Lint, CDC, DFT, VCLP, Open Latch Multiple clock domain design Synthesis and speed path debug Below experience is desirable, but not a must: Logic design using System Verilog Low-power design using UPF and clock gating State machine design Simulation and debug experience using VCS/Verdi Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : The successful candidate will possess a BS, MS degree with a 5-10 years of relevant industry experience.

Job Description The Client DDRPHY team is looking for an energetic and passionate Logic Design Engineer who will work on high-speed digital design targeted towards low power optimized IP implementations. You will be responsible for overseeing definition, design, verification and your responsibilities will include but are not limited to - defining architecture and microarchitecture features of the block being designed, implementing RTL in System Verilog, setting up Automation flows for IP Logic Design, ensuring RTL quality via Front End tools like Lint, CDC, VCLP, Synthesis QA checks etc, creating FE packages for IP milestones that meet SoC Collateral requirements, create innovative automated solutions to help Logic Design in areas like Coverage closure, timing convergence etc. You will also have an opportunity to work on ensuring the RTL quality of IP is high and will contribute to automating various Front End Tool, Flows and Methods. You will be able to utilize your scripting skills to innovate the IP RTL delivery to Validation teams, Backend Teams as well as SoC teams. The ideal candidate should exhibit behavioral traits that indicate: Excellent written and verbal communication skills are critical on a small, fast-moving team. As part of a growing, dynamic new business, the candidate must be successful working with many cross functional teams and manage multiple tasks and changing requirements, in an innovative environment. Objectives of the position Own and deliver the logic design of Mixed Signal IPs. Continuously drive the Turnaround time, robustness of Logic design via Architecture engagement and Tools/Methodology improvements. Drive area/power of IPs and come up with improvements on IP Area/Power metrics. Critical Decision making on Technical issues. Qualifications The successful candidate will possess a BS, MS degree with a 10-15 years of relevant industry experience. Additional qualifications ideally include: Strong scripting skills, experience in working with Front End design tools, Synthesis, Low power design, understanding analog design concerns and driving to an optimal solution between analog and digital designs, familiarity with pre-silicon and post-silicon validation. Experience in the following areas/ skills are desired: DDR Design domain knowledge Strong communicator Git/Perforce/CVS know how Perl/Python/TCL Spyglass Lint, CDC, DFT, VCLP, Logic design using System Verilog Low-power design using UPF and clock gating Multiple clock domain design State machine design Simulation and debug experience using VCS/Verdi Synthesis and speed path debug Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : The successful candidate will possess a BS, MS degree with a 10-15 years of relevant industry experience.

Meta is seeking an ASIC Engineer, Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/Machine Learning (ML) experts in the company, help architect state-of-the art machine learning accelerators, and contribute to modeling these accelerators. Come work and learn alongside our expert engineers to build Green data center accelerators. ASIC Engineer, Architecture Responsibilities Work on advanced architecture, algorithms and models targeting Machine Learning solutions. Analyze and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture. Implement and analyze algorithms and enhanced architecture for the data center Machine Learning accelerators. Implement various models needed for the validation of the accelerators. Create Machine Learning kernels to analyze the ASIC Architecture, and make the architecture optimal for ML workloads. Minimum Qualifications Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related field More than 2 years of industry experience and knowledge of Computer Architecture concepts such as processor architecture, memory systems and on-chip interconnection networks. Programming skills in C, C++ or related Object Oriented Programming Preferred Qualifications Master s or PhD degree in Electrical Engineering, Computer Engineering or related areas. Experience in modeling, and driving power and performance trade-offs in ASIC Architecture. Experience and knowledge in Machine Learning Silicon architectures. Qualification : Masters or PhD degree in Electrical Engineering, Computer Engineering or related areas.

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Electrical Principal Engineer FPGA Team Location: Bengaluru, India Team: Electrical Engineering Company: Dell Technologies Role Overview As a Principal Electrical Engineer, you will contribute to the architecture, design, and validation of FPGA-based hardware systems for Dell s next-generation enterprise servers. This role involves working across global teams to deliver robust, scalable, and efficient PCBA (Printed Circuit Board Assembly) and logic solutions that align with industry standards and internal requirements. Key Responsibilities Architect and design next-gen hardware features in collaboration with front-end teams and partners. Analyze and recommend trade-offs in design features and costs. Guide global teams with best practices in electronic hardware design. Own and deliver system interfaces and support cross-functional development efforts. Create comprehensive documentation for testing and validation. Essential Requirements 8 12 years of experience in FPGA hardware verification using Verilog, SystemVerilog, VHDL. Expertise in UVM, ABV (Assertion-Based Verification), code coverage, and unit-level simulation. Knowledge in digital design methodologies: CDC (Clock Domain Crossing) RDC (Reset Domain Crossing) Static timing analysis Experience with x86 or ARM architectures. Familiarity with peripheral protocols: I2C, I3C, SMBus, IPMI, IPMB. Strong background in both analog and digital design. Understanding of hardware/software co-design and debugging complex systems. Desirable Qualifications Experience with Intel/AMD x86 and ARM-based systems. Hands-on with FPGA tools: Xilinx, Lattice, Altera Quartus, ModelSim/QuestaSim. Passion for mentoring and knowledge sharing. Dell Technologies offers a collaborative and innovative environment where hardware engineers work at the forefront of industry advancements. You'll be empowered to lead cutting-edge hardware projects, influence product design, and make a lasting impact on the future of enterprise technology.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.