Pcie Architecture Jobs in Bengaluru

Infrastructure Security Leader Location: Bengaluru About Us: Observe.AI Observe.AI is the leading AI-powered platform for customer experience, enabling enterprises to automate customer interactions using AI agents. Our platform ensures natural conversations, delivering predictable outcomes, and is trusted by top companies like DoorDash, Affordable Care, Signify Health, and Verida. Observe.AI blends advanced speech understanding, workflow automation, and enterprise-grade governance to deliver end-to-end AI solutions that optimize both human and AI interactions, providing insights for coaching and quality management. At Observe.AI, we re on a mission to transform customer experiences through AI. As a founding member of our Infrastructure/Cloud Security team, you will have the opportunity to shape and design cloud security from the ground up for a platform trusted by over 80 million users. Reporting directly to the VP of Information Security, you will drive a defense-in-depth approach across infrastructure, IAM, and networks. This is a unique, zero-to-one role where you ll define security strategy, mentor the team, and make a long-lasting impact in a fast-growing AI company. What You ll Be Doing: Security Strategy Development: Design and document security policies, reference architectures, design patterns, and roadmaps to protect our platform. Secure Access & Network Design: Lead efforts to design secure access controls and networks for production environments. Cross-Department Leadership: Collaborate with Corporate IT to implement security measures within the corporate environment. Defense-in-Depth: Implement network segmentation, firewall configurations, VPNs, and deep packet inspection to minimize impact from security incidents. AWS Infrastructure Security: Re-architect AWS infrastructure to enhance security, ensuring that networks, VPCs, and security configurations are optimized. Vulnerability Management: Identify tools and technologies to scan networks, OS, and infrastructure for vulnerabilities, and work with SRE teams to remediate identified risks. Security Compliance: Represent Infrastructure Security in PCI, SOC, ISO, HITRUST, and other regulatory audits, ensuring compliance. Collaborative Design: Partner with engineering teams and architects to ensure infrastructure designs meet both business and security requirements. Stakeholder Collaboration: Work with other teams to integrate up-to-date security features and infrastructure designs across the organization. What You ll Bring to the Role: 9+ years of experience in Software Engineering, Network Security, and AWS Security. Proven track record in designing and implementing secure Cloud Infrastructure, Network Security, and Corporate IT Security. Experience at a SaaS product company with hands-on knowledge of cloud security. Leadership experience in managing Infrastructure Security teams or Security-Focused SRE teams. Strong understanding of network designs, protocols, and certifications like CCNA (or similar). Ability to handle multiple, high-priority projects simultaneously while maintaining focus and quality. Comfort with working off-hours to handle security incidents in a dynamic, fast-paced environment. First-hand experience with major cloud providers, specifically AWS. Deep understanding of large-scale systems and N-tier architectures. Excellent communication skills, able to effectively influence and collaborate with stakeholders across the organization. Perks & Benefits: Medical Insurance: Comprehensive options, including free online doctor consultations. Leave Policies: Yearly privilege and sick leaves as per Karnataka S&E Act, along with generous national, festive, and parental leave. Learning & Development: Access to a fund that supports continuous learning and professional growth. Flexible Benefits: Tax exemptions for meals, PF, etc., along with other flexible benefit plans. Team Culture: Fun events to foster collaboration and culture across the organization.

Position: Lead Design Engineer Location: Bangalore Education: B.E./B.Tech. in Computer Science or Electronics & Communication M.E./M.Tech. in Computer Science or Electronics & Communication Experience: 5 to 9 years Job Overview We are looking for a skilled and motivated Lead Design Engineer to join our embedded systems team in Bangalore. In this role, you will take ownership of designing and developing high-performance device drivers and embedded Linux applications for ARM and/or TI DSP platforms. You will play a critical role in end-to-end development from architecture and coding to testing and debugging while also supporting customer requirements and contributing to technical discussions. This role requires strong expertise in embedded Linux development, device drivers, and excellent problem-solving abilities. Key Responsibilities Design, develop, and optimize device drivers and protocol stacks for embedded Linux on ARM and/or TI DSPs. Perform kernel-level development, debugging, and performance tuning. Analyze and resolve issues reported in existing designs; provide timely support and fixes. Work on application and middleware development for embedded systems. Participate in architecture discussions, define module-level details, and write clean, efficient code. Conduct peer reviews and follow best practices in design, coding, and testing. Develop and maintain comprehensive design documents, user manuals, and test reports. Perform performance and dependency analysis of embedded components. Engage with customers in discussions, conference calls, and technical clarifications. Collaborate with technical leads and team members to ensure timely project delivery. Required Skills & Experience Strong hands-on experience in device driver development for embedded Linux on ARM and/or TI DSPs. Successfully delivered at least two embedded projects involving driver or kernel development. Solid understanding of operating system concepts, C/C++, data structures, and multithreading. Experience with Linux framework development, preferably on TI DSPs. Proficient in debugging and performance optimization in embedded environments. Knowledge of IPC mechanisms, task/thread management, and handling deadlocks. Experience working in a collaborative environment with code reviews and version control. Preferred (Nice-to-Have) Skills Familiarity with audio-video streaming technologies and codecs such as MPEG2/H.264. Understanding of high-speed interfaces like PCIe with DMA. Basic knowledge of networking protocols, especially TCP/IP stack. Soft Skills & Attributes Strong analytical and debugging skills Effective communicator, capable of working with cross-functional teams and clients Self-driven with a proactive mindset Strong organizational and documentation skills Ability to handle multiple priorities and deliver under tight deadlines Opportunity to work on cutting-edge embedded systems and real-time applications Collaborative and technically rich work environment Competitive compensation package Continuous learning and growth opportunities Exposure to high-performance embedded development in mission-critical domains Qualification : M.E./M.Tech. in Computer Science or Electronics & Communication

Job Title: Software Engineer GPU Performance Location: Bengaluru Overview: We are looking for a highly skilled Software Engineer GPU Performance with a deep understanding of CUDA, GPU hardware architecture, and low-level performance optimization. The ideal candidate will have hands-on experience building high-performance GPU-based pipelines, optimizing time-continuous kernels, and dynamically managing processing loads between the CPU and GPU. Key Responsibilities: Utilize low-level CUDA APIs to implement and optimize GPU kernels and memory management strategies. Design and optimize pipelined image processing frameworks, ensuring seamless multi-block function execution and inter-block communication. Conduct low-level GPU performance analysis and optimizations using tools like: NVIDIA Nsight Compute NVIDIA Visual Profiler NVIDIA Graphics Developer Tools Optimize CUDA cores and kernels for maximum throughput, particularly in time-continuous processing scenarios. Implement dynamic load balancing between GPU kernels and processing functions. Design interleaved execution strategies between CPU and GPU, including real-time GPU control flow modifications from the CPU. Use NVIDIA Direct technologies for direct memory access from PCIe, USB, and display hardware, bypassing CPU intervention. Build systems to visualize GPU memory for debugging without requiring CPU transfers. Contribute to the design and optimization of foundational neural networks, including mathematical modeling of time-weighted kernels. Stay up to date with emerging GPU tools and platforms; exposure to NVIDIA Omniverse is a plus. Required Skills & Qualifications: Strong proficiency in C/C++. In-depth experience with low-level CUDA programming. Proficiency with Visual Studio toolchain and related debugging tools. Solid understanding of GPU hardware architecture and system-level performance tuning. Hands-on experience with GPU memory management, kernel interleaving, and CPU-GPU orchestration. Strong problem-solving skills and the ability to write clean, efficient, and maintainable code. Experience in neural network architecture design and low-level performance optimization is highly desirable. Exposure to Omniverse, real-time rendering, or simulation platforms is a bonus.

Technical Staff, Software Engineering CTO Storage Team Location: Bengaluru, India Team: CTO Storage Company: Dell Technologies Role Overview You will architect and lead the development of advanced storage architectures focusing on data path technologies across Dell s storage portfolio. This senior technical role involves innovation in AI-driven infrastructure, storage protocols, and system integration, collaborating closely with product teams, management, and external partners to deliver cutting-edge solutions. Key Responsibilities Present innovative storage technology ideas to executive leadership. Architect detailed product designs including functionality, performance, integration, and hardware needs. Lead prototyping, testing, and validation efforts focusing on scalability and performance. Collaborate cross-functionally to build POCs and MVPs ensuring seamless integration of technologies. Mentor and uplift junior engineers and peers, encouraging innovative thinking and solutions. Essential Requirements Experience: 15+ years with Bachelor s degree, OR 12+ years with Master s degree, OR 8+ years with PhD, OR equivalent experience Expertise in AI-driven operations, telemetry, data integration, and storage connectivity/protocols. Deep knowledge of: Filesystem data paths, object protocols, Linux kernel ecosystem. Storage & networking drivers and standards. Unstructured & structured data ecosystems and connectors. Drive technologies and hardware ecosystem (CPU, PCIe, networking, DPU, offload engines). Strong programming skills in Embedded C and Python on Linux OS. Active contributions to open-source or tech communities, plus demonstrated leadership in mentoring. Desirable Qualifications Advanced certifications or publications in Storage Software, AI, Deep Learning, or related fields. Proven track record of leading impactful, innovative projects. Ongoing engagement with open-source projects or technical communities. Join a team pushing boundaries in storage and AI infrastructure, shaping the future of data management with innovative technologies. Collaborate with industry experts and enjoy growth opportunities while making a meaningful impact.

Lead Network Engineer DDI & LB Location: Bengaluru, India Company: Chevron Experience: 10-15 Years Position Overview Chevron is seeking a Lead Network Engineer to join our ENGINE team. In this role, you'll design, implement, and maintain network solutions including DDI, load balancing, and network security for Chevron s enterprise-wide infrastructure. Key Responsibilities Design and implement enterprise-wide network infrastructure solutions (DDI, Load Balancer, DNS, DHCP). Provide tier-3 support for network troubleshooting, including load balancers like F5 and Azure. Lead network architecture and consulting efforts for DDI systems (TCPWave, BlueCat, InfoBlox). Collaborate with global teams to develop agile solutions and improve operational efficiency. Develop technical design documentation and ensure network security compliance. Key Skills & Qualifications Bachelor's or Master's degree in Computer Science, IT, or a related field. 10-15 years of experience in network engineering and wireless communications. Expertise in network services (DNS, DHCP, IPAM) and load balancing (F5, Azure). CCNP or CCIE certification required; additional certifications in Azure or Windows Server are a plus. Advanced proficiency in English (both written and verbal). Benefits Competitive salary and benefits package Health, dental, and vision insurance Retirement savings plan Paid time off and work-life balance Professional development programs Apply Now Equal Opportunity Statement Chevron is an equal opportunity employer, committed to diversity and inclusion in the workplace. Qualification : Bachelor's or Master's degree in Computer Science, IT, or a related field.

Principal Software Engineer - Backend | FinBox Location: Bengaluru Experience: 10-15 Years About FinBox: Where Fintech Meets Fun! Welcome to FinBox, where innovation in fintech meets creativity and excellence. Since our founding in 2017, we ve been transforming the financial services space, building state-of-the-art technologies that help lenders like Banks, NBFCs, and large enterprises quickly launch credit products cutting down development time from months to days. As a Series A funded company, we re rapidly expanding, with offices across India, Vietnam, Indonesia, and the Philippines. Our mission is to build the best-in-class infrastructure for lending products, empowering financial services firms worldwide to launch and scale credit programs that define the future of digital finance. We've already helped our customers disburse billions of dollars in credit, touching millions of lives globally. Innovative Environment: We encourage creative thinking and experimentation to push the boundaries of fintech. Impactful Work: Your contributions will directly impact millions, improving accessibility to credit across the world. Growth Opportunities: As a rapidly growing startup, we offer ample opportunities for personal and professional growth. Collaborative Culture: Join a dynamic, diverse, and inclusive team where everyone supports one another to drive meaningful change. Creative Thinkers: You thrive on out-of-the-box solutions and enjoy disrupting the status quo. Customer Heroes: You put the customer first and aim to solve their problems through innovation. Team Players: You work collaboratively and value diverse perspectives in achieving shared success. Key Responsibilities As a Principal Software Engineer - Backend, you will: Drive Technical Excellence Architect and deliver high-impact features and platform improvements with a focus on scalability, latency, and compliance (PCI DSS, GDPR, SOC2). Lead the resolution of critical tech debt across teams, ensuring long-term maintainability and performance. Shape Product Strategy Define and design long-term architecture that aligns with the business goals and technical requirements. Break down complex strategic initiatives into executable engineering tasks. Collaborate with Product, Sales, and Customer Success teams to align technical roadmaps with customer pain points. Ensure consistent, high-quality delivery across teams, maintaining high standards of engineering excellence. Grow Engineering Talent Mentor senior engineers, guiding them into leadership roles while fostering a culture of growth and excellence. Lead knowledge-sharing sessions, design reviews, and technical discussions to help upskill the team. Act as a Cross-Functional Partner Align engineering priorities with Product, Compliance, Operations, and Sales teams. Own Product Requirement Documents (PRDs) and vision decks for strategic features and roadmap alignment. Navigate trade-offs between different stakeholders and drive alignment across functions to ensure successful feature delivery. Ensure Production Stability Lead high-severity incident response and root cause analysis (RCA) processes, ensuring fast resolution and minimal downtime. Maintain and enforce up-to-date incident playbooks, driving a culture of reliability, accountability, and continuous improvement. Who You Are We re looking for someone who: Has 10+ years of experience in software engineering, with at least 3 years in a technical leadership or staff/principal role. Possesses expertise in system architecture, design patterns, and scaling distributed systems. Has a strong understanding of compliance and security frameworks such as GDPR, SOC2, and PCI DSS. Has proven experience in mentoring and developing senior engineers into leadership roles, fostering a culture of technical excellence. Demonstrates excellent collaboration skills, with experience working closely with cross-functional stakeholders to ensure alignment. Has hands-on experience in production incident management, improving system reliability and creating playbooks for incident response. Strong technical expertise in backend technologies (Go, Python, Java, Rust, etc.), cloud platforms (AWS, Azure, GCP), and databases (SQL/NoSQL). Nice to Have Experience working in SaaS or B2B product environments. Familiarity with OKRs and a metric-driven approach to product delivery. Contributions to open-source projects or active involvement in technical community events. Ownership: Lead major projects and own the technical direction for critical systems. Innovation: Work on cutting-edge technologies that redefine the future of digital finance. Impact: Play a direct role in providing accessible credit to millions of people worldwide. Culture: Join a team that values collaboration, creativity, and continuous learning. If you re a seasoned backend architect with leadership experience and a passion for fintech innovation, apply now and take your career to the next level with FinBox!

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Job Title: Security Architect Identity & Access Management Location: Bengaluru, India Company: Blue Yonder Experience: 10+ years (including at least 5+ years in IAM) Education: Bachelor's or Master's degree in Cybersecurity, Computer Science, or related field About Blue Yonder Blue Yonder is a recognized leader in AI-driven supply chain solutions, trusted by global brands to optimize their digital commerce and supply chain operations. We thrive on innovation, collaboration, and creating technology that powers smarter supply chains. As we continue to strengthen our security posture, we are seeking a Security Architect IAM to own, evolve, and safeguard Blue Yonder s identity landscape, ensuring consistent and compliant IAM controls across the organization s global footprint. Role Scope The Security Architect IAM will play a strategic and hands-on role in defining, implementing, and managing end-to-end identity and access management capabilities for Blue Yonder. This role requires deep technical expertise, leadership acumen, and a strong understanding of cloud-based identity ecosystems, ensuring secure access to critical systems and data. Key Responsibilities Define, develop, and manage a comprehensive IAM strategy, aligned with Blue Yonder s business goals, security policies, and compliance mandates. Design, implement, and enhance authentication, authorization, identity provisioning, access governance, and privileged access management (PAM) solutions, adopting best practices and industry standards. Conduct risk assessments to identify IAM vulnerabilities and define risk mitigation plans. Lead the technical implementation of IAM solutions and provide ongoing oversight to ensure operational excellence. Develop and enforce IAM policies, procedures, and standards to foster consistent security across the enterprise. Ensure IAM solutions adhere to regulatory requirements (GDPR, HIPAA, PCI DSS, SOX) and align with frameworks like NIST-CSF and ISO/IEC 27001. Integrate IAM capabilities with other security solutions (SIEM, endpoint security, etc.) for comprehensive protection. Establish and track Key Risk Indicators (KRIs) and Key Performance Indicators (KPIs) for the IAM program. Stay updated with emerging threats, technology advancements, and industry trends, adapting the IAM strategy accordingly. Conduct maturity assessments and develop continuous improvement plans for the IAM service. Participate in security architecture reviews and work with enterprise architects to embed IAM controls into broader IT and product architecture. Partner with GRC teams to ensure all IAM-related risks are properly documented and managed, driving remediation where necessary. Collaborate with application development teams to ensure secure-by-design development and deployment of new applications. Required Qualifications & Experience 10+ years of overall cybersecurity experience, with at least 5+ years specifically focused on IAM. Strong background designing and implementing cloud-based IAM solutions (Azure AD, AWS IAM, GCP IAM). Proven expertise across: Active Directory, LDAP, SSO, MFA SAML, OAuth, OpenID Connect Privileged Access Management (PAM) and Identity Governance (IGA) Experience managing IAM programs across hybrid environments (on-prem & cloud). Strong understanding of: Secrets management, encryption, PKI, digital certificates Zero Trust Security models Experience identifying, analyzing, and remediating IAM-related security risks. Knowledge of regulatory requirements (GDPR, HIPAA, SOX, PCI DSS) and experience translating those into practical IAM controls. Demonstrated ability to lead complex IAM projects, collaborating across multiple business units and technical teams. Excellent communication and stakeholder management skills, capable of interacting with both technical teams and business leadership. Preferred Certifications CISM Certified Information Security Manager CISSP Certified Information Systems Security Professional Relevant Cloud Security certifications (Azure Security Engineer, AWS Security Specialty, GCP Security Engineer) Good to Have Skills Experience integrating IAM with: CI/CD pipelines and DevSecOps practices Containerized environments (Kubernetes, Docker) Exposure to distributed tracing and logging tools for IAM services. Experience automating IAM processes for provisioning, deprovisioning, and audit reporting. Be a part of a global leader in supply chain technology. Work on cutting-edge IAM technologies in a cloud-first environment. Partner with cross-functional teams to drive impactful security programs. Join a culture that values diversity, innovation, and continuous learning. Diversity & Inclusion at Blue Yonder At Blue Yonder, we celebrate diversity in all forms. Our DIVE (Diversity, Inclusion, Value & Equity) strategy ensures every associate feels included, respected, and empowered to bring their authentic self to work. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, gender identity, national origin, disability, or veteran status. Qualification : Bachelor's or Master's degree in Cybersecurity, Computer Science, or related field

Job Title: Pre-Silicon Validation Engineer SoC/IP Job Description: Join the Devices Development Group (DDG), one of Intel s premier System-on-Chip (SoC) design teams, driving innovation in future Intel SoCs and IPs. As a Pre-Silicon Validation Engineer, you will be part of a dynamic team responsible for ensuring the functionality, performance, and reliability of Intel s cutting-edge designs. Key Responsibilities: Validate IP blocks or features at the SoC level, ensuring compliance with design specifications. Develop validation plans and test strategies based on architectural specifications, RTL code, and existing test methodologies. Analyze microarchitecture and debug failures to identify root causes and improve design quality. Develop and utilize various debugging and validation tools to implement validation plans effectively. Participate in silicon debugging, identifying issues and enhancing testing methodologies for future RTL models. Collaborate with IP providers and internal customers to define, develop, and deliver essential infrastructure while addressing issues identified during execution. Qualifications & Requirements: Educational Qualifications: Bachelor s (B.Tech/BS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of experience, OR Master s (M.Tech/MS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 3+ years of experience. Technical Skills & Experience: Minimum 2 years of experience in IP or SoC development, verification, or integration using SystemVerilog and UVM (Universal Verification Methodology). Minimum 2 years of experience in writing validation plans and developing software to execute those plans. Minimum 2 years of experience with object-oriented programming languages. Minimum 2 years of experience working with SystemVerilog and UVM. Minimum 1 year of experience with UNIX/Linux environments. Exposure to Graphics Verification and/or Security Verification is a plus. Preferred Qualifications: Minimum 1 year of experience with computer architecture. Minimum 2 years of experience in validation or testing, particularly in silicon design teams. About the Client Computing Group (CCG): The Client Computing Group (CCG) is at the forefront of Intel s PC product and platform development, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. Through strategic partnerships across the industry, CCG delivers innovative computing experiences that empower users to create, connect, and collaborate. As Intel s largest business unit, CCG drives innovation, scalability, and IP development, helping the company fulfill its mission of enriching lives through technology. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, which includes: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development opportunities to support career growth.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

Summary of Essential Job Functions The primary responsibility of the InfoSec Tech Lead is to ensure the organization's global information security, compliance, and risk management. The role involves collaborating with various teams to identify and implement security requirements for product applications and infrastructure. Minimum Requirements (Education & Work Experience) Education: Bachelor s/Master s degree in Computer Engineering or Information Science. Certifications (Preferred): OSCP, OSCE, ECSA|LPT, CPT, CEH. Experience: 5-7 years in Vulnerability Management, covering Application, Infrastructure, Cloud, Mobile Security, Secure Code Review, and IoT. Work Location: Bangalore, India (May require travel). Competency Requirements Hands-on experience in Network, Web-based, and Cloud Application Security Assessments including threat modeling, vulnerability assessments, and penetration testing. Knowledge of current information security trends. Familiarity with security bug classification frameworks (e.g., CVSS, DREAD) and application of classification methods. Expertise in Web Service vulnerability assessments. Understanding of Mobile Application Security (iOS/Android). Experience in code review methods and standards. Ability to develop proof-of-concept (POC) exploits for security vulnerabilities. Proficiency with web application vulnerability scanning tools (e.g., Acunetix, NTO Spider, BurpSuite Pro, WebInspect, Core Impact). Experience with network assessment tools and exploitations (e.g., Kali Framework, QualysGuard, Nessus, Nexpose, Nmap, Metasploit, Saint). Experience in static code review tools (e.g., Checkmarx, HP Fortify, IBM AppScan Source). Proficiency in at least two scripting languages (e.g., Python, Perl, PHP, Ruby, etc.). Ability to assess applications using OWASP, OSSTMM, CESG, CREST, NIST, ISSAF, PTES methodologies. Understanding of SDLC practices and adaptability to Agile methodologies. Experience in high-level programming languages (e.g., Java, C, C++, .NET (C#, VB)), with DAST code review as an added advantage. Knowledge of operating systems (Windows/Linux/UNIX IBM AIX, Sun Solaris, HP UX) and network equipment. Experience providing technical oversight to project teams to ensure quality engagements. Strong experience in mentoring, coaching, and leading teams in challenging environments. Familiarity with security compliance frameworks (PCI, SOC, GDPR). Other Requirements Strong ethics and integrity in business and information security. Proficiency in English (written and verbal communication skills). Ability to prepare professional reports and present findings to technical and executive stakeholders. Ability to interact with customers and understand security requirements. Job Responsibilities Conduct and manage Vulnerability Assessments and Penetration Testing (VAPT) for Infrastructure, Web Applications, and Web Services/APIs. Perform manual and automated security testing to identify vulnerabilities. Conduct periodic configuration audits for network devices, servers, and critical functions. Perform secure code reviews across multiple programming languages and recommend corrective actions. Assess SDLC processes for security compliance. Develop security testing scripts and procedures. Participate in security-related projects as per skillset. Continuously evaluate application architecture to enhance security processes. Analyze suspected vulnerabilities, collaborate with subject matter experts, and recommend remediation measures. Evaluate and recommend security products and solutions. Act as a security advisor for secure coding standards and security information management. Qualification : Bachelors/Masters degree in Computer Engineering or Information Science.

Job Description At Cisco, we are a global leader in networking and IT, driving innovation and redefining how people connect, communicate, and collaborate. Our mission is to shape the future of the internet by creating outstanding value and opportunity for our customers, employees, investors, and ecosystem partners. We are committed to fostering a diverse and collaborative environment where everyone can thrive and contribute to our collective success. What You'll Do As a CVT Solution Qualification Engineer, you will work alongside a dedicated, dynamic, and hardworking team to qualify and automate key technologies and solutions for deployment in high-end Cisco Web and Service Provider customer environments, impacting millions of users globally. Your responsibilities will include: Designing, automating, configuring, and qualifying customer use cases based on IOS-XR for ASR9K, NCS5500, NCS5000, and 8000 platforms. Generating test plans and dynamically prioritizing tasks based on customer needs. Developing test frameworks, tools, and web-based GUIs to support the execution environment and display analytics and machine learning-driven insights. Driving manual and automated test execution, raising, tracking, prioritizing, and verifying defects and fixes. Proactively seeking improvements in test coverage, execution, and automation, optimizing performance and configuration. Reproducing customer issues in internal test labs as requested by customer support teams. Generating test execution reports and technical whitepapers. Collaborating with cross-functional teams across multiple continents. Who You'll Work With As a senior member of this team, you ll work alongside a skilled group of engineers passionate about learning new technologies. The team consists of individuals with various years of experience, ranging from 3 to over 20 years, all of whom bring exceptional value to the table. Our team has a global presence with members located in the US, Canada, and India. You will also have opportunities to interact with groups such as Product Management, Marketing, Sales, Customer Support, Advanced Services, and the Customer Team. Who You Are You have a passion for qualifying and automating SP/web networking solutions and use cases to ensure smooth deployment for our customers. You have hands-on experience with qualifying, deploying, troubleshooting, and maintaining SP/web networking technologies, particularly XR platforms. Minimum Qualifications Bachelor s degree in Computer Science with 8+ years of professional experience or a Master s Degree in Computer Science with 6+ years of professional experience. Experience with Networking Automation, Software Quality Assurance, protocol testing, and supporting Web/Service-provider customers. Experience with routing hardware/platforms/forwarding architecture and networking technologies. Hands-on experience with Python automation. Preferred Qualifications CCIE certification (Routing & Switching / Service Provider / Data Center). Experience with platforms such as ASR9K, NCS5500, NCS5000, NCS540/NCS560, NCS6K, CRS, 8000. Experience with OpenFlow, Netconf, and REST API. Experience with network automation tools such as pyATS, Ansible, Jenkins, and Cisco NSO. Experience with CentOS, Redhat, Ubuntu UNIX/Linux and expertise in Bash/Unix Shell Scripting. Experience in configuring/fixing protocols such as ISIS/OSPF, BGP, L2/L3 VPN, EVPN, Segment Routing, IPv6, MPLS-LDP/RSVP-TE, Multicast, SNMP, Telemetry, gNMI, gRPC, Netconf & OpenConfig Yang Models. Why Cisco? #WeAreCisco At Cisco, we believe in the power of diversity and bringing our talents together to make a difference. We focus on developing innovative technology and powering a digital future for all. Cisco is a leader in the internet revolution, helping organizations around the world whether in health services, education, or business connect, collaborate, and succeed. We empower our employees to innovate, giving back to the community with paid volunteer days and supporting one another through both personal and career milestones. Join us, and bring your unique self to a place where passion for technology and world-changing ideas thrive. Qualification : Bachelors degree in Computer Science with 8+ years of professional experience or a Masters Degree in Computer Science with 6+ years of professional experience.

About Oracle Cloud Infrastructure (OCI) Oracle Cloud Infrastructure (OCI) offers a scalable, secure, and high-performance cloud environment designed to meet the needs of modern enterprises. Our mission is to build and operate a suite of integrated cloud services that support the most demanding applications across the globe. OCI empowers customers to tackle some of the world's biggest technology challenges by providing reliable, high-scale distributed services. Role Overview As a Senior Software Engineer, you will play a critical role in designing, developing, troubleshooting, and debugging high-performance, scalable software solutions across databases, applications, tools, and networks. You will contribute to defining and evolving standard engineering practices, ensuring the development of robust and resilient services. This role involves working on non-routine, highly complex problems, requiring deep technical expertise and strong problem-solving skills. As a leading individual contributor and team member, you will mentor engineers, drive technical direction, and deliver impactful solutions for Oracle's cloud platform. Career Level: IC3 Key Responsibilities Design, develop, troubleshoot, and debug software applications and distributed systems. Take an active role in defining engineering best practices and evolving Oracle Cloud Infrastructure (OCI). Build highly available, scalable, and resilient cloud services to support business-critical applications. Lead the entire software development lifecycle, from concept and architecture to deployment and operations. Optimize performance and reliability of cloud services, ensuring seamless user experience. Work on service-oriented architectures (SOA) and RESTful APIs to enable cloud interoperability. Develop and maintain CI/CD pipelines, enabling automated deployments with robust testing. Conduct security reviews, risk assessments, and compliance audits (e.g., FedRAMP, PCI DSS). Collaborate with Product Managers, UX designers, and internal customers to translate business needs into scalable engineering solutions. Monitor, troubleshoot, and improve system performance, proactively identifying and addressing anomalies. What is IAM at OCI? The Identity and Access Management (IAM) team at OCI is responsible for designing and building core security services that empower customers to control access to their cloud resources. As part of Oracle's Cloud Platform Organization, the IAM team delivers enterprise-grade authentication, authorization, and access control solutions used by internal and external customers. IAM engineers work on high-scale distributed systems, handling millions of requests per second, ensuring compliance with industry security regulations, and designing resilient, multi-region architectures. Who We Are Looking For We are seeking highly skilled software engineers with expertise in distributed systems and cloud services development. The ideal candidate will: Have experience designing and deploying highly available, large-scale services in a cloud environment. Understand how to build resilient, fault-tolerant services that operate across multiple availability domains (ADs) and regions. Be a hands-on engineer, capable of driving feature development from conception to production. Be proactive in identifying performance bottlenecks and improving system scalability. Have a deep understanding of security best practices, including threat modeling and risk assessments. Thrive in a fast-paced, collaborative, and agile engineering environment. Biggest Challenges for the Team Reliability & Performance: As the business grows, we must scale services to handle exponentially increasing workloads. Scalability & Resilience: Designing and operating services that can withstand regional outages while maintaining seamless performance. Security & Compliance: Ensuring that IAM services meet stringent security requirements while remaining flexible and user-friendly. Required Qualifications 7+ years of software engineering experience, specializing in distributed systems and cloud services. Strong proficiency in Java, C++, or C# for backend development. Experience with service-oriented architectures (SOA) and RESTful web services. Hands-on experience building and operating cloud-based services. Proficiency in at least one scripting language (Python, Bash, etc.) for automation and tooling. Experience with monitoring, debugging, and optimizing distributed systems. Preferred Qualifications Experience with public cloud platforms (AWS, Azure, Oracle Cloud). Knowledge of containerization technologies (Docker, Kubernetes). Experience with CI/CD pipelines and automated testing frameworks. Expertise in multi-region architecture and high-availability systems. Familiarity with compliance standards (FedRAMP, PCI DSS). Why Join Oracle Cloud Infrastructure (OCI)? Work on cutting-edge cloud technologies that shape the future of enterprise computing. Build and operate high-impact, large-scale distributed systems. Be part of a team that values innovation, collaboration, and continuous learning. Competitive compensation, benefits, and career growth opportunities. If you are passionate about solving complex engineering challenges and building the future of cloud computing, we invite you to join Oracle Cloud Infrastructure (OCI) and make an impact.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

Engineer will be working on Embedded Firmware which involves feature development, integration, and bug fixing and maintenance. Experience in embedded architecture, external interfaces, product constraints, along with ability to develop architectures/features that meet these constraints while providing new value for the platform. Strong Experience in C\C++ Strong Experience in embedded Systems Strong Experience in RTOS System level design Experience in low level programming in ARM or ARC architecture Experience in debugging Embedded system software with Innovative techniques Experience in capturing and debugging based on HW Signals. Experience in Requirement understanding and designing solution with good presentation skills.Add-on:- Experience in USB Protocol- Experience in PCI System flows- Experience in Bluetooth Controller / Host protocols( BR\EDR) and Bluetooth Low Energy- Exposure to Python scripting.- Agile and scrum practices Qualifications Bachelor's or Master s degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience. Proven experience in Embedded system software / Firmware development in RTOS environment with strong system knowledge in understanding the requirements and making the design, development and deployment in embedded products. Solid understanding of software development life cycle (SDLC) and Agile methodologies. Excellent problem-solving skills and attention to detail. Strong written and verbal communication skills. Experience in maintaining and managing codebases, ensuring high standards of code quality. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Bachelor's or Masters degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience.

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

Technical Requirements: 1. Experience in Verification: SoC (System on Chip), Sub-system, and Block Level verification. Strong understanding of verification methodologies and flow. 2. ARM Architecture & AMBA Protocol: Hands-on experience in ARM architecture. In-depth knowledge of AMBA protocol at the SoC and sub-system levels. 3. Verification Methodologies: Expertise in UVM (Universal Verification Methodology), OVM (Open Verification Methodology), SV (SystemVerilog), Verilog, and C-based verification methodology. Strong command over verification languages like SystemVerilog and Verilog. 4. Additional Verification Tools & Exposure: Exposure to GLS (Gate-Level Simulation) and power-aware verification is a plus. 5. Protocols Knowledge: Practical experience with verification of various protocols, such as: PCIe, DDRx, Ethernet, USB, AXI, AHB, APB, I2C, SPI. 6. RTL Debugging & Test Automation Scripting: Strong RTL (Register Transfer Level) debugging skills. Ability to write test automation scripts using TCL, Perl, or Python. 7. Testbench (TB) and Test Cases: Experience in building testbenches (TB) and test cases from scratch. In-depth knowledge of creating scalable and reusable testbenches. 8. Verification Tools: Familiarity with industry-standard verification tools for simulation, debugging, and automation. Expectations from the Role: 1. Communication & Inter-personal Skills: Strong communication and inter-personal skills. Ability to work independently or as part of a team, collaborating effectively with cross-functional teams. 2. Learning & Adaptability: Ability to quickly learn new technologies and verification tools. Ability to work in a distributed work environment and adapt to diverse work conditions. 3. Ownership & Punctuality: Demonstrated ownership of tasks and projects. High punctuality and accountability in delivering results within agreed timelines.

Technical Requirements: 1. Verification Experience: Strong experience in SoC, sub-system, and block-level verification. Ability to handle different verification stages and methodologies for complex systems. 2. Hands-on Experience with ARM Architecture and AMBA Protocol: ARM architecture familiarity, particularly at the SoC and sub-system level. Expertise in AMBA protocol (e.g., AHB, APB, AXI) and its application in SoC verification. 3. Verification Methodologies: Proficient in UVM/OVM, SystemVerilog, Verilog, and C-based verification methodologies. Solid understanding of testbenches (TB), test cases, and automation methodologies. Experience in test automation scripting with languages such as TCL, Perl, and Python. 4. Exposure to Advanced Verification Techniques: GLS (Gate-Level Simulation) experience is a plus. Power-aware verification knowledge, ensuring low power consumption in designs. 5. Protocol Knowledge: Working knowledge of industry protocols such as PCIe, DDRx, Ethernet, USB, I2C, SPI, among others. Familiarity with AXI, AHB, APB protocols for data communication in embedded systems. 6. RTL Debugging & Tools Proficiency: Strong RTL debugging skills to identify and resolve issues in designs. Well-versed with industry-standard verification tools used in simulation, debugging, and analysis. 7. Building Testbenches & Test Cases: Extensive experience in building testbenches from scratch. Ability to create and implement detailed test cases for different verification scenarios. Expectations from the Role: 1. Communication and Interpersonal Skills: Strong ability to communicate technical concepts effectively both within the team and with other stakeholders. Clear verbal and written communication skills for reporting progress and challenges. 2. Independent and Team-based Work: Ability to work independently on projects or as part of a team. Able to take ownership of tasks and contribute to team discussions effectively. 3. Learning and Adaptability: Ability to learn quickly and adapt to evolving technologies and methodologies. Stay updated with advancements in verification techniques and tools. 4. Ownership and Accountability: Demonstrated ownership of projects, ensuring timely completion and addressing any challenges that arise. Ensuring high-quality results through attention to detail. 5. Leadership & Mentorship: Ability to mentor and lead junior engineers and verification teams. Provide guidance in solving complex problems and ensuring successful project outcomes. 6. Punctuality and Responsibility: Demonstrated punctuality in meeting deadlines and project milestones. Timely execution of tasks and troubleshooting to maintain project timelines. Ideal Candidate Profile: The ideal candidate will have significant experience with SoC verification, ARM architecture, and verification methodologies such as UVM and SystemVerilog. The candidate should possess strong protocol knowledge and be proficient in debugging RTL and automating test scenarios. A key aspect of the role is the ability to work independently, take ownership of tasks, and guide the team in solving technical challenges. Leadership and mentoring abilities are essential, as is the capacity to manage multiple tasks effectively in a distributed work environment.