Physical Layer PHY Jobs in Bengaluru
125 Jobs Found
Business Technology Data Engineer
Samsara Inc
Position: Business Technology Data Engineer Location: Bengaluru, India (Hybrid 3 days onsite) Company: Samsara Technologies India Pvt. Ltd. About Samsara Samsara (NYSE: IOT) is a leader in the Connected Operations Cloud, enabling businesses across industries like transportation, logistics, manufacturing, and field services to harness IoT data for safety, efficiency, and sustainability improvements. Samsara helps organizations digitize physical operations at scale, improving outcomes that impact global infrastructure. Role Overview Samsara is seeking a Business Technology Data Engineer to join its Data & Analytics team within the Business Technology division. In this role, you will design, build, and optimize end-to-end data pipelines and infrastructure for various business-critical systems across CRM, marketing, support, and product platforms. You'll collaborate with teams across the company to build reliable and scalable data solutions that power reporting, automation, and analytics. This hybrid role requires working 3 days per week from the Bengaluru office and 2 days remotely, with working hours aligned to India Standard Time (IST). Key Responsibilities Data Engineering & Platform Development Design and maintain ETL/ELT pipelines that integrate and transform data across business systems. Build scalable data infrastructure to support advanced analytics and real-time reporting needs. Write Python and SQL scripts for data ingestion, transformation, and validation. Data Integration & Enablement Work with diverse data sources: CRM, product telemetry, marketing automation, support ticketing, and order flow systems. Develop and support data lake and data warehouse solutions using Snowflake, Redshift, Databricks, or BigQuery. Ensure interoperability between applications and data layers. Performance & Quality Monitor and optimize pipeline performance, implement observability and alerting. Improve data quality, lineage, and governance across systems. Partner with internal stakeholders (e.g., Sales Ops, Marketing Ops, Analytics) to deliver reliable data products. Minimum Qualifications Bachelor s degree in Computer Science, Data Engineering, or related field. 5+ years of professional experience in data engineering. 3+ years experience building and maintaining end-to-end pipelines in a modern data stack. Strong in SQL and Python. Hands-on experience with: ETL tools: Fivetran, dbt Cloud: AWS (preferred), GCP, or Azure Databases: MySQL, PostgreSQL, Oracle, or similar Data Warehouses: Snowflake, Redshift, BigQuery, Databricks Preferred Qualifications Familiarity with API-based ingestion, serverless architecture (Lambda, API Gateway, SQS, etc.). Experience with monitoring tools (DataDog, CloudWatch, Splunk). Comfortable engaging stakeholders to translate business needs into data solutions. Proficiency in Docker, Kubernetes, or AWS Fargate is a plus. Qualification : Bachelors degree in Computer Science, Data Engineering, or related field
Senior Product Manager
Meesho
Senior Product Manager Location: Bangalore, Karnataka | Department: Product & Design About the Team At Meesho, Product Management mirrors our rocketship growth. By obsessively understanding customer behavior, we ve carved out a unique e-commerce niche in Tier 2/3/4 towns across Bharat. Our remarkable growth is a testament to how we think about product for our customers those who have barely shopped online but now can thanks to Meesho. Fun Fact: Nearly 7% of India s households shop with us! We operate with a user-first mindset and prioritize execution with rigor to deliver impactful solutions. We focus on problem discovery & delivery, aiming for high impact, not just building features. We believe in having fun while working hard. Whether you're into movies or sports, we have a diverse and energetic team. If a game of badminton after work sounds exciting, this is the place for you! About the Role We are looking for a passionate Senior Product Manager who thrives in a fast-paced start-up environment and enjoys solving high-impact problems. This cross-functional leadership role will have you collaborating with teams across software engineering, UX design, category management, marketing, operations, and finance to bring new products to life. What You Will Do Market & Customer Understanding: Gain deep insights into the e-commerce market and customer/seller needs through landscape analysis, customer interviews, user research, competition analysis, and other techniques. Problem Identification & Prioritization: Use structured approaches to identify and break down problems. Prioritize what needs immediate attention vs. what can be solved later. Solution Discovery: Lead brainstorming sessions to generate the best technology-driven solutions. Collaborate with design, engineering, and business teams to identify and experiment with new ideas using MVPs, prototypes, etc. Product Delivery: Define detailed product requirements and collaborate with cross-functional teams (design, engineering, business, analytics) to bring the product to life. Ensure high product quality through user acceptance testing and dogfooding. Go-to-Market Planning: Create a comprehensive go-to-market plan in partnership with business and marketing stakeholders to maximize product success. Adoption & Metrics: Define and track product metrics. Analyze usage patterns and create action plans to improve product performance. Roadmap Creation: Develop a product roadmap with a 3-month forward-looking view, solving key customer and business problems. Team Leadership: Manage a small team of product analysts and associate product managers, guiding them toward product execution. What You Will Need 7+ years of overall experience, with at least 4+ years in product management in a tech-led company (consumer internet experience preferred) Exceptional problem-solving skills based on first principles thinking Solid understanding of technology, with familiarity in product management processes like A/B experimentation, writing product requirement documents, managing product backlogs, and creating roadmaps About Us Welcome to Meesho, an e-commerce platform transforming businesses across India. We are not just a platform; we re your partner in turning dreams into realities. Our mission is to democratize internet commerce for everyone. Curious about life at Meesho? Our employees are some of the happiest, which has earned us top ratings as an e-commerce workplace on Glassdoor! Our Mission At Meesho, we aim to democratize internet commerce for everyone. We started with the vision to serve the next billion Indian consumers and enable 100 million small businesses to succeed online. We provide sellers with unique benefits such as zero commission and the lowest shipping costs. Currently, more than 1.75 million sellers are growing their businesses through Meesho s extensive customer base and advanced tech infrastructure. Our model caters to underserved customers, providing affordable and relatable merchandise. Through continuous innovation, we are proud to be India s first horizontal e-commerce company. Culture & Total Rewards At Meesho, we focus on cultivating a dynamic, high-performing workplace. Our people-centric culture emphasizes hiring exceptional talent and fostering growth. Our culture is driven by our 11 guiding principles, or "Mantras," which influence everything from recognition to career development. What We Offer: Market-leading compensation a combination of cash and equity-based rewards tailored to the role and individual experience Comprehensive wellness support through the MeeCare Program, focusing on physical, mental, financial, and social well-being Generous medical insurance benefits for employees and their families, including wellness initiatives like telehealth services and gym discounts Work-life balance support with generous leave policies, parental support benefits, retirement plans, and learning assistance Employee recognition personalized gifts, performance-based rewards, and fun workplace activities Additional benefits like salary advance support, relocation assistance, and flexible benefits plans to further enrich your experience
Manager - Ehs (environment, Health, And Safety)
Pharmed Limited
Manager - EHS (Environment, Health, and Safety) Location: Bangalore Experience: 7-10 years of experience, preferably in the Pharma Industry Industry: Pharmaceutical Education Qualification: Bachelor s/Master s Degree in Engineering, Health, Industrial Management, Science, Environmental Science, or related field. Certifications Required: OSHA, EHS, CPR, CSP, ASP, CIH, HAZWOPER. Fire Department Certification may be preferred. Role Overview We are looking for a skilled and experienced Manager - EHS to join our pharmaceutical company in Bangalore. The role requires a strong understanding of safety and environmental regulations and a proactive approach to managing health, safety, and environmental risks in the workplace. The Manager - EHS will oversee the development, implementation, and management of EHS programs, ensuring compliance with local, state, and central regulations and company policies. Key Responsibilities EHS Program Development & Implementation: Develop and implement safety and environmental programs that create and maintain a safe work environment for employees. Safety Inspections & Audits: Conduct regular safety inspections and audits to ensure compliance with EHS regulations. Investigate accidents/incidents and develop corrective actions to prevent future occurrences. Risk Assessments: Perform risk assessments for new processes, equipment, and materials. Implement measures to mitigate identified risks and ensure the safety of all employees. Employee Safety Training: Conduct regular training for employees on safety procedures, emergency response, and EHS best practices. Regulatory Compliance: Oversee activities related to permits, environmental regulations, and compliance with safety standards. Ensure documentation is up-to-date and regulatory filings are completed accurately. Documentation & Reporting: Maintain and update safety data sheets, compliance records, and incident reports. Prepare and present EHS performance reports to management and stakeholders. Incident & Emergency Response Management: Ensure the development and maintenance of emergency response plans. Conduct regular emergency drills and training sessions to ensure readiness. Vendor & Contractor Compliance: Ensure that vendors and contractors adhere to EHS standards and company policies. Health & Wellness Programs: Develop and implement health and wellness initiatives that promote physical and mental well-being for employees. Continuous Improvement: Monitor compliance with safety standards and enforce safety regulations. Promote initiatives for continuous improvement in safety practices and performance. Insurance & Claims Management: Coordinate with insurance providers for claims management and risk assessments related to employee safety and workplace hazards. Skills & Qualifications EHS Knowledge: In-depth knowledge of EHS regulations and best practices as mandated by local, state, and central regulatory bodies. Analytical & Problem-solving Skills: Strong ability to analyze data, identify issues, and develop solutions to improve safety and environmental practices. Communication Skills: Excellent written and verbal communication skills to effectively report, train, and communicate with employees and management. Software Proficiency: Proficient in Microsoft Office and EHS management software to track, report, and monitor EHS metrics and documentation. Team Player & Independent Worker: Ability to work independently and as part of a team to achieve EHS objectives. Industry Knowledge: Experience evaluating work procedures and processes to align with industry standards and best practices. Travel Requirements: Willingness and ability to travel extensively for inspections, audits, and compliance checks. This is a fantastic opportunity to work with a leading pharmaceutical company where you will have the chance to make a significant impact on employee safety and environmental compliance. You will work in a dynamic, fast-paced environment, focusing on developing and implementing strategies that drive safety, health, and environmental initiatives across the organization. Qualification : Bachelors/Masters Degree in Engineering, Health, Industrial Management, Science, Environmental Science, or related field.
Staff Embedded Software Engineer
Arm Limited
Job Title: Staff Engineer Embedded Software & Methodologies Job Overview: The Architecture and Technology Group (ATG) at Arm plays a critical role in shaping the future of Arm s architecture roadmap. ATG develops industry-leading secure CPU and system architectures, along with technologies that empower our global ecosystem to build innovative products. As part of this, ATG also creates Architecture Compliance Kits (ACK) a crucial product that ensures CPU implementations adhere to Arm architecture standards. These kits are utilized by both internal and external CPU design teams to validate compliance. The ATG team in Bangalore focuses on developing these ACK products. The Methodology Team, specifically, builds embedded software, methodologies, and tools for the latest Arm cores and system IPs. As a Staff Engineer, you will provide technical leadership and guide junior engineers while actively contributing to product development. You will leverage your software engineering expertise to build scalable, high-quality compliance kits used across Arm s internal teams and external partners. Key Responsibilities: Act as a technical expert, driving the design and development of embedded software, boot flows, and methodologies for architectural compliance. Analyze architecture specifications and define software methodologies that meet industry standards. Provide technical direction to the team while mentoring and guiding junior engineers. Collaborate with cross-functional teams to ensure successful and timely delivery of engineering commitments. Continuously enhance development efficiency through improved methodologies, automation, and process enhancements. Communicate delivery status, technical risks, and mitigation plans effectively to stakeholders. Required Skills & Experience: Bachelor s or Master s degree (or equivalent) in Computer Engineering, Computer Science, or Electronics Engineering. 10+ years of experience in embedded software development, boot flows, firmware development, driver development, or low-level operating system driver development for processors. Strong understanding of software engineering principles, along with excellent analytical, problem-solving, and debugging skills. Strong communication skills both verbal and written with the ability to convey technical information effectively across teams. Self-driven, proactive, and able to take ownership of tasks and responsibilities. Preferred Skills: Familiarity with computer architecture fundamentals, especially Arm or x86 architecture. Proficiency in at least one programming language (C or C++) and one scripting language (Perl or Python). Experience with assembly-level programming. Working knowledge of software verification methodologies, embedded software environments, and toolchains (with preference for GNU toolchains). Join a team that thrives on technical excellence and innovation. Whether it s defining cutting-edge architectures, developing advanced cores, or creating custom physical IPs, Arm offers you a platform to push boundaries and make a lasting impact. Qualification : Bachelors or Masters degree (or equivalent) in Computer Engineering, Computer Science, or Electronics Engineering.
Senior 5g Ran Developer
Tietoevry
Job Title: Senior 5G RAN Developer Location: Bengaluru, India Experience: 4 to 8 years Education: B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or an equivalent discipline About Tietoevry At Tietoevry, we are at the forefront of 5G innovation, collaborating with global telecom leaders to design and deliver next-generation wireless solutions. Our inclusive, innovation-driven culture offers the perfect platform to work on cutting-edge technologies and contribute to shaping the future of connectivity. Role Overview As a Senior 5G RAN Developer, you will play a critical role in designing, developing, and maintaining 5G NR protocol software components. You will lead the systemization, development, and verification processes for various RAN subsystems, contributing to the development and optimization of gNodeB solutions. This role requires deep technical expertise in 5G RAN Layer 1, 2, and 3, combined with strong architectural insight and a proactive, problem-solving mindset. You will collaborate closely with clients and global teams, provide technical guidance to peers, and help drive innovation in our 5G product portfolio. Key Responsibilities Contribute to product development, maintenance, and delivery, including requirement analysis, high-level design (HLD), low-level design (LLD), coding, and verification of gNodeB. Analyze and prioritize 3GPP features for development across different subsystems. Lead system integration and testing activities in collaboration with client and internal teams. Provide technical leadership by guiding teams on complex design and architectural decisions. Drive continuous performance improvement and ensure quality deliverables. Identify and implement architectural enhancements to optimize product performance and scalability. Document development processes, system designs, and testing outcomes thoroughly. Mandatory Skills & Experience Proven hands-on experience in developing LTE/5G NR MAC Scheduler and Layer-2 protocols. Deep knowledge of 3GPP specifications, particularly across Layer 1, Layer 2, and Layer 3. Strong understanding of Layer1-Layer2 and Layer2-Layer3 interfaces. Solid understanding of networking protocols such as TCP/IP, UDP, SCTP, etc. Experience debugging complex gNodeB issues, including log file analysis and troubleshooting in live environments. Proficiency in C/C++ programming, with experience implementing complex algorithms. Hands-on experience with any of the following features: MAC, RLC, PDCP, Scheduler, Power Control, SPS, TTI Bundling, Link Adaptation, GTP-C, GTP-U In-depth understanding of 3GPP Radio Access Standards, ORAN split architecture, and radio protocol algorithms. Experience in feasibility studies and simulations related to Layer 1/PHY features and packet scheduler algorithms. Experience in software development and systemization for 5G Layer 1/Layer 2/Layer 3 protocols. Strong grasp of Linux OS and optimization techniques using DPDK. Hands-on expertise with version control tools like Git and Gerrit, and project management tools like Jira. Experience working in Agile environments. Preferred Skills Experience with cloud technologies, such as microservices and containers. Exposure to ORAN/Open RAN ecosystems is a plus. Strong analytical mindset with a self-driven and proactive approach. Soft Skills Excellent communication skills, with the ability to work in a dynamic, multicultural environment. Strong collaboration skills to work closely with cross-functional teams across geographies. Ability to mentor and guide junior developers, fostering knowledge sharing within the team. Opportunity to work on cutting-edge 5G technology projects in collaboration with global telecom leaders. A Nordic-inspired culture based on trust, transparency, respect, and low hierarchy. Professional growth through continuous learning, training programs, and exposure to emerging technologies. An inclusive workplace that supports work-life balance. Opportunities for global collaboration, contributing to innovative solutions that shape the future of mobile connectivity. Diversity & Inclusion Commitment At Tietoevry, we believe that diversity fuels innovation. We actively encourage applications from all genders (m/f/d) and candidates from diverse backgrounds. We are committed to fostering an open, inclusive, and inspiring workplace where every individual can thrive. Qualification : B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or an equivalent discipline
Pcie Design Engineer
Nvidia
NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.
L1 Technical Support Engineer Security
Juniper Networks
At Juniper We believe the network is the greatest vehicle for knowledge, understanding, and human advancement. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people a consistent and dedicated practice we call the Juniper Way. Summary This position is part of the L1 Technical Assistance Center (TAC), supporting Juniper s SRX Firewall customers worldwide. About the Role This role offers a unique opportunity to address a wide range of challenging technical issues for global customers, stay ahead in the rapidly evolving security industry, and continuously develop new skills. You will be part of a collaborative, supportive team, working on diverse tasks that ensure each day is engaging and dynamic. Key Responsibilities Work in a highly dynamic Technical Assistance Center (TAC) environment with a strong focus on customer satisfaction. Quickly diagnose and resolve customer issues to deliver a remarkable customer experience. Serve as a customer advocate, ensuring timely problem resolution while understanding the network environment and business impact. Take full ownership of problem resolution, reproduction, and escalation when necessary. Collaborate within a team-oriented environment, demonstrating flexibility to work on weekends/holidays as required. Continuously learn and adapt to emerging technologies. Mandatory Skills VPN Expertise: Strong knowledge of VPN design, implementation, troubleshooting, and encryption algorithms (e.g., DES, 3DES, MD5, SHA, PKI). Core Networking Knowledge: Thorough understanding of the TCP/IP protocol suite, OSI model, and ability to apply this knowledge to network troubleshooting. Security and Firewall Experience: Proven knowledge of network security, access and perimeter control, vulnerability management, and intrusion detection. Familiarity with SYN flood, replay attacks, and related mitigation techniques. Data Network Experience: Proficiency in LAN/WAN hardware, physical layer infrastructure, data transmission facilities, and interconnecting devices. Troubleshooting Tools: Expertise in using utilities such as lookup, traceroute, ping, netstat, and packet analysis tools like Wireshark and tcpdump. Routing Protocols: Deep understanding of OSPF, BGP, RIP, IPSEC VPN, xDSL, and multicast technologies. Layer 2 Technologies: Strong knowledge of VLANs, VLAN tagging (802.1q), LACP, VLAN trunking, and STP (802.1D and other implementations). Requirements B.E. in Electronics Engineering or Computer Science with 1 3 years of experience in supporting, designing, or implementing IP networks. Hands-on experience in troubleshooting, implementation, and support of large-scale IP networks. Preferred Skills Application Layer Protocols: Working knowledge of FTP, DNS, SNMP, HTTP/HTTPS, LDAP, RADIUS, SMTP, and user authentication mechanisms. Security Products: Experience in providing support for security products such as firewalls, IPS/IDS, and Unified Threat Management (UTM) systems (e.g., URL filtering, antivirus, anti-spam). Operating Systems: Understanding and troubleshooting Windows, Unix, and macOS environments, including related technologies like NIS, NFS, Sun-RPC, and MS-RPC in security-enabled settings. Preferred Certifications JNCIA-JUNOS, JNCIS-Security, JNCIA-FWV, JNCIS-FWV, CCNA, CCNP or equivalent certifications are a strong plus. Join us and be part of the Juniper Way, where we encourage you to: Be Bold Build Trust Deliver Excellence Juniper Networks is an equal-opportunity employer, committed to fostering diversity and inclusivity. We do not discriminate based on race, religion, color, gender, sexual orientation, age, disability, or veteran status. Reasonable accommodation will be provided throughout the hiring process for individuals with disabilities. Qualification : B.E. in Electronics Engineering or Computer Science with 13 years of experience in supporting, designing, or implementing IP networks.
Phy Dfx Micro Architect (mixed Signal Logic Design Engineer)
Intel Corporation
We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...
Wlan Subsystem Design Lead (staff Eng)
Qualcomm Technologies
Job Function: As part of the Wireless R&D HW team in Bangalore, the candidate will contribute to the design and development of next-generation WLAN and micro-Wi-Fi subsystems for connectivity solutions in IoT, hearables, and wearables. This includes: Architecture and micro-architecture development. RTL design and integration. Collaboration with cross-functional teams for design convergence. Responsibilities: Develop micro-architecture and implement design using Verilog/SystemVerilog. Execute digital design (RTL) for complex WLAN subsystems involving multiple clock domains and low-power designs. Integrate and deliver WLAN subsystems to SoC-level designs. Collaborate with verification, SoC design, validation, synthesis, and physical design (PD) teams. Perform tasks such as linting (Spyglass), CDC analysis, synthesis, and simulation. Conduct RTL integration and work closely with DFT and PD teams for design-to-GDS convergence. Analyze tool reports (RDC, CLP, CDC, PrimeTime) and ensure compliance with design standards. Contribute to post-silicon debug and validation, when required. Maintain effective communication with global multi-site teams (US, UK, and India). Create and maintain documentation for design and development processes. Skills and Experience: ASIC Front-End Design: 8+ years of experience in digital ASIC design, with expertise in RTL coding using Verilog, VHDL, or SystemVerilog. Clock Domain Crossing (CDC): Strong experience in handling multiple clock domains and low-power design methodologies. Tool Proficiency: Hands-on experience with Spyglass Lint/CDC checks, DC-Compiler, PrimeTime, synthesis, simulation, etc. Protocols: Familiarity with AHB, AXI, and other standard bus protocols. WLAN/Wireless IP Expertise: Experience in 802.11/Wi-Fi subsystems is a plus. Debugging: Exposure to post-silicon debug and validation is desirable. Collaboration: Ability to work closely with multi-disciplinary teams for holistic design and development. Documentation: Strong documentation and communication skills. Minimum Qualifications: Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related fields and 3+ years of relevant experience. OR Master s degree in the same fields and 2+ years of experience. OR Ph.D. and 1+ year of experience. Experience Requirements: Strong background in ASIC front-end design, architecture, and RTL integration. Prior experience in WLAN IP/Sub-system design is a significant advantage. Why Join Qualcomm? Work on cutting-edge technologies like Wi-Fi 6/7/8 and next-gen connectivity solutions. Collaborate with diverse teams across geographies. Opportunity to contribute to groundbreaking innovations shaping the future of connectivity. Be part of an inclusive and forward-thinking culture. Qualification : Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communcations or related field.
Modem Hardware Modeling, Senior Engineer
Qualcomm Technologies
General Summary The Wireless R&D HW team in Bangalore is seeking experienced Wireless Modem Hardware Model Developers to work on Qualcomm s industry-leading chipset solutions, specifically focusing on modem WWAN IPs. This role involves contributing to flagship modem core IP development for 5G (NR) and 4G (LTE) technologies. Roles and Responsibilities Modem Development: Contribute to defining and developing next-generation multi-mode 5G modems. Hardware Model Development: Develop and verify hardware models for modem core IP using C++/SystemC. These models serve as golden references for RTL verification and pre-silicon firmware development (virtual prototyping). Hardware Microarchitecture: Understand and abstract hardware microarchitectures for accurate modeling. Technology Application: Work on wireless technologies such as NR, LTE, WLAN, and Bluetooth to enhance modem functionality. Signal Processing: Leverage expertise in digital signal processing to improve hardware modeling and design processes. Cross-Domain Expertise: Candidates with backgrounds in SW/FW development or DSP-based HW IP design/verification will also be considered. Required Skills and Qualifications Programming Skills: Proficient in C++ with exposure to SystemC, System Verilog, and/or MATLAB. Hardware Microarchitecture: Strong understanding of hardware microarchitectures and modeling abstraction. Wireless Technology: Working knowledge of physical layers in NR, LTE, WLAN, and Bluetooth. DSP Expertise: Experience in digital signal processing and its applications in hardware modeling or RTL design/verification. Collaboration Skills: Ability to work effectively within a multi-functional team. Preferred Experience Hands-on experience with HW modeling, design, or verification of IPs. Experience with firmware/software development in wireless IP. Technical knowledge of DSP-based HW IPs. Educational Requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience. Master's degree with 1+ year of relevant work experience. PhD in a related field. Why Qualcomm? Leading Innovation: Be part of a team developing cutting-edge wireless modem solutions for next-generation technologies. Diverse Opportunities: Gain exposure to multiple domains, including DSP, firmware, and hardware design. Global Impact: Contribute to solutions that drive connectivity and transform industries worldwide. Professional Growth: Work with industry leaders on groundbreaking projects with significant career development opportunities. Qualification : Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related fields with 2+ years of relevant work experience.
Software Developer Wireless L1
Leadsoc Technologies
Technical Requirements: 1. LTE/3GPP Domain Expertise: Strong understanding of LTE (Long-Term Evolution) and 3GPP (3rd Generation Partnership Project) standards and technologies. Familiarity with cellular communication systems, particularly in the context of LTE and 5G technologies, and their physical layer operations. 2. Proficiency in C Programming: Extensive hands-on experience with C programming for system-level and embedded software development. Ability to write efficient, optimized code for baseband processing and modem development. 3. MATLAB/Simulink and LabVIEW Experience: Practical experience with MATLAB for modeling and simulating wireless communication systems. Proficiency in LabVIEW or similar tools for hardware testing, signal analysis, and system prototyping. 4. Physical Layer and Baseband Processing: Experience in physical layer operations such as modulation, demodulation, channel coding, and decoding. Expertise in baseband processing techniques used for signal manipulation, filtering, and error correction. 5. Forward Error Correction (FEC): In-depth understanding of Forward Error Correction (FEC) techniques like Turbo codes, LDPC (Low-Density Parity-Check) codes, and their implementation in wireless communication systems. Ability to integrate FEC algorithms to improve system performance and error resilience. 6. Experience with Wireless Communication Algorithms: Familiarity with key algorithms used in wireless communication such as: OFDM (Orthogonal Frequency Division Multiplexing) Channel coding Rate conversion Equalization Mapping Channel estimation Synchronization CFO (Carrier Frequency Offset) correction SCO (Symbol Clock Offset) correction 7. Wireless L1 Experience (LTE UE Modem/ENodeB): Hands-on experience with Wireless L1 (Layer 1) protocol stack in LTE UE Modem, ENodeB, or simulators. Exposure to the development, simulation, and testing of LTE UE Modem or ENodeB functionality. Experience in simulating and analyzing physical layer parameters in both UE and ENodeB environments. Expectations from the Role: 1. Learning and Application of Concepts: Ability and willingness to quickly learn new concepts and technologies related to wireless communications and apply them effectively in project work. Inclination towards continuous learning and staying updated with industry trends. 2. Independent Work and Accountability: Ability to work independently, take initiative, and demonstrate accountability for tasks and deadlines. Take ownership of assigned work and ensure delivery within agreed timelines with high quality. 3. Team Collaboration and Contribution: Strong team player with a collaborative approach to work within teams and contribute towards collective goals. Communicate effectively with team members to ensure smooth progress of project work. 4. Experience with SDLC and Agile Development: Understanding of the Software Development Life Cycle (SDLC), particularly the processes involved in the development, testing, and deployment of wireless communication systems. Familiarity with Agile Development methodologies and their application in wireless communications projects. 5. Technical Guidance and Mentorship: Ability to mentor and guide junior team members on technical aspects of the project, ensuring smooth knowledge transfer. Provide technical guidance on complex problems and help improve the team's overall technical expertise. 6. Development, Debugging, and Testing Tools: Proficiency with development, debugging, testing, and build tools typically used in wireless communications and embedded systems. Experience in writing test cases, performing unit testing, and using simulation tools for system validation. Ideal Candidate Profile: The ideal candidate will have solid expertise in wireless communication technologies, particularly in the LTE/3GPP domain, with hands-on experience in C programming, MATLAB, and LabVIEW. They should have a strong background in physical layer processing, including OFDM, forward error correction, and wireless protocol stack development. Experience in wireless L1 development for LTE UE Modem or ENodeB is a significant advantage. A passion for continuous learning, the ability to work independently while being an effective team player, and experience with SDLC and Agile development will be key to thriving in this role. Additionally, the candidate should be capable of mentoring team members and providing technical leadership.
Senior Big Data Engineer
Intel Technology India Pvt Ltd
Job Description Job Description:The Intel Foundry Manufacturing and Supply chain FMSC Automation team is looking for a highly motivated Big Data Engineer with strong data engineering skills for data integration of various manufacturing data. You will be responsible for engaging with customers and driving development from ideation to deployment and beyond. This position is a technical role that requires the direct design and development of robust, scalable, performant systems for world-class manufacturing data engineering.Responsibilities include:Create and maintain optimal data architectureAssemble large, complex data sets that meet functional and non-functional business requirementsIdentify, design, and implement internal process improvements: automating manual processes, optimizing data delivery, re-designing infrastructure for greater scalability, etc.Build the infrastructure required for optimal extraction, transformation, and loading of data from a wide variety of data sourcesWork with stakeholders including the users, cross functional teams to assist with data-related technical issues and support their data infrastructure needs.Standard process to keep data secure with right access and authorizationFocus on automated testing and robust monitoringThe ideal candidate must exhibit the following behavioral traits:Excellent problem solving and interpersonal communication skillsStrong desire to learn and share knowledge with others.Be inquisitive, innovative, and a team player with a strong focus on quality workmanship.Troubleshooting skills and root cause analysis for performance issuesAbility to lean, adopt and implement new skills to drive innovation and excellence.Ability to work with cross functional teams in dynamic environment Qualifications Minimum Qualifications: A bachelor's with 4+ years of experience in related field Experience building and optimizing big data pipelines Experience with skills pf handling unstructured data Experience with data transformations, structures, metadata, workload management Experience with big data tools: Spark, Kafka, NIFI, etc. Experience with at least programming languages: Python, C#, .NET Experience with relational SQL and NOSQL DBs Experience in leveraging open-source packages Experience in cloud native skills such as Docker, Kubernetes, Rancher etc. Good to have skills:Experience with semiconductor manufacturingExperience of data engineering on cloudExperience in developing AI/ML Solutions Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore s Law to bring smart, connected devices to every person on Earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : A bachelor's with 4+ years of experience in related field
Engineer - Distributed Control Systems (DCS)
Madox Technologies Pvt. Ltd
Engineer - Distributed Control Systems (DCS) Location: Bengaluru Experience: 0 - 1 Year Openings: 1 About the Role: As a DCS Engineer, you will report to the Assistant Manager Engineering Services. Your primary purpose will be to manage the complete product lifecycle for DCS applications, encompassing software application development, hardware programming, and crucial commissioning and testing activities. This is a hands-on technical role that requires both strong analytical skills and a readiness to travel. What You'll Do: DCS Software Development: Develop and program software applications for Distributed Control Systems, with a focus on ABB 800xA. System Configuration: Gain hands-on experience and apply your knowledge in Control Builder, PG2 Graphics, Communication Protocols, and AC800M Hardware. Commissioning & Testing: Lead and execute the programming, commissioning, and testing of 800xA systems on-site. Customer Support: Provide excellent customer handling and support for Factory Acceptance Testing (FAT), ensuring client satisfaction. Project Lifecycle Management: Take responsibility for the entire project lifecycle, from initial software development through to final commissioning. Travel: Be prepared to travel extensively to customer sites across India for commissioning activities. What We're Looking For: Educational Qualification: A Bachelor's degree in Electrical and Electronics Engineering (EEE), Instrumentation, Electronics, or Electronics & Communication. Experience: 0 to 1 year of experience in a relevant engineering role. Technical Skills: Strong knowledge and hands-on experience with ABB 800xA Software Development. Proficiency in Control Builder, PG2 Graphics, Communication Protocols, and AC800M Hardware. Demonstrated experience in the complete project lifecycle from software development to commissioning in ABB 800xA. Excellent analytical skills to troubleshoot and optimize systems. Software Proficiency: Strong knowledge of Microsoft Office, Excel, and PowerPoint. Communication: Good communication skills in English for effective internal and external interactions. Physical Requirements: Must be physically fit and willing to travel to customer locations across all regions of India.
Junior Engineer
Madox Technologies Pvt. Ltd
Junior Engineer - Distributed Control Systems (DCS) Location: Bengaluru Experience: 0 - 2 Years Openings: 1 About the Role: As a Junior DCS Engineer, you'll report to the Assistant Manager Engineering Services. Your primary purpose will be to support the complete product lifecycle for DCS applications, focusing on software application development, hardware programming, and crucial commissioning and testing activities. This is a hands-on technical role ideal for someone looking to build their expertise in industrial automation, requiring both analytical skills and a readiness to travel. What You'll Do: HMI Graphic Development: Develop and design Human-Machine Interface (HMI) graphics for DCS systems, ensuring intuitive and effective user interfaces. DCS Software Development: Assist with and learn to develop and program software applications for Distributed Control Systems, with a focus on ABB 800xA. System Programming & Commissioning: Participate in the programming, commissioning, and testing of 800xA systems on-site, gaining practical experience in live environments. Project Lifecycle Support: Support the team across the entire project lifecycle, from initial software development through to final commissioning. Travel: Be prepared to travel to customer sites across India for commissioning activities as needed. What We're Looking For: Educational Qualification: A Bachelor's degree in Electrical and Electronics Engineering (EEE), Instrumentation, Electronics, or Electronics & Communication. Experience: Candidates with 0-2 years of experience in industrial automation, control systems, or relevant project work will be considered. Technical Skills: Good analytical skills to understand and troubleshoot system functionalities. An understanding of the complete project lifecycle from software development to commissioning, especially in ABB 800xA, is highly beneficial. Willingness to learn and grow in a technical environment. Software Proficiency: Strong knowledge of Microsoft Office, Excel, and PowerPoint. Communication: Strong communication skills in English for effective internal and external interactions. Physical Requirements: Must be physically fit and willing to travel to customer locations across all regions of India. If you're a recent graduate or early-career engineer with a passion for DCS systems and eager to launch your career in industrial automation, we encourage you to apply! Qualification : A Bachelor's degree in Electrical and Electronics Engineering (EEE), Instrumentation, Electronics, or Electronics & Communication
Robotics Solution Engineer
Cynlr - Cybernetics H.i.v.e
Job Title: Robotics Solution Engineer Location: Bengaluru Key Focus Areas: The ideal candidate will have experience and expertise in 40-60% of the following domains: Task Development: Breaking down complex robotic tasks (e.g., pick, orient, place) and designing efficient workflows. Simulation and Validation: Using advanced physics-based simulation tools to model and validate robotic systems and interactions. System Integration: Seamless integration of hardware, software, and sensors tailored to customer environments. Customer-Centric Solutions: Customizing robotic solutions to fit specific customer requirements and constraints. Foundational R&D and ML Development: Supporting research and machine learning algorithm development to enhance robotic perception, autonomy, and decision-making. Roles and Responsibilities: Physics-Based Simulation Development: Develop comprehensive physics-based models for robots, environments, and their interactions. Create and validate dynamic models involving rigid body dynamics, contact physics, material properties, and compliance, especially for multi-arm robotic systems. Build and maintain digital twins of physical robots and real-world environments. Algorithm Development & Implementation: Design, implement, and validate control and motion planning algorithms for multi-arm robots, focusing on manipulation and grasping. Optimize kinematics, dynamics, and force-based control strategies for real-time robotic applications. Support learning-based algorithm implementation for real-time perception and manipulation, including simulation-based testing and validation. Machine Learning Applications: Apply machine learning techniques to robotic perception and decision-making. Implement learning-based algorithms for perception and manipulation tasks. Testing, Validation & Optimization: Develop protocols to validate simulation accuracy by bridging virtual and real-world performance. Create automated test sequences and metrics for robust validation across various scenarios. Analyze simulation results to enhance system performance, safety, and reliability, suggesting design improvements. Collaboration & Cross-Functional Support: Work closely with controls engineers to validate and tune control systems in simulation. Collaborate with algorithm, software, and hardware teams to refine systems and resolve issues. Provide insights from simulation analyses to guide product improvements. Documentation & Reporting: Document simulation approaches, assumptions, and validation outcomes clearly. Prepare detailed reports on system performance, testing results, and optimization opportunities. Skills and Experience: Core Expertise: Advanced physics-based modeling and numerical simulation techniques. Deep understanding of robot kinematics, dynamics, and control theory. Experience with simulation validation and verification methodologies. Sensor modeling for cameras, force/torque sensors, etc. Motion planning algorithm knowledge. Familiarity with machine learning frameworks (PyTorch, TensorFlow) and real-time control implementation. Software & Tools: Experience with physics simulation platforms like NVIDIA Isaac Sim/Omniverse, CoppeliaSim, Mujoco, PyBullet, PhysX, Gazebo, or equivalents. Proficient in Python and C++ for scripting and automation tasks. Comfortable integrating CAD software and managing version control with Git. Engineering & Analysis: Skills in system dynamics modeling and error analysis. Developing test plans and performing root cause analysis. Conducting feasibility studies and model validation. Required Qualifications: Bachelor s or Master s degree in Robotics, Mechanical Engineering, or related fields. Minimum 3 years of professional experience in robotics engineering, with a focus on simulation and modeling. Strong foundation in robot kinematics, dynamics, and control systems. Proficient in Python and C++ programming. Experience with physics engines (PhysX, Bullet, PyBullet) and validating simulation results with real-world data. Preferred Qualifications: Master s or PhD in Robotics, Computer Science, or a related discipline. Hands-on experience with NVIDIA Isaac Sim/Omniverse or similar simulation platforms. Background in computer graphics, sensor modeling, and digital twin technologies. Qualification : Bachelors or Masters degree in Robotics, Mechanical Engineering, or related fields.
Asic Engineer, Implementation
Meta Careers
ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.
Physical Design Engineer
Qualcomm
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm, a leading innovator in technology, is pushing the boundaries of possibility to drive the digital transformation and create a smarter, more connected future. As a Hardware Engineer at Qualcomm, you will play a key role in designing, optimizing, verifying, and testing a wide range of electronic systems. This includes everything from circuits, mechanical systems, digital/analog/RF/optical systems, and test systems, to FPGA and DSP systems. You will collaborate with cross-functional teams to develop solutions that meet performance requirements and launch world-class products. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 3+ years of experience in Hardware Engineering or a similar field. OR Master's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 2+ years of experience in Hardware Engineering or a related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field, with 1+ year of experience in Hardware Engineering or a related field. Experience: 7 to 10 years Key Responsibilities and Skills: Physical Design Expertise: Extensive experience with block-level physical design, including a strong understanding of the PnR cycle. Industry-Standard Tools: Proficiency in industry-standard physical design tools like ICC2 and Innovus. Signoff Tools: Solid understanding and hands-on experience with signoff tools such as PrimeTime, Redhawk, and Calibre. Technical Leadership: Ability to guide and mentor junior engineers, helping them resolve technical challenges effectively. Tools & Scripting: Experience with tools like ICC/Innovus, PrimeTime (PT), StarRC, Redhawk, and Calibre DRC/LVS. Proficient in scripting languages such as TCL and Perl.
Standard Cell Design Engineer (staff )
Arm Limited
Senior Custom Standard Cell Design Engineer Company Arm Location India Job Overview The Solutions Engineering Physical IP team at Arm is home to some of the industry s top experts in deep submicron circuit design. This role offers an exciting opportunity to work with the custom standard cell design engineering team, contributing to cutting-edge technologies. Your work will have a long-lasting impact, as these designs will power Arm s Solutions Engineering products across infrastructure, client, automotive, and IoT market segments. Responsibilities Develop Arm custom standard cells in leading-edge sub-3nm process technology nodes. Collaborate closely with physical design engineers to co-optimize circuit and layout for improved Performance, Power, and Area (PPA) in Arm cores integrated into world-class SoCs. Work with mask design teams to provide optimally tuned layouts. Characterize and model all standard library views. Validate standard cells using comprehensive QA flows across various EDA tools. Required Skills and Experience Bachelor s degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Master s degree in Electrical Engineering with 6+ years of relevant circuit design experience. Proven experience identifying, designing, and verifying cells to optimize core and SoC level PPA. Deep understanding of MOSFET electrical characteristics, transistor-level device physics, and PPA trade-offs, especially at 3nm and below technology nodes. Expertise in designing static circuits, including state-retaining elements such as latches and flip-flops. Hands-on experience with standard cell characterization, modeling, and QA processes. Experience with standard cell characterization tools and SPICE circuit simulators. Proficiency in scripting languages such as Perl or Python. Strong interpersonal skills, with a willingness to mentor and support team members. Demonstrated problem-solving ability, persistence, and creativity in tackling difficult technical challenges. Positive team-oriented attitude, showing respect for all team members. Motivation to continuously develop new skills and take on various responsibilities. Ability to analyze complex data sets and present conclusions effectively. Nice-to-Have Skills and Experience Experience leading engineering teams, including project management and risk communication. Exposure to physical design implementation flows and sign-off processes. What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace, Arm empowers every team member to grow, succeed, and make a meaningful contribution to the company's global success. #LI-KR2 Qualification : Bachelors degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Masters degree in Electrical Engineering with 6+ years of relevant circuit design experience.
Staff Engineer Sign Off
Arm Limited
Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.
Junior 5g Ran Developer
Tietoevry
Job Title: Junior 5G RAN Developer Location: Bengaluru, India Experience: 1 to 4 years Education: B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or equivalent. About Tietoevry At Tietoevry, we are committed to driving innovation in Wireless Telecommunications and shaping the future of connectivity. As part of our global R&D initiatives, we collaborate with industry leaders to develop state-of-the-art solutions for 5G networks. We foster an inclusive and collaborative environment, offering opportunities for growth, learning, and cutting-edge development in next-generation technologies. Role Overview As a Junior 5G RAN Developer, you will play a key role in the design, development, and testing of software components across multiple layers of the 5G NR protocol stack. You will work on gNodeB development, collaborating with global teams in an agile environment, delivering high-performance solutions for future wireless networks. Key Responsibilities Contribute to the development and verification of features within the 5G NR Radio Access Network (RAN), focusing on gNodeB. Develop Low-Level Design (LLD) and implement new features for 5G RAN software, ensuring compliance with 3GPP standards. Collaborate with cross-functional teams, including system integrators, to ensure smooth integration across different RAN components. Analyze and resolve complex issues, including log file analysis and debugging in live environments. Continuously work towards improving system performance and delivering high-quality solutions. Document development processes, test cases, and outcomes comprehensively for future reference. Mandatory Skills & Experience Hands-on experience in LTE/5G NR Layer-1, Layer-2, and Layer-3 protocol software development. Expertise in 3GPP specifications, particularly related to Layer-1, Layer-2, and Layer-3 protocols. Strong understanding of MAC Scheduler and Layer1-Layer2 and Layer2-Layer3 interfaces. Solid understanding of networking protocols such as TCP/IP, UDP, SCTP, etc. Proficiency in C/C++ programming, with experience in software debugging and troubleshooting complex RAN-related issues. Familiarity with Agile methodologies and hands-on experience with Jira and similar project management tools. Experience working with Git, Gerrit, or equivalent version control tools. Prior experience with cloud technologies (e.g., microservices, containers) is an added advantage. Strong communication skills, with the ability to work effectively in a global, multicultural environment. Work on pioneering 5G technology projects in a dynamic, collaborative environment. A global culture built on Nordic values transparency, low hierarchy, respect, and trust. Opportunities for ongoing learning and professional development in cutting-edge technologies. A supportive environment where innovation and work-life balance are actively encouraged. Inclusive workplace where diversity, equity, and inclusion are valued and celebrated. Diversity & Inclusion Commitment At Tietoevry, we believe that diversity drives innovation. We welcome applications from candidates of all backgrounds, genders (m/f/d), and walks of life, fostering an inclusive and inspiring work environment where everyone feels valued and empowered to contribute. Qualification : B.E./B.Tech./M.E./M.Tech. in Electronics & Communication (EC), Electrical Engineering (EE), Computer Science (CS), or equivalent.
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