Power Optimization Jobs in Bengaluru

Position: Application Engineer, Analog & Power Job Overview: We are seeking an Application Engineer specializing in Analog & Power to join our team. In this role, you will provide advanced engineering design services and support to the regional engineering team, with a focus on power electronics and analog engineering solutions. You will be responsible for hardware engineering support, including PCB design and review, electronic simulations, and laboratory analysis, all while ensuring compliance with industry standards and customer specifications. Key Responsibilities: Provide advanced engineering design and support for power electronics and analog systems, assisting the regional engineering team. Conduct hardware engineering tasks, including PCB reviews, electronic simulations, and using lab equipment such as PCBA rework tools and oscilloscopes for product development. Lead PCB design from initial concept (block diagrams) to part selection, schematics, layout, Gerber files, and prototype testing. Develop clear and concise technical documentation, such as whitepapers, technical reports, and internal training materials. Support the development and validation of reference designs to meet customer specifications. Ensure that all designs comply with relevant industry standards and customer specifications. Attend technical and sales training to stay up to date with current technologies and trends. Maintain accurate documentation of engineering designs and solutions for future reference. What We Are Looking For: Bachelor s Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field. At least 7 years of experience in electronics/semiconductors, power management, and analog product design. Strong technical expertise in power conversion topologies (DC-DC, AC-DC, DC-AC). Experience working with WBG (Wide Bandgap) devices such as SiC and GaN. Solid experience with electrical instrumentation, including Op-Amps, signal conditioning, sensors, and data acquisition systems. Familiarity with industry standards and compliance (e.g., IEC, UL, ISO) for high-power systems. In-depth understanding of EMI/EMC standards and mitigation techniques for high-power designs. Experience in reference design development, validation, and component optimization. Strong communication and interpersonal skills to collaborate effectively with internal teams and customers. A passion for innovation and a commitment to delivering high-quality engineering solutions. What s In It For You: Access to training and professional development opportunities. Performance coaching and growth support. The chance to work with a fun and supportive team. Opportunity to be part of a growing and strong company. Community involvement opportunities. About Arrow: Arrow Electronics, Inc. (NYSE: ARW), a Fortune 133 company and one of Fortune Magazine s Most Admired Companies, is a global leader in technology solutions. With 2023 sales of USD $33.11 billion, Arrow develops innovative technology solutions that improve business and daily life. Our broad portfolio helps customers create, make, and manage forward-thinking products that make technology accessible to more people. Location: Bangalore, India Employment Type: Full-time Job Category: Engineering and Technology Qualification : Bachelors Degree or higher in Electronics, Electrical Engineering, Computer Science, or a related field.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Job Summary: (Sr. Lead Engineer) Qualcomm Simulation platform team would be responsible for defining/prototyping/developing software s on the emulation platforms. Looking for an experienced BSP engineer for virtual platform, who can help us is developing virtual prototype software solution for snapdragon automotive products. Candidate must have an excellent understanding of the complex SoCs architecture & its Software stack. Education & Experience: Bachelor s/master s degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience. Primary Responsibility: Software (BSP) Bring-up on Virtual Platforms. Understand the emulation platform SoC architecture and develop single software solution. Ability to collaborate with cross functional teams and deliver the quality product under strict timeline. Define & develop custom virtio architectures. Pre-silicon software development platform prototype development Develop solution to improve performance of software running on Virtual platform. Supporting internal & external customers on Bring up & debugging from Software & emulation side. Mandatory Skills: Knowledge in Linux/QNX BSPs & Full Boot Chain. Strong System level programming skills in C/C++. Python, Rust is a plus. Excellent knowledge of OS fundamentals, Data structures, Linux kernel and its device driver model Strong debugging, analytical and problem-solving skills. Should have knowledge on debuggers like T32,gdb, etc., Strong collaboration skills with the ability to collaborate with multiple functional teams. Able to understand and debug large complex SW. Fair understanding of CPU (ARM), subsystems, SOC architecture and its SW-layers Fair understanding of the Virtual Machines with Type1 and Type2 Hypervisors Added Advantage: Fair understanding of QEMU/KVM platforms. Fair understanding of multimedia systems (GPU/Display/CAM/VPU/etc.,) knowledge. Fair knowledge of hardware-software interface and SystemC ASPICE and ISO26262 know how is preferred. Automotive experience is preferred. Qualification : Bachelors/masters degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience.

Software Engineer Power/Thermal Software Products Team Company Qualcomm India Private Limited Job Area Engineering Group > Software Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world-class products that meet and exceed customer needs. You will collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master s degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Languages such as C, C++, Java, Python, etc. Job Description Job Overview: The Power/Thermal Software Products Team at Qualcomm focuses on delivering industry-leading power, thermal, and limit software management solutions across Qualcomm s Mobile, Automotive, Compute, IoT, and AR/VR chipsets. In this role, you will work with cross-functional teams to: Identify power optimization and performance tuning opportunities. Perform thermal/limits hardware tuning, characterization, and risk assessment. Develop optimized solutions and mitigation strategies. Conduct system-level analysis of power/thermal use cases. Collaborate with Architecture, Hardware Design, Performance, Power/Thermal Systems, and various Software teams to create optimal system-level power/thermal software solutions. Develop tools and methodologies for competitive analysis to understand competitors strengths and weaknesses. Design and implement thermal mitigation schemes that are best in the industry. Preferred Qualifications 3+ years of experience with Programming Languages such as C, C++, Java, Python, etc. Strong systems/hardware background with a solid understanding of microprocessor architecture and common SoC hardware blocks (interconnects, display, graphics, etc.). Good understanding of operating system concepts including scheduling, memory management, process management, interrupt handling, and device drivers. Experience using debug tools such as JTAG debuggers, oscilloscopes, and logic analyzers. Experience developing power/thermal management software. In-depth knowledge of embedded systems, microcontrollers, SoC power, modems, multimedia, wireless communications, and system-level debugging/analysis for SoC power optimization. Equal Opportunity Employer Statement Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email [email protected] or call Qualcomm s toll-free number found on their website. Upon request, reasonable accommodations will be provided to support individuals with disabilities during the hiring process. Qualcomm is also committed to ensuring its workplace is accessible to individuals with disabilities. (Please note that this email address is exclusively for accommodation requests. Qualcomm will not respond to requests for application status updates or resume inquiries via this email.) Recruitment Policy Qualcomm s Careers Site is only for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies, as well as candidates represented by agencies, are not authorized to use this site to submit profiles, applications, or resumes. Any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies and is not responsible for any associated fees. Compliance Notice Qualcomm employees are expected to comply with all applicable policies and procedures, including but not limited to security requirements and protection of company confidential and proprietary information, in line with applicable laws. Qualification : Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.

CPU Performance Engineer Company Arm Location Bengaluru Job Overview At Arm, we are building the Future of Computing. Achieving generational performance gains requires deep understanding of the core, microarchitecture, system-level details, and the workloads that run on them. We are seeking a highly motivated and skilled engineer to drive analysis, characterization, and deep understanding of complex infrastructure workloads. This is a versatile and high-visibility role requiring collaboration with global teams including hardware architects, software engineers, and toolchain experts. Your work will help shape the next-generation CPU microarchitecture through comprehensive workload performance analysis. Responsibilities Perform performance analysis and characterization of complex infrastructure workloads to identify software and microarchitectural improvements for next-generation processors/systems. Analyze CPU performance, power, and cost while identifying key technology challenges and opportunities for innovation. Collaborate with Arm architects to develop technologies that contribute to maintaining a best-in-class compute systems roadmap. Develop expertise in the competitive landscape and emerging technologies in areas such as infrastructure, computer vision, and machine learning. Required Skills and Experience Strong knowledge and experience in CPU architecture and microarchitecture, gained through development, research, or performance analysis/modeling/design. Ability to break down workload performance into insights spanning software (applications, toolchain, libraries) and CPU/system microarchitecture. Proven ability to work effectively both independently and as part of geographically distributed teams across multiple functional groups. Innovative mindset with a strong drive to explore new approaches, influence stakeholders through detailed investigation, and solve challenging technical problems. Bachelor s or Master s degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis. Nice-To-Have Skills and Experience Experience in CPU performance analysis and/or modeling. Background in workload analysis, characterization, and/or optimization of open-source software. Understanding of CPU infrastructure architectures and system-level constraints. Hands-on experience with advanced CPU techniques such as branch prediction and prefetching. Comfort working with emerging technologies and staying current with research advancements. Track record of influencing product roadmaps and delivering innovative solutions through prototypes and empirical analysis. What Arm Offers Arm provides an exceptional collaborative environment, offering exciting challenges and career growth opportunities. If you are interested but feel you don t meet every requirement, we encourage you to apply we value diverse skills and innovative thinking! #LI-KR2 Qualification : Bachelors or Masters degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis.

Job Title: RTL Design Engineer Job Description: Join Intel s Design Team and contribute to the development of high-quality Intel products. In this role, you will work on RTL tool flow methodologies, leveraging industry-standard design tools and scripting environments such as Perl and Python to enhance design automation and optimization. Key Responsibilities: Work on digital design concepts and RTL design using Verilog. Develop and implement RTL tool flow methodologies to optimize design efficiency. Utilize industry-standard design tools to enhance digital design workflows. Develop scripts using Perl and Python to automate design processes. Apply computer architecture knowledge to drive innovations in design methodologies. Qualifications & Requirements: Educational Qualifications: Master s (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions. Technical Skills & Experience: Strong understanding of digital design concepts and computer architecture. Experience with RTL design using Verilog. Proficiency in scripting languages such as Perl and Python for automation. Familiarity with industry-standard design tools and RTL tool flow methodologies. About the Client Computing Group (CCG): The Client Computing Group (CCG) at Intel leads the development of PC products and platforms, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. By collaborating with industry partners, CCG delivers cutting-edge computing experiences that enable users to create, connect, and innovate. As Intel s largest business unit, CCG plays a pivotal role in driving technological advancements and product innovation. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development and career growth opportunities. Qualification : Masters (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

Job Title: Power Optimization & Performance Engineer Windows Platforms Job Description: Intel is seeking a Power Optimization & Performance Engineer to drive power efficiency and responsiveness enhancements across Windows platforms. The role involves deep analysis of software workloads, power-performance tuning, and debugging complex system-level issues to optimize Intel s laptop and desktop platforms. The engineer will work closely with platform architects and cross-functional teams to define power-performance metrics, develop battery life improvement strategies, and drive forward-looking technology readiness initiatives. Key Responsibilities: Power & Performance Analysis: Perform in-depth analysis of software flows at the trace, thread, and process ID levels to identify power optimization opportunities and performance bottlenecks. Platform Power Optimization: Leverage state-of-the-art analysis tools to identify and resolve battery life and performance issues in domains such as Graphics, Multimedia, Display, Imaging, and CPU. Technical Leadership & Troubleshooting: Diagnose complex system-level power and performance issues, demonstrating strong debugging expertise in Windows-based Intel platforms. Cross-Team Collaboration: Work with platform architects and engineers to define power-performance metrics, optimize power delivery across SoC components, and influence next-generation platform architectures. Windows OS & Driver Optimization: Identify and drive power savings features or performance tuning opportunities into current and next-gen Intel platforms. Collaborate with OS and driver teams for power-aware enhancements. Future Technology Readiness: Analyze expected vs. actual platform behavior, propose forward-looking enhancements, and influence SoC and Windows OS architectures. Qualifications & Experience: Educational Requirements: B.Tech/M.Tech in Electronics or Computer Engineering or related fields. Technical Expertise: Embedded Systems & Software Development: Experience in software/firmware development, integration, or validation. Platform Power Management: Understanding of CPU/SoC architecture, power delivery, sensors, memory, storage, display, multimedia, and imaging subsystems. OS & System Debugging: Strong grasp of Windows OS fundamentals, system-level debugging, and exposure to firmware & device drivers. Windows Debug Tools: Experience with Windows Driver Debugging and Windows Debug tools (preferred). Power & Performance Optimization: Hands-on experience with power-performance measurement, analysis, and benchmarking. Analytical & Problem-Solving Skills: Ability to troubleshoot complex system issues and propose efficient power-saving techniques. Excellent Communication & Collaboration: Strong ability to interact across teams and drive technical discussions. About Intel s Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-ones. As Intel s largest business unit, CCG is dedicated to enhancing PC experiences, fostering innovation, and delivering market-leading computing solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a highly competitive compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.Tech/M.Tech in Electronics or Computer Engineering or related fields.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

We are looking for a System Software Architect Programmable Vision Accelerator. As the market leader in deep learning and parallel computing, NVIDIA is seeking an expert system software architect to lead the design and implementation of firmware and driver stack for NVIDIA's Programmable Vision Accelerator (PVA) engine in the Tegra SoC platform. As a Software Architect, you will join a team of software engineers to create and evolve an essential part of the software stack responsible for scheduling and execution of highly optimized computer vision and machine learning kernels for specialized DSP hardware. You will use your design abilities, coding expertise, and creativity to help deliver innovative real-time firmware and kernel mode drivers for a low power, high performance computer vision accelerator engine. You will be architecting and developing new features and improvements to realize the groundbreaking potential of NVIDIA mobile systems, ranging from self-driving cars, intelligent video analytics and autonomous mobile robotics. You will need to demonstrate excellent technical leadership, communication, interpersonal, and analytical skills as well as a real passion for performance-oriented software engineering. If this sounds like a fun challenge, we want to hear from you! What you will be doing: Evolve and define software architecture for future NVIDIA's Programmable Vision Accelerator (PVA) chips and enhance the functionality of currently shipping products. Design and write custom embedded software for PVA engine to meet product and hardware requirements at the SoC level. Help defining forward-looking strategy and improvements to the PVA algorithms and system architecture. Review hardware specifications and map algorithms to the architecture. Participate in the bring-up of the new generation of the world's most advanced SoC. Collaborate closely with other teams and software/hardware architects across NVIDIA to support the architecture, design, creation, integration, and validation of PVA software under a common SoC umbrella. Provide technical support and guidance for internal and external customers. Mentor and guide technical development of the less experienced team members What we need to see: College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience 10+ years of working experience in embedded industry, including 5+ years in technical leadership role Deep understanding of SoC principles, general systems architectures, operating systems, device drivers, memory management, multithreading, and real-time scheduling. Deep understanding and working experience with embedded technologies including DSP, computer vision and image/signal processing. Excellent software development skills (C, C++) and outstanding problem-solving capabilities. Proven expertise in architecting embedded software and development of highly optimized code for DSP, SIMD and/or VLIW processors Experience with embedded Linux and/or QNX. Outstanding interpersonal skills with ability to work in a global and diverse team operating in a fast-paced environment. Good understanding of safety-critical software principles with experience in automotive or other highly regulated industries Ways to stand out from the crowd: Experience with ISO 26262 and IEC 61508 or equivalent quality/safety processes. Understanding of software safety and safety development processes is a major plus. Consistent record to effectively guide and influence in a technically strong dynamic environment. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking people in the world working for us. If you're creative and autonomous, we want to hear from you. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for great people like you to help us accelerate the next wave of artificial intelligence. Qualification : College degree (preferably PhD or MS) in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)

Experience Level: 4+ years (Bachelor s), 3+ years (Master s), or 2+ years (PhD) Preferred Domains: Embedded Systems, Mobile, IoT, Automotive General Summary: We are seeking a highly skilled Systems Engineer with experience in post-silicon validation, system modeling, and power-performance optimization. The ideal candidate will work on cutting-edge embedded systems with a focus on CPU, GPU, and AI workload performance. This role offers an opportunity to collaborate with cross-functional teams to optimize SoC performance and contribute to next-generation product innovations. Preferred Qualifications: Experience in as many of the following areas is desirable: Embedded Systems & Mobile/IoT/Auto Domains: Hands-on experience with complex embedded systems and SOC performance. Post-Silicon Validation: System validation, performance analysis, and feedback to influence future product development. Power & Performance Analysis: Analyzing power-performance data for various CPU, GPU, and AI workloads/benchmarks. System Modeling & Profiling: Expertise in power/performance use cases, SOC profiling, PPA tradeoffs, and product qualification. CPU Microarchitecture: Knowledge of cache, latency, bandwidth analysis, and optimization. Linux/Android Kernel Development: Experience with device driver development, Android architecture, and system programming. Power Optimization: Experience with DVFS/DCVS governors and power management at the system level. Hands-On Lab Experience: Familiarity with DAQs, oscilloscopes, JTAG, ARM Developer Studio, and power data acquisition. Automation & Scripting: Proficiency in Python, shell scripting, ADB shell, and automation environments for Linux/Android systems. Collaboration & Leadership: Ability to work with internal teams and external partners for analysis and optimization. Acts as a tech lead and provides guidance to engineering teams. Tools & Version Control: Exposure to Git, Jira, Android, and QTI tools. Key Responsibilities: Perform post-silicon validation of SoC performance and architecture. Analyze and optimize power-performance trade-offs in collaboration with architecture teams. Develop and enhance tools to assist in performance analysis and workload characterization. Drive power and performance optimization for CPUs, GPUs, and AI workloads. Provide technical leadership and guide teams on system-level optimization and validation. Collaborate with internal and external teams to achieve performance goals. Minimum Qualifications: Bachelor s degree in Engineering, Information Systems, Computer Science, or a related field and 4+ years of relevant experience. Master s degree in Engineering, Information Systems, Computer Science, or a related field and 3+ years of relevant experience. PhD in Engineering, Information Systems, Computer Science, or a related field and 2+ years of relevant experience. Skills: Strong understanding of computer architecture and OS fundamentals. Excellent communication and presentation skills. Ability to manage tasks independently and work in a fast-paced environment.

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

SolarEdge (NASDAQ: SEDG), is a global leader in high-performance smart energy technology, with over 4000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. Our R&D division is growing globally, as a IoT/IoE Firmware Engineer, you will be a crucial member of the SolarEdge India R&D team in Bangalore, responsible for developing embedded systems and firmware for our advanced solar energy products. You will play a key role in designing, implementing, and testing embedded software, ensuring its reliability, performance, and seamless integration with our hardware platforms. Responsibilities: Design, develop, test and maintain code for modern embedded Linux based IOT devices, both in low level and system level development. Collaborate with cross-functional teams, including Embedded firmware/hardware engineers, software developers, and product managers, to define system requirements and architect innovative embedded solutions. Develop and deploy secure, scalable, and reliable IoT/IoE architectures. Interface with sensors, actuators, and microcontrollers, Collect, process, and analyze sensor data using advanced tools Develop and implement efficient and reliable embedded software in C and C++ for Embedded Linux system used in SolarEdge products" Troubleshoot and debug embedded software and hardware interactions, identifying and resolving issues throughout the product development lifecycle. Participate in code reviews, providing constructive feedback to team members and ensuring code quality and adherence to coding standards. Job Requirements Bachelor's (B.E./B.Tech.) or master s degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field. 2+ years of experience in IoT/IoE embedded systems design and firmware development. Strong programming skills in both C and C++ Experience with Python is desirable. Proven experience in building complex, high-performance systems and applications. Proficiency in using modern development tools and version control systems (e.g., Git, Docker) Experience in user space application development in Linux Ability to identify, troubleshoot hardware and software technical problems. Strong debugging and Analytical thinking, problem-solving skills Excellent communication and teamwork skills to collaborate effectively with cross-functional teams. Experience in the renewable energy or power electronics industry is an added advantage. Provide technical support and troubleshooting assistance during product development. Stay up to date with the latest advancements in power electronics and firmware technologies. Drive results within constraints of Product life cycle development and production at scale. Results-oriented mindset with a focus on achieving tangible and measurable results. SolarEdge recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people. SolarEdge is committed to seeking out and retaining the finest human talent to ensure top business growth and performance. Qualification : Bachelor's (B.E./B.Tech.) or masters degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

Job Description The Client Development Group (CDG) is looking for Physicial Design Engineers with following Responsibilities - Creates bottoms up elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction and schematic layout verification. Debug using phases of physical design development including parasitic extraction ,clock generation, custom polygon editing, auto place and route algorithms, floor planning, full chip assembly, RV DFM Density and verification. Troubleshoots design issues and applies proactive intervention. May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments. Qualifications You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing. Experience, Skills, Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs. Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan. Ability to comprehend issues of RC delay electromigration, selfheating and cross capacitance. Ability to recognize failure prone layout structures and proactively contact engineers for guidance and produce electrically robust layout. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Other Locations IN, Hyderabad Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel Qualification : You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing.

Engineer will be working on Embedded Firmware which involves feature development, integration, and bug fixing and maintenance. Experience in embedded architecture, external interfaces, product constraints, along with ability to develop architectures/features that meet these constraints while providing new value for the platform. Strong Experience in C\C++ Strong Experience in embedded Systems Strong Experience in RTOS System level design Experience in low level programming in ARM or ARC architecture Experience in debugging Embedded system software with Innovative techniques Experience in capturing and debugging based on HW Signals. Experience in Requirement understanding and designing solution with good presentation skills.Add-on:- Experience in USB Protocol- Experience in PCI System flows- Experience in Bluetooth Controller / Host protocols( BR\EDR) and Bluetooth Low Energy- Exposure to Python scripting.- Agile and scrum practices Qualifications Bachelor's or Master s degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience. Proven experience in Embedded system software / Firmware development in RTOS environment with strong system knowledge in understanding the requirements and making the design, development and deployment in embedded products. Solid understanding of software development life cycle (SDLC) and Agile methodologies. Excellent problem-solving skills and attention to detail. Strong written and verbal communication skills. Experience in maintaining and managing codebases, ensuring high standards of code quality. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Qualification : Bachelor's or Masters degree in computer science, Electronics and communication Engineering or a related field with 4 years of experience.