RTL Coding Jobs in Bengaluru

Software Development Engineer III Location: Bengaluru About Us: Observe.AI Observe.AI is a leading AI-powered platform revolutionizing customer experience. We enable enterprises to deploy AI agents that automate customer interactions, creating natural conversations and delivering predictable outcomes. Combining advanced speech understanding, workflow automation, and enterprise-grade governance, our platform empowers teams to guide and augment human agents with AI copilots, and analyze 100% of both human and AI interactions for insights, coaching, and quality management. Companies such as DoorDash, Affordable Care, Signify Health, and Verida rely on Observe.AI to accelerate service speed, increase operational efficiency, and strengthen customer loyalty across all communication channels. At Observe.AI, you will be building the backend that powers AI agents, transforming customer service for global enterprises. You'll work on high-scale, complex systems where your contributions have a direct and visible impact. In a culture that emphasizes speed, innovation, and ownership, this is your chance to sharpen your skills, drive forward innovation, and shape the future of AI-powered customer experiences. You will collaborate closely with product, design, and engineering leaders to define the technical roadmap and build solutions that matter. If you are looking for an environment where your ideas drive innovation, your expertise shapes the platform s future, and your growth is fueled by working with brilliant peers, Observe.AI is the place for you. What You ll Be Doing: AI Agent Development: Contribute to building and deploying AI agents (Voice Agents, Chat Agents, and Copilots) at enterprise scale for customer service. Full Application Lifecycle: Design, code, test, deploy, and debug applications with a high focus on quality throughout the entire lifecycle. Collaborative Roadmap Creation: Work with product and design teams to translate product goals into clear, actionable technical roadmaps. Reusable Code Development: Create reusable code, frameworks, and libraries to accelerate development, ensuring consistency across multiple projects. Optimization: Optimize applications for speed, scalability, and reliability, proactively addressing bottlenecks and performance issues. Security & Data Protection: Implement robust security measures and data protection practices to safeguard customer data and sensitive information. Scalable Data Storage: Design and manage scalable data storage solutions to ensure efficiency, reliability, and long-term maintainability. Efficient Data Pipelines: Build and scale data pipelines to process large volumes of data accurately and efficiently. Team Leadership: Review work of other team members, provide feedback, and lead by example across all aspects of the development lifecycle. Thought Leadership: Represent Observe.AI at tech conferences, demonstrating thought leadership and presenting solutions to complex challenges. What You ll Bring to the Role: 6-9 years of experience in building large-scale products with a strong track record of delivering high-quality solutions. Expertise in Python (with immediate proficiency), and familiarity with other high-level languages such as Java, Golang, or similar. Solid experience with SQL or NoSQL databases (e.g., Postgres, MongoDB, Cassandra). In-depth knowledge of asynchronous communication tools like Kafka, SQS, Temporal, etc. Understanding of popular caching tools such as Ehcache, Memcache, Redis. A customer-first mindset with the ability to adapt quickly in a fast-paced environment. Strong problem-solving skills and the ability to think and communicate from first principles. Open-mindedness to learning new technologies and staying current with industry trends. Perks & Benefits: Medical Insurance: Comprehensive medical coverage with free online doctor consultations. Leave Policies: Generous leave options, including privilege and sick leave as per Karnataka S&E Act, national and festive holidays, and parental leave. Learning & Development: A dedicated fund for continuous learning and professional development. Flexible Benefits: Tax-saving benefits (e.g., meal cards, PF, etc.) and flexible benefit plans. Team Culture: Regular fun events to promote collaboration and build company culture.

Job Title: Specialist Software Engineering Location: Bengaluru Type: Full-Time Level: Senior Engineer About BetaNXT BetaNXT is redefining connected wealth management infrastructure with next-gen, real-time data solutions that streamline operations, enhance advisor productivity, and elevate the investor experience. By combining the strength of our trusted platforms Beta, Maxit, and Mediant we deliver flexible, scalable solutions that anticipate the evolving needs of the wealth management industry. We help firms transform legacy systems into strategic assets, enabling enterprise scale, cost efficiency, and accelerated growth. About the Role We are looking for a Specialist Software Engineering to join our Product Engineering team. This is an exciting opportunity for an experienced and technically driven engineer passionate about enterprise integration, legacy modernization, and building mission-critical systems. You ll play a key role in developing complex software solutions, collaborating with architects and cross-functional teams, and helping shape the next generation of our platform. Key Responsibilities Lead the design, development, and enhancement of complex software components and systems. Collaborate with Solution Architects and other stakeholders to define scalable, efficient solutions. Develop and maintain both new features and legacy systems in alignment with business and technical requirements. Conduct unit and integration testing to ensure software quality and compliance. Perform code reviews, provide feedback, and mentor junior engineers. Contribute to architectural discussions, risk assessments, and solution planning. Participate in Agile planning, providing effort estimates and technical inputs. Maintain clear, detailed technical documentation to support future maintenance and development. Provide regular progress updates, and support production systems and on-call rotations when needed. Drive knowledge sharing and help build technical capability across the team. Qualifications & Experience Must-Have 7+ years of experience in Enterprise Application Integration and Mainframe Technologies. Deep expertise in COBOL, JCL, CICS, DB2, VSAM, including CICS Web Services and Transaction Server 3.1. Experience with integration technologies: IBM Integration Bus (IIB 10) IBM App Connect Enterprise (ACE 12) IBM MQ Series, IBM DataPower Proficiency with mainframe tools: TSO, File-Aid, Syncsort, Platinum, Abend-Aid, Mainview Familiarity with JCL utilities and version control systems such as ChangeMan. Understanding of performance tuning metrics: CPU usage, response time, network latency, etc. Proven experience working in Agile/SCRUM teams. Strong analytical thinking, collaboration, and communication skills. Good to Have Exposure to modern DevOps practices, GIT, or CI/CD pipelines. Master s degree or relevant professional certifications. Work on high-impact platforms powering the wealth management industry. Be part of a modernization journey transforming legacy infrastructure into future-ready systems. Collaborate with cross-functional, global teams in a fast-paced and inclusive environment. Grow within a company that values technical excellence, innovation, and continuous learning. Qualification : Masters degree or relevant professional certifications

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Intern - Software Engineer Location: Bengaluru, India Experience: 0 - 1 Year Qualification: Bachelor s degree in Computer Science, Engineering, or related field Job Type: Internship / Full-time About VuNet VuNet is a pioneering company in Business Journey Observability, using Big Data and Machine Learning to optimize digital experiences in financial services. Their platform monitors billions of transactions monthly and supports leading banks in India and MEA. Accelerated hands-on learning with cutting-edge technologies Meaningful work impacting banking and payments industries Mentorship from experienced tech leaders Fast-paced, collaborative, and innovative culture Roles & Responsibilities Contribute to full product development lifecycle in agile teams Collaborate with product, design, QA, and business stakeholders Participate in design, architecture, coding, testing, and deployment of scalable systems Work with technologies like React, TypeScript, Python/Django, Golang, Java, Kafka, Kubernetes, Big Data tools, and Cloud platforms Adopt best practices including code reviews, unit testing, CI/CD, and DevOps What You Bring Strong programming and problem-solving foundation Interest or exposure to JavaScript/TypeScript, Flutter, Python, Golang, Java, or Rust Bonus: familiarity with Linux, databases, Docker, Kubernetes, or AWS/GCP/Azure Self-driven, curious, and eager to learn What VuNet Offers A chance to work on a world-class, Made-in-India observability platform A culture of innovation, collaboration, and continuous learning Opportunity to make a real-world impact with emerging technologies like Gen AI Qualification : Bachelors degree in Computer Science, Engineering, or related field

Software Engineer Location: Bengaluru, India Team: Software Engineering Company: Dell Technologies Role Overview As a Software Engineer, you will contribute to designing and developing innovative software systems that meet evolving customer and business needs. You will participate in full-cycle development requirements, design, coding, testing, and deployment working on sophisticated platforms and technologies. Key Responsibilities Analyze and review software/storage requirements and specifications. Draft and interpret task specifications from verbal or written business requirements. Apply standard software lifecycle methodologies (Agile, CI/CD, etc.). Implement and support test strategies for robust software products. Write, debug, and enhance moderately complex programs. Essential Requirements 2 5 years of hands-on experience in software engineering. Strong knowledge in programming (C/C++/Java/Python, etc.) and debugging. Understanding of system software components like OS, firmware, BIOS, and device drivers. Familiarity with server, storage, and networking concepts. Ability to work on moderately complex systems with minimal supervision. Desirable Qualifications Bachelor s degree in Computer Science, Engineering, or related field. Exposure to embedded systems, tools, or utility development. Dell Technologies fosters a collaborative environment where innovation and impact are central to every role. You'll have the opportunity to work on cutting-edge products and contribute to the future of enterprise and client technologies, with the support of world-class teams. Qualification : Bachelors degree in Computer Science, Engineering, or related field.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

Job Title: Software Development Engineer - 2 Location: Bangalore (On-site; full-time) About Locus: At Locus, we are redefining logistics decision-making with deep-tech solutions that drive efficiency, consistency, and transparency across industries like retail and FMCG/CPG. Founded in 2015 by Nishith Rastogi and Geet Garg, Locus has evolved from a women s safety geo-tracking app into a globally recognized logistics optimization platform. Our technology has empowered enterprises such as Unilever and Nestl to execute over a billion deliveries across 30+ countries. Guided by our commitment to innovation and sustainable growth, we transform complex supply chains into strategic growth enablers. Join us at Locus and be part of a team shaping the future of global logistics. Job Overview: About the Role: As an Software Development Engineer -2, Backend Engineer at Locus, you will play a pivotal role in building robust, scalable, and high-performance backend systems. You will be at the forefront of designing solutions that can handle millions of transactions, ensuring reliability, security, and innovation across our products. Key Responsibilities: System Design: Architect scalable backend services and APIs, focusing on low-latency and high-throughput systems. Core Development: Build, test, and deploy features using Java, ensuring code quality and maintainability. Performance Optimization: Analyze and optimize application performance and scalability by addressing bottlenecks and implementing efficient algorithms. Database Management: Design, query, and maintain complex databases (relational and NoSQL), ensuring data consistency and availability. Integration: Collaborate with frontend and data teams to integrate backend services seamlessly. Ownership: Take end-to-end responsibility for assigned modules or features, from requirements gathering to production deployment and monitoring. Security: Implement robust security practices to safeguard systems and user data. Code Reviews: Conduct thorough peer reviews to maintain coding standards and share knowledge within the team. Mentorship: Guide junior engineers, fostering a culture of learning and innovation. Skills and Qualifications: Core Expertise: Proficiency in Java and frameworks like Spring Boot. Database Knowledge: Experience with MySQL, PostgreSQL, or similar, along with hands-on knowledge of NoSQL solutions like MongoDB or Cassandra. Cloud Experience: Familiarity with AWS, Azure, or GCP for deployment and infrastructure management. Tooling: Experience with CI/CD pipelines, version control systems (Git), and monitoring tools like Prometheus or Grafana. Problem-Solving: Strong analytical skills with a focus on algorithms, data structures, and system design. Collaboration: Ability to work closely with cross-functional teams and adapt to a fast-paced environment. Education: Bachelor's or Master s degree in Computer Science, Engineering, or a related field. Join Locus and become part of a visionary team that is redefining logistics through innovation and smart distribution. We provide competitive compensation, comprehensive benefits, and a collaborative environment where your expertise will drive both your growth and that of the organization. Locus is an equal opportunity employer dedicated to creating a diverse and inclusive workplace.

Company Overview Intuit is a global leader in financial technology, powering prosperity for individuals and communities through innovative products like TurboTax, Credit Karma, QuickBooks, and Mailchimp. Serving over 100 million customers worldwide, we believe in providing everyone with the opportunity to thrive. Our goal is to continuously develop groundbreaking solutions to make financial success achievable for all. Job Overview Key Responsibilities Platform Development: Architect and develop web, mobile apps, prototypes, or proofs of concepts for the VEP platform that enable effective conversations between users and experts. Leadership: Lead a small team, guiding them to solve challenging design and programming problems. Serve as the technical subject matter expert and mentor fellow engineers. Coding and Design: Spend 40-60% of your time hands-on coding while also generating technical documentation, communicating design options to stakeholders, and conducting presentations to educate teams and business users. Collaborative Development: Work cross-functionally with product management, QA/QE, and business units to ensure timely results and effective implementation of features. Troubleshooting: Resolve defects and bugs during various stages, including QA testing, pre-production, production, and post-release patches. Agile Practices: Contribute to an Agile environment, helping to iterate and improve our products while maintaining a focus on quality and efficiency. Qualifications 8+ Years of Experience: Experience designing and developing software for web and mobile applications. Leadership Expertise: Strong experience leading teams, presenting, and providing cross-functional leadership to drive technical success. Technical Skills: Proficiency in Object-Oriented Programming (OOD) languages such as Java/J2EE, C#, VB.NET, Python, or C++. You should also be comfortable with the Software Development Life Cycle (SDLC). Web Services Experience: 3+ years of experience with web services (REST/SOAP). Testing Skills: Expertise in unit testing and Test Driven Development (TDD) practices. Strong Communication: Excellent ability to explain complex technical issues to both technical and non-technical stakeholders. Strategic Thinking: Ability to develop strategic plans and align with business objectives while building strong, effective teams. Education: BS/MS in Computer Science or a related field, or equivalent work experience. At Intuit, you'll work on cutting-edge technology and be part of a forward-thinking team, shaping the future of financial technology. If you re looking for an opportunity to lead innovative projects, develop transformative products, and work in a dynamic, collaborative environment, we invite you to apply! Join us at Intuit to make a real difference in the lives of millions! Qualification : BS/MS in computer science or equivalent work experience

Senior Engineer - Product and Platform Engineering (Healthcare) About the Role: We are seeking a highly motivated and experienced Senior Engineer to join our Product and Platform Engineering team within the Healthcare domain. This role requires 6-10 years of experience and a strong background in leading the design, development, and implementation of scalable solutions using Angular, Node.js, and TypeScript. The ideal candidate will collaborate on high-quality UI/UX interfaces and microservices, architect and implement microservice-based solutions, drive agile methodologies, provide technical leadership, and mentor junior team members. Effective communication with stakeholders, evaluating and enhancing engineering processes, troubleshooting technical issues, and ensuring data security are also key responsibilities. Responsibilities: Lead the design, development, and implementation of scalable and efficient product and platform solutions using Angular, Node.js, and TypeScript. Collaborate with cross-functional teams to define and deliver high-quality UI/UX interfaces and microservices. Architect and implement microservice-based solutions, ensuring adherence to best practices and standards. Drive the adoption of agile and scrum methodologies for project management and delivery. Provide technical leadership and mentorship to junior team members. Communicate effectively with stakeholders to gather requirements, provide project updates, and ensure alignment on project goals. Continuously evaluate and improve the product and platform engineering processes, leveraging microservice architecture principles. Stay abreast of industry trends and technologies to enhance the product and platform offerings. Troubleshoot technical issues, optimize system performance, and ensure data security and integrity across the platform. Qualifications: Bachelor of Technology (B.Tech) in Computer Science Engineering or Master of Computer Applications (MCA). 6-10 years of extensive experience in AngularJS, Angular, TypeScript, Node.js, UI development, and Microservices. Proficiency in AngularJS and Angular for front-end development. Proficiency in TypeScript for type-safe coding. Proficiency in Node.js for server-side development. Expertise in Microservices architecture for scalable and modular application design. Experience leveraging these technologies to create responsive and dynamic user interfaces, implement robust back-end solutions, and design scalable microservices. Preferred Qualifications: Experience with microservice architecture. Experience with Agile/Scrum methodologies. Strong communication skills. Understanding of UI design principles. AWS Certified Solutions Architect certification. Google Professional Cloud Developer certification. About Altimetrik: Altimetrik delivers outcomes for our clients by rapidly enabling digital business & culture and infusing speed and agility into enterprise technology and connected solutions. We are practitioners of end-to-end business and technology transformation. We tap into an organization s technology, people, and assets to fuel fast, meaningful results for global enterprise customers across financial services, payments, retail, automotive, healthcare, manufacturing, and other industries. Founded in 2012 and with offices across the globe, Altimetrik makes industries, leaders and Fortune 500 companies more agile, empowered and successful. Altimetrik helps companies get unstuck . We re a technology company that gives organizations a process and context to solve problems in unconventional ways. We re a catalyst for organizations talent and technology, helping teams push boundaries and challenge traditional approaches. We make delivery more bold, efficient, collaborative and even more enjoyable. Qualification : Bachelor of Technology (B.Tech) in Computer Science Engineering or Master of Computer Applications (MCA).

Job Title: RTL Design Engineer Job Description: Join Intel s Design Team and contribute to the development of high-quality Intel products. In this role, you will work on RTL tool flow methodologies, leveraging industry-standard design tools and scripting environments such as Perl and Python to enhance design automation and optimization. Key Responsibilities: Work on digital design concepts and RTL design using Verilog. Develop and implement RTL tool flow methodologies to optimize design efficiency. Utilize industry-standard design tools to enhance digital design workflows. Develop scripts using Perl and Python to automate design processes. Apply computer architecture knowledge to drive innovations in design methodologies. Qualifications & Requirements: Educational Qualifications: Master s (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions. Technical Skills & Experience: Strong understanding of digital design concepts and computer architecture. Experience with RTL design using Verilog. Proficiency in scripting languages such as Perl and Python for automation. Familiarity with industry-standard design tools and RTL tool flow methodologies. About the Client Computing Group (CCG): The Client Computing Group (CCG) at Intel leads the development of PC products and platforms, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. By collaborating with industry partners, CCG delivers cutting-edge computing experiences that enable users to create, connect, and innovate. As Intel s largest business unit, CCG plays a pivotal role in driving technological advancements and product innovation. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development and career growth opportunities. Qualification : Masters (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

General Summary: Qualcomm CDMA Technologies (QCT) is the world s largest provider of wireless chipset technology, leading the way in 5G and Wi-Fi advancements. As an inventor-driven company, Qualcomm is committed to transforming industries and creating new possibilities through groundbreaking connectivity technologies. Qualcomm is currently seeking experienced WLAN Digital Designers for its Wireless R&D team in Bangalore. This role will involve designing next-generation WLAN chipsets and Wi-Fi subsystems, including Wi-Fi 6, 7, and 8 technologies. As part of the QCT Bangalore Wireless R&D HW team, you will be involved in sub-system architecture, RTL design, and its integration, contributing to industry-leading technologies in Wi-Fi connectivity for consumer devices such as hearables, wearables, and IoT applications. Key Responsibilities: Design and develop next-generation WLAN and micro-Wi-Fi subsystems for connectivity, hearables, wearables, and IoT chips. Work on ASIC designs using the latest technology nodes, understanding and executing all aspects of the VLSI development cycle, including architecture, micro-architecture, RTL design, and integration. Collaborate closely with Verification, SoC Design, Validation, Synthesis, and PD teams to achieve design convergence. Develop micro-architecture and implement designs in Verilog/SV. Integrate complex subsystems into SoCs. Perform various design checks and tool analyses using tools like Spyglass, RDC, CDC, PrimeTime, Synthesis, and more. Conduct post-silicon debug and work with cross-functional teams to resolve issues and optimize designs. Work independently on defined tasks, with minimal guidance, while maintaining a strong team-oriented approach. Required Skills and Experience: 8+ years of experience in digital front-end design for ASICs. Strong expertise in RTL coding using Verilog, VHDL, or SystemVerilog (SV) for complex designs, including those with multiple clock domains. Experience in low-power design methodology and clock domain crossing designs. Familiarity with various bus protocols like AHB and AXI. In-depth understanding of the RTL to GDS flow and experience interacting with DFT and PD teams. Experience in 802.11 (Wi-Fi) and wireless IP/subsystem design is a plus. Post-silicon debug experience is an added advantage. Strong documentation and communication skills to effectively interact with team members and management. Self-motivated with a teamwork-oriented attitude and the ability to work independently. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, Communications, or a related field, and 3+ years of Hardware Engineering or related work experience. Master s degree in the above fields and 2+ years of relevant experience, OR a PhD with 1+ year of related work experience.

Job Function: As part of the Wireless R&D HW team in Bangalore, the candidate will contribute to the design and development of next-generation WLAN and micro-Wi-Fi subsystems for connectivity solutions in IoT, hearables, and wearables. This includes: Architecture and micro-architecture development. RTL design and integration. Collaboration with cross-functional teams for design convergence. Responsibilities: Develop micro-architecture and implement design using Verilog/SystemVerilog. Execute digital design (RTL) for complex WLAN subsystems involving multiple clock domains and low-power designs. Integrate and deliver WLAN subsystems to SoC-level designs. Collaborate with verification, SoC design, validation, synthesis, and physical design (PD) teams. Perform tasks such as linting (Spyglass), CDC analysis, synthesis, and simulation. Conduct RTL integration and work closely with DFT and PD teams for design-to-GDS convergence. Analyze tool reports (RDC, CLP, CDC, PrimeTime) and ensure compliance with design standards. Contribute to post-silicon debug and validation, when required. Maintain effective communication with global multi-site teams (US, UK, and India). Create and maintain documentation for design and development processes. Skills and Experience: ASIC Front-End Design: 8+ years of experience in digital ASIC design, with expertise in RTL coding using Verilog, VHDL, or SystemVerilog. Clock Domain Crossing (CDC): Strong experience in handling multiple clock domains and low-power design methodologies. Tool Proficiency: Hands-on experience with Spyglass Lint/CDC checks, DC-Compiler, PrimeTime, synthesis, simulation, etc. Protocols: Familiarity with AHB, AXI, and other standard bus protocols. WLAN/Wireless IP Expertise: Experience in 802.11/Wi-Fi subsystems is a plus. Debugging: Exposure to post-silicon debug and validation is desirable. Collaboration: Ability to work closely with multi-disciplinary teams for holistic design and development. Documentation: Strong documentation and communication skills. Minimum Qualifications: Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related fields and 3+ years of relevant experience. OR Master s degree in the same fields and 2+ years of experience. OR Ph.D. and 1+ year of experience. Experience Requirements: Strong background in ASIC front-end design, architecture, and RTL integration. Prior experience in WLAN IP/Sub-system design is a significant advantage. Why Join Qualcomm? Work on cutting-edge technologies like Wi-Fi 6/7/8 and next-gen connectivity solutions. Collaborate with diverse teams across geographies. Opportunity to contribute to groundbreaking innovations shaping the future of connectivity. Be part of an inclusive and forward-thinking culture. Qualification : Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communcations or related field.

Job Summary: Halliburton is looking for a Technical Software Developer who will leverage competencies in the technical software development process to analyze and define system scope and objectives. This role is responsible for developing, testing, troubleshooting, and documenting engineering system applications, while working on projects of moderate scope and complexity. The developer will be involved in the design and coding of systems and assist in automated regression testing and technology implementation. Key Responsibilities: System Analysis & Design: Perform analysis to define the system scope and objectives for developing or modifying existing engineering applications. Participate in choosing and implementing technologies used in designing, coding, testing, troubleshooting, and documenting engineering systems applications. Application Development: Contribute to the development of assignments and schedules for projects with moderate scope and complexity. Assist in the development of test strategies for automated regression testing of applications. Collaboration & Guidance: Work under general supervision, with instruction and guidance during certain phases of application systems analysis and development. Provide feedback and contribute to improving software solutions in collaboration with senior team members. Impact & Efficiency: Ensure tasks are correctly performed to maintain cost containment, efficiency, and profitability. Be mindful of the impact of errors, ensuring that they can be easily measured and confined. Qualifications: Education: Undergraduate degree in Computer Science or a related discipline. Experience: 2 years of related experience or 6 years of related software development experience. Skills & Competencies: Strong understanding of software development processes, including analysis, coding, and testing. Ability to work independently on projects with moderate scope and complexity, while receiving some guidance as needed. Why Halliburton? Career Growth: Halliburton values employee development, offering opportunities to innovate and grow within the company. Work in the Energy Sector: Join a global leader providing products and services to the energy industry, offering challenging, rewarding, and growth-oriented experiences. Equal Opportunity Employer: Halliburton is an Equal Opportunity Employer, ensuring that all employment decisions are made without discrimination based on race, color, religion, disability, genetic information, pregnancy, citizenship, marital status, sex/gender, sexual preference/orientation, gender identity, age, veteran status, national origin, or any other protected status. Qualification : Undergraduate degree in Computer Science or a related discipline.

Technical Requirements: 1. Digital Logic Design & RTL Coding: Strong experience in digital logic design and RTL (Register Transfer Level) coding. Proficiency in Verilog, VHDL, or System Verilog for implementing complex designs. Deep understanding of logic synthesis, timing constraints, and logic optimization. 2. Peripheral Design (High/Low-Speed): Experience in designing high-speed and low-speed peripherals, ensuring compatibility and optimal performance. Knowledge of integrating peripherals within larger system architectures, ensuring robust data flow. 3. Synthesis, Timing Constraints, and CDC: Familiarity with synthesis tools and ensuring the correctness of timing constraints. Experience with Clock Domain Crossing (CDC) and methods to avoid timing hazards in designs. Ability to optimize logic for timing closure and power efficiency during synthesis. 4. Unit Level Verification Setup & Assertions: Hands-on experience in setting up unit-level verification for RTL modules. Proficient in writing assertions to ensure the correctness of designs during simulation and functional verification. 5. Low Power Design Techniques: Exposure to low power design techniques, including managing multiple power/clock domains in complex SoC designs. Ability to design power-efficient modules for consumer electronics or embedded systems. 6. ARM SoC/AMBA IP-based Designs: Exposure to ARM SoC architectures and integration of AMBA (AXI, AHB, APB) protocols into designs. Experience with SoC-level integration, managing both hardware and software interactions in complex systems. 7. Protocol Knowledge (Additional Advantage): Working knowledge of industry-standard protocols, including PCIe, DDRx, Ethernet, USB, I2C, SPI. Ability to implement these protocols in hardware designs for various interfaces. Expectations from the Role: 1. Communication & Interpersonal Skills: Excellent communication skills for interacting with cross-functional teams, stakeholders, and clients. Ability to convey complex technical details clearly, both in writing and verbally. 2. Independent and Teamwork Capabilities: Strong ability to work both independently and as part of a team. Willingness to take initiative and demonstrate leadership in solving technical challenges. 3. Fast Learner & Adaptability: Ability to quickly absorb and apply new technologies, tools, and methodologies. Eagerness to stay updated with trends in digital design and SoC development. 4. Ownership & Accountability: Demonstrated ownership of tasks and the ability to meet deadlines. Ensure that all aspects of the design process are completed with attention to detail and high-quality standards. 5. Punctuality and Responsibility: Strong track record of punctuality, meeting project deadlines, and delivering quality work. Ability to manage multiple design tasks and optimize workflows to maintain timelines. Ideal Candidate Profile: The ideal candidate should have solid experience in digital logic design, particularly with Verilog, VHDL, or System Verilog. They should have a strong foundation in designing both high-speed and low-speed peripherals and optimizing designs for timing and power efficiency. The role also requires familiarity with ARM SoC architectures and integration of AMBA-based IPs. The candidate should be a strong communicator with the ability to work both independently and collaboratively in a fast-paced, distributed work environment. Leadership potential and a demonstrated ownership mindset are essential to the success in this role.