Scan Insertion Jobs in Bengaluru

Infrastructure Security Leader Location: Bengaluru About Us: Observe.AI Observe.AI is the leading AI-powered platform for customer experience, enabling enterprises to automate customer interactions using AI agents. Our platform ensures natural conversations, delivering predictable outcomes, and is trusted by top companies like DoorDash, Affordable Care, Signify Health, and Verida. Observe.AI blends advanced speech understanding, workflow automation, and enterprise-grade governance to deliver end-to-end AI solutions that optimize both human and AI interactions, providing insights for coaching and quality management. At Observe.AI, we re on a mission to transform customer experiences through AI. As a founding member of our Infrastructure/Cloud Security team, you will have the opportunity to shape and design cloud security from the ground up for a platform trusted by over 80 million users. Reporting directly to the VP of Information Security, you will drive a defense-in-depth approach across infrastructure, IAM, and networks. This is a unique, zero-to-one role where you ll define security strategy, mentor the team, and make a long-lasting impact in a fast-growing AI company. What You ll Be Doing: Security Strategy Development: Design and document security policies, reference architectures, design patterns, and roadmaps to protect our platform. Secure Access & Network Design: Lead efforts to design secure access controls and networks for production environments. Cross-Department Leadership: Collaborate with Corporate IT to implement security measures within the corporate environment. Defense-in-Depth: Implement network segmentation, firewall configurations, VPNs, and deep packet inspection to minimize impact from security incidents. AWS Infrastructure Security: Re-architect AWS infrastructure to enhance security, ensuring that networks, VPCs, and security configurations are optimized. Vulnerability Management: Identify tools and technologies to scan networks, OS, and infrastructure for vulnerabilities, and work with SRE teams to remediate identified risks. Security Compliance: Represent Infrastructure Security in PCI, SOC, ISO, HITRUST, and other regulatory audits, ensuring compliance. Collaborative Design: Partner with engineering teams and architects to ensure infrastructure designs meet both business and security requirements. Stakeholder Collaboration: Work with other teams to integrate up-to-date security features and infrastructure designs across the organization. What You ll Bring to the Role: 9+ years of experience in Software Engineering, Network Security, and AWS Security. Proven track record in designing and implementing secure Cloud Infrastructure, Network Security, and Corporate IT Security. Experience at a SaaS product company with hands-on knowledge of cloud security. Leadership experience in managing Infrastructure Security teams or Security-Focused SRE teams. Strong understanding of network designs, protocols, and certifications like CCNA (or similar). Ability to handle multiple, high-priority projects simultaneously while maintaining focus and quality. Comfort with working off-hours to handle security incidents in a dynamic, fast-paced environment. First-hand experience with major cloud providers, specifically AWS. Deep understanding of large-scale systems and N-tier architectures. Excellent communication skills, able to effectively influence and collaborate with stakeholders across the organization. Perks & Benefits: Medical Insurance: Comprehensive options, including free online doctor consultations. Leave Policies: Yearly privilege and sick leaves as per Karnataka S&E Act, along with generous national, festive, and parental leave. Learning & Development: Access to a fund that supports continuous learning and professional growth. Flexible Benefits: Tax exemptions for meals, PF, etc., along with other flexible benefit plans. Team Culture: Fun events to foster collaboration and culture across the organization.

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Position: Embedded Software Engineer Location: Bengaluru, Karnataka, India Reporting To: Project Manager Qualifications: Bachelor s Degree in Electronics & Communication, Electrical, or Computer Science Engineering 2 to 5 years of relevant experience in embedded software development and software design Proficiency in programming languages such as C, C++, C# and experience with RTOS Key Responsibilities: Collaborate with cross-functional teams to design and develop embedded software from initial requirements through to production and commercial deployment Write clean, efficient, and well-documented code aligned with specifications Troubleshoot, debug, and maintain existing embedded software systems Recommend and implement software improvements to enhance performance and reliability Develop technical documentation and reports to support software solutions Integrate software components and third-party libraries or tools as required Essential Skills & Experience: Proven experience as an Embedded Software Developer or Engineer Strong understanding of communication protocols such as Serial, Ethernet (TCP/IP, UDP), CAN, SPI, I2C, SQI, Parallel, EtherCAT, etc. Solid background in software design and development within a test-driven environment Proficient in embedded programming with C, C++ and RTOS Excellent analytical, problem-solving, and communication skills Desirable Skills: Experience working with microcontrollers Knowledge of PLC programming Ability and enthusiasm to quickly learn new programming languages and technologies Qualification : Bachelors Degree in Electronics & Communication, Electrical, or Computer Science Engineering

Job Title: Software Design & LabVIEW Engineer Location: Bengaluru Overview: Join CynLr s Product Design and Algorithm Team as a Software Design & LabVIEW Engineer, where you will be instrumental in developing LabVIEW code for advanced algorithms and experiments, optimizing performance, and supporting the software development lifecycle with strong architectural discipline. You will also provide critical interface and support for hardware-in-the-loop validation and customer implementation. Key Responsibilities: LabVIEW Development & Experimentation Translate concepts and algorithms from Design and Algorithm teams into well-structured LabVIEW code and experiments. Optimize LabVIEW code for timing and memory performance. Build custom data visualizations and user-friendly UI elements to accelerate experimental workflows. Enhance Lab experiment applications for usability and efficiency. Code Refactoring & Architecture Understand and apply established LabVIEW design patterns and coding standards (including STQ). Refactor legacy spaghetti code to comply with architecture and design guidelines. Document and maintain code quality and design consistency. Software Development Lifecycle Integration Implement and maintain source and version control using GIT or equivalent tools. Integrate evolving C++ DLL libraries seamlessly into LabVIEW codebases without disruption. Verification & Validation (V&V) Develop test cases and execute validation tests for C++ and LabVIEW code. Perform hardware-in-the-loop testing to validate algorithm functionality and performance. Customer Interface & Support Assist in application implementation and provide technical support to customers. Serve as a LabVIEW knowledge resource for the Algorithm and Design engineers and onboard new team members. Job Requirements: Programming Fundamentals Strong understanding of Data Flow programming paradigm and parallel programming in LabVIEW. Experience with dynamic thread management and service spawning. Software Design & Development Proven involvement in the full software development lifecycle, including distributed development with source/version control (GIT). Expertise in State Machine architecture and familiarity with other design patterns applied in LabVIEW. UI/UX Skills Proficient in building custom controls, data visualizations, and UI elements (experience with XControls is a plus). Strong knowledge of subpanels, resolution reflow, and splitter management for UI design. LabVIEW IDE Expertise Deep knowledge of VI Server (methods and attributes) and VI scripting (preferred). Mastery of LabVIEW project and environment settings, including front panel customization, function palettes, debugging, VI properties, and productivity features. Connectivity & Hardware Interface Experience integrating .dll libraries and C++ header files into LabVIEW applications. Familiarity with registry coding is advantageous. Hands-on experience with communication protocols including Ethernet (UDP, TCP), RS232/485, and industrial protocols like Modbus, CAN, etc.

Data Analyst Bangalore, India Location: Bangalore (Bengaluru) Experience: 2 to 8 Years Industry: IT / Data Analytics Job Summary: We are looking for a detail-oriented Data Analyst with strong skills in SQL, Python, and Excel to extract actionable insights and optimize data pipelines on popular cloud platforms. The ideal candidate will be passionate about clean, reproducible code and thrive in a collaborative team environment. Key Responsibilities: Write efficient SQL queries and develop data extraction, transformation, and loading (ETL/ELT) pipelines on cloud platforms Automate data extraction and data insertion into Management Information Systems (MIS) using Python Analyze data sets and extract actionable business insights to support decision-making Maintain high standards of data quality and ensure reproducible, clean code Collaborate effectively with cross-functional teams and communicate findings clearly Continuously learn and adapt to new analytics tools and techniques Preferred Skills & Qualifications: Strong proficiency in SQL, Python, and Excel Experience building and optimizing data pipelines on cloud platforms such as Google Cloud Platform (GCP) Familiarity with Google BigQuery, Metabase, CleverTap, Google Data Studio, Firebase, and Google Analytics Hands-on experience with data visualization tools like Tableau and Google Data Studio Knowledge of ETL/ELT pipeline development and data flow architecture Excellent attention to detail with a passion for clean and efficient coding Strong interpersonal and communication skills to work collaboratively with diverse teams Good to Have: Experience with automated reporting and dashboard creation Prior exposure to marketing analytics tools and user behavior tracking Work with cutting-edge cloud data technologies and analytics tools Opportunity to grow your skills in data engineering and visualization Collaborative work culture focused on continuous learning and innovation

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

Job Title: ACP - Senior Technical Lead / Technical Lead, Diagnostics Group: ACP Business Unit: CARIAD Business Unit India Location: Whitefield, Bangalore Experience: 5 to 11 years About CARIAD (Car, I Am Digital) CARIAD is a forward-thinking automotive software company within the Volkswagen Group. We are working to enhance the software capabilities of the Group and shape the future of automotive technology. Our mission includes developing a unified technology and software platform, which integrates vehicle operating systems, cloud platforms, and architectures for all Volkswagen Group brands. CARIAD India operates under a brand licensing agreement with Germany-based CARIAD SE, contributing to automotive mobility transformation. Joining CARIAD means working in an innovative, collaborative environment alongside over 6,000 professionals globally. Job Description We are seeking a Senior Technical Lead / Technical Lead, Diagnostics to work on Adaptive AUTOSAR-based products and solutions. In this role, you will be responsible for designing, configuring, integrating, and testing diagnostics solutions for automotive systems. As a technical leader, you will guide teams, resolve complex technical problems, and drive the successful delivery of embedded automotive solutions. You will collaborate with Software Product and Solution Architects to create software architecture tailored for the diagnostics area. Key Responsibilities: Software Architecture & Design: Collaborate with architects to create the software architecture for diagnostics solutions within an Adaptive AUTOSAR-based product or solution. Technical Leadership: Provide technical leadership for projects, resolve technical challenges, and guide teams to meet project requirements on complex embedded automotive systems. Project Planning: Assist in providing work-breakdown structures and effort estimations for project planning. Diagnostics Integration: Hands-on experience in configuring, integrating, and testing diagnostics solutions in the automotive domain. Team Guidance: Lead or support a team of engineers in solving technical challenges and ensuring efficient delivery. Collaboration: Work with cross-functional teams, including software architects, system engineers, and quality assurance teams, to ensure diagnostics solutions are integrated seamlessly. Problem Solving: Use strong analytical skills to troubleshoot and resolve issues during development and testing phases. Primary Skills / Qualities: Expertise in Diagnostics: Strong domain knowledge in automotive diagnostics, particularly within the context of Adaptive AUTOSAR architecture and methodologies. AUTOSAR Experience: Proven experience with AUTOSAR-based automotive ECUs, especially Adaptive AUTOSAR. C++ Programming: Minimum 5 years of hands-on experience with C++ (14, 17, 20) programming, including expertise in function and class templates, design patterns (e.g., Factory, Observer, Singleton), and multithreading mechanisms (e.g., std::thread, std::async, future/promise). Embedded Systems: Experience with operating systems such as QNX (preferred), Linux, or Android, particularly in automotive embedded systems. Diagnostic Module Development: Proven experience developing and deploying Adaptive Diagnostic Modules. Debugging Skills: Hands-on experience with debugging tools such as Lauterbach/Trace32 and GDB. Basic Scripting Knowledge: Familiarity with Python or other scripting languages. Analytical Skills: Strong problem-solving and analytical thinking capabilities to address complex technical challenges. Good to Have: Effort Estimation: Familiarity with effort estimation techniques to improve planning and execution accuracy. Networking Knowledge: Exposure to TCP/IP configuration (ifconfig, route, bridge, VLAN, etc.). Build Systems: Experience with build systems like Make, CMake, or Bazel. Signal-Based Communication: Knowledge of communication protocols such as CAN, LIN, FlexRay, Ethernet, and SOME/IP. Middleware Experience: Familiarity with communication middleware such as REST, DDS, SOME/IP, ARA::COM, MQTT, gRPC. Functional Safety / Cybersecurity: Knowledge of functional safety standards or cybersecurity in automotive systems. Conference Participation: Experience presenting at conferences, participating in seminars, filing patents, or publishing papers. ASPICE Knowledge: Familiarity with ASPICE (Automotive SPICE) processes and standards. Innovative Environment: Be part of a company that is revolutionizing automotive technology and driving digital transformation across the Volkswagen Group. Career Growth: Grow your career by working with world-class experts and contributing to the development of cutting-edge automotive technologies. Impactful Work: Take on exciting and impactful projects that will shape the future of mobility and automotive diagnostics. Collaborative Culture: Join a diverse, skilled team of engineers who thrive on collaboration and innovation. About CARIAD India: CARIAD India offers a dynamic work culture with opportunities to work on some of the most advanced and innovative projects in the automotive sector. As part of the global CARIAD team, you ll be contributing to the digitalization of the automotive industry while advancing your own career in a cutting-edge environment.

Software Engineer at Google Minimum Qualifications: Bachelor's degree or equivalent practical experience. 2 years of experience with software development in one or more programming languages, or 1 year of experience with an advanced degree in an industry setting. 2 years of experience with data structures or algorithms in either an academic or industry setting, and building software for data privacy or security (e.g., identity and access management). Experience with C++, infrastructure design, and Android app development. Preferred Qualifications: Master's degree or PhD in Computer Science or related technical fields. 2 years of experience with performance, large scale systems data analysis, visualization tools, or debugging. Experience developing accessible technologies. Experience with Security Analysis, Program Analysis, Decompiler. Knowledge of code and system health, diagnosis and resolution, and software test engineering. About the Job: Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. In this role, you will participate in the development of large scale Google infrastructure Design, as well as develop, and maintain scalable Google wide infrastructure to scan 1 million Android apps per day, manage Petabytes of analysis data, and protect over 3 billion devices. You will build systems to manage and extract intelligence from various sources and make the intelligence available to various internal systems and stakeholders The Platforms and Ecosystems product area encompasses Google's various computing software platforms across environments (desktop, mobile, applications). The products provide enterprises, and ultimately end users, the ability to utilize and manage their services at scale. We build innovative and compelling software products from apps to TVs, from laptops to phones that have an impact on people s lives across the world. Responsibilities: Write product or system development code. Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies. Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency). Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback. Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.

Job Title: Senior ATE Test Engineer Manufacturing & Product Engineering Job Description: Intel is seeking a Senior ATE Test Engineer to drive the testability and manufacturability of integrated circuits from feasibility to high-volume production (HVM). The role involves developing and validating test methodologies, debugging functionality and performance issues, and optimizing test processes for yield and cost efficiency. The engineer will work closely with design, process development, fab, assembly, and manufacturing teams to ensure seamless production ramp-up and quality assurance. Key Responsibilities: Test Development & Debugging: Design, develop, and validate testability circuits and test flows for new products. Debug functionality and performance issues to root cause using Automatic Test Equipment (ATE). Interface with design, DFx (Design for Test, Debug, Manufacturing), and product teams to drive test development. Manufacturability & High-Volume Ramp (HVM): Collaborate with fab, assembly, test factories, and quality/reliability teams to enable smooth production ramp-up. Perform ATE device characterization, define datasheet specifications, and conduct yield analysis. Analyze early customer returns and drive test hole closure activities to enhance quality and reliability. Production Test Optimization: Drive test time reduction by analyzing fallout data and balancing product cost optimizations. Implement bin split and die-level cherry-pick (DLCP) strategies to optimize product supply. Ensure manufacturability through process and spec corner analysis to resolve yield issues before mass production. Hardware & Software Development: Develop and debug complex software programs for test conversion and test automation. Create and validate test hardware solutions for production testing. Optimize component production relative to quality and cost constraints. Qualifications & Experience: Educational Requirements: B.Tech/M.Tech in Computer Science, Electrical, or Electronics Engineering or related fields. Technical Expertise: ATE Test Engineering: Strong expertise in Automatic Test Equipment (ATE) development and debug. DFT & Test Methodologies: Knowledge of DFT architectures and methodologies including Analog DFT, JTAG, etc. Understanding of test engineering processes and tester debugging techniques. Debugging & Validation: Hands-on experience with design/validation and advanced debugging skills. Expertise in Advantest 93K, Teradyne Ultraflex, J750, and related test platforms. Manufacturing Process & Yield Analysis: Experience in yield analysis, bin splitting, and test time optimization. Ability to analyze process corners and drive manufacturing readiness. Soft Skills: Excellent problem-solving skills, teamwork, and communication. Strong interpersonal and planning skills for cross-functional collaboration. About Intel s Manufacturing & Product Engineering (MPE) Group: The MPE team is responsible for test development across Intel s product segments, contributing to 95% of Intel s revenue. The team delivers pre-production test suites and physical debug capabilities to enable high-quality, high-volume manufacturing. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates. Intel offers a competitive compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive health, retirement, and vacation benefits. Cutting-edge technology and career growth opportunities. Qualification : B.Tech/M.Tech in Computer Science, Electrical, or Electronics Engineering or related fields.

About NVIDIA NVIDIA has continuously reinvented itself. From inventing the GPU, which sparked the growth of the PC gaming market and redefined modern computer graphics, to revolutionizing parallel computing, NVIDIA remains at the forefront of technological innovation. Today, NVIDIA GPUs power the world's most advanced AI research, providing highly scalable and massively parallel computational power. Join us and become part of a diverse, inclusive environment that encourages innovation and empowers everyone to do their best work. NVIDIA is an equal opportunity employer, and we are committed to building a diverse team and supporting your growth and success. About the Role DFT Engineer The Design-for-Test (DFT) Engineering team at NVIDIA is at the cutting edge of innovation, solving complex challenges in DFT architecture, verification, and post-silicon validation for some of the most advanced semiconductor chips in the industry. We are looking for a passionate DFT engineer to join our team and help shape the future of technology. What You ll Be Doing Design and implement state-of-the-art DFT features, including test access mechanisms, IO BIST, memory BIST, and scan compression. Verify and validate Scan ATPG and other DFT features, both in simulation and during silicon bring-up. Develop and deploy DFT methodologies for next-generation products, continuously improving DFT quality and efficiency. Collaborate with cross-functional teams to integrate DFT features into the overall chip design. Occasionally participate in travel and late-hour online meetings during critical project milestones. What We Need to See BSEE or MSEE from a reputable institution or equivalent experience. 2+ years of experience in DFT, ASIC design, or a related field. Strong understanding of static timing analysis, ECO, ASIC/logic design flow, HDL, and digital logic design. Experience in RTL and gate-level verification and simulation. Familiarity with BIST architecture, JTAG, and IEEE standards (1149.1/1500). Proficiency in Scan ATPG, compression techniques, and memory tests. Strong analytical and problem-solving skills. Scripting knowledge (Perl or Python) is essential. At NVIDIA, you'll have the opportunity to work on world-changing technology, be part of a diverse and innovative team, and experience continuous learning and growth. We strive to foster a culture of creativity, collaboration, and excellence in everything we do. #LI-Hybrid Qualification : BSEE or MSEE from reputed institutions or equivalent experience with 2+ years of experience

About the Role: As a Senior Embedded Engineer at SolarEdge India R&D, you will be a key player in developing embedded systems and firmware for our advanced solar energy products. You will be responsible for designing, implementing, and testing embedded software, ensuring its reliability, performance, and seamless integration with our hardware platforms. What You Will Be Doing: Lead the design and development of embedded systems and firmware for SolarEdge's solar power products, including inverters, power optimizers, energy storage solutions, and communication interfaces. Collaborate with cross-functional teams (hardware engineers, software developers, and product managers) to define system requirements and architect innovative embedded solutions. Develop and implement efficient and reliable embedded software in C/C++ for various microcontrollers and processors used in SolarEdge products. Conduct thorough testing and verification of embedded software to ensure its functionality, performance, and compliance with quality standards. Troubleshoot and debug embedded software and hardware interactions, identifying and resolving issues throughout the product development lifecycle. Participate in code reviews, providing constructive feedback to team members and ensuring code quality and adherence to coding standards. Stay abreast of industry trends and advancements in embedded systems to propose and integrate cutting-edge technologies into SolarEdge's products. Collaborate with manufacturing and validation teams to support the production and testing of embedded systems. Support the certification process by providing necessary documentation and technical inputs to comply with relevant safety and regulatory standards. Design and implement control algorithms for digital control of power electronics systems, such as DC/DC converters and DC/AC inverters operating at high switching frequencies. Develop device drivers and execute tight interrupt loops in bare metal implementations. Optimize firmware algorithms to enhance system efficiency and reliability. Job Requirements: Bachelor's (B.E./B.Tech.) or Master's (M.E./M.Tech.) degree in Electrical/Electronics Engineering, Computer Science, or a related field. 4+ years of experience in embedded systems design and firmware development. Proficiency in C and C++ programming, with hands-on experience in RTOS and bare-metal development. Strong understanding of microcontrollers, microprocessors, and embedded system architectures. Hands-on experience with ARM-based processors (e.g., TI DSP Controllers, ST, Renesas). Good knowledge of RTOS concepts. Ability to identify and troubleshoot hardware and software technical problems. Working knowledge of protocols and device drivers for SPI, I2C, UART, and CAN. Strong knowledge and proven experience in developing control algorithms for power electronics converters/inverters. Experience developing device drivers and executing tight interrupt loops in bare metal. Experience optimizing firmware algorithms for system efficiency and reliability. Working knowledge of JTAG/SWD debuggers. Experience in board bring-up, peripheral integration, and device driver development. Strong debugging and problem-solving skills. Knowledge of software development tools, version control systems, and debugging tools. Excellent communication and teamwork skills. Experience in the renewable energy or power electronics industry is a plus. Results-oriented mindset. Qualification : Bachelor's (B.E./B.Tech.) or masters degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field.

About the Role: As a Senior Embedded Firmware Engineer at SolarEdge India R&D, you will be a key player in developing embedded systems and firmware for our advanced solar energy products. You will be responsible for designing, implementing, and testing embedded software, ensuring its reliability, performance, and seamless integration with our hardware platforms. Responsibilities: Lead the design and development of embedded systems and firmware for SolarEdge's solar power products, including inverters, power optimizers, energy storage solutions, and communication interfaces. Collaborate with cross-functional teams (hardware engineers, software developers, and product managers) to define system requirements and architect innovative embedded solutions. Develop and implement efficient and reliable embedded software in C/C++ for various microcontrollers and processors used in SolarEdge products. Conduct thorough testing and verification of embedded software to ensure its functionality, performance, and compliance with quality standards. Troubleshoot and debug embedded software and hardware interactions, identifying and resolving issues throughout the product development lifecycle. Participate in code reviews, providing constructive feedback to team members and ensuring code quality and adherence to coding standards. Stay abreast of industry trends and advancements in embedded systems to propose and integrate cutting-edge technologies into SolarEdge's products. Collaborate with manufacturing and validation teams to support the production and testing of embedded systems. Support the certification process by providing necessary documentation and technical inputs to comply with relevant safety and regulatory standards. Key Responsibilities (Continued): Design and implement control algorithms for digital control of power electronics systems, such as DC/DC converters and DC/AC inverters operating at high switching frequencies. Develop device drivers and execute tight interrupt loops in bare metal implementations. Optimize firmware algorithms to enhance system efficiency and reliability. Job Requirements: Bachelor's (B.E./B.Tech.) or Master's (M.E./M.Tech.) degree in Electrical/Electronics Engineering, Computer Science, or a related field. 10+ years of experience in embedded systems design and firmware development. Proficiency in C and C++ programming, with hands-on experience in RTOS and bare-metal development. Strong understanding of microcontrollers, microprocessors, and embedded system architectures. Hands-on experience with microprocessors such as TI DSP Controllers, ST, and Renesas. Experience with advanced SW control methods such as SIL/HIL. Experience with test automation. Experience with PLECS/Typhoon HIL is desirable. Good knowledge of RTOS concepts. Ability to identify and troubleshoot hardware and software technical problems. Working knowledge of protocols and device drivers for SPI, I2C, UART, and CAN. Strong knowledge and proven experience in developing control algorithms for power electronics converters/inverters. Experience developing device drivers and executing tight interrupt loops in bare metal. Experience optimizing firmware algorithms for system efficiency and reliability. Working knowledge of JTAG/SWD debuggers. Experience in board bring-up, peripheral integration, and device driver development. Strong debugging and problem-solving skills. Knowledge of software development tools, version control systems, and debugging tools. Excellent communication and teamwork skills. Experience in the renewable energy or power electronics industry is a plus. Results-oriented mindset. About SolarEdge: SolarEdge recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people. SolarEdge is committed to seeking out and retaining the finest human talent to ensure top business growth and performance. Qualification : Bachelor's (B.E./B.Tech.) or masters degree (M.E./M.Tech.) in Electrical/Electronics Engineering, Computer Science, or a related field.

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

Job/Position Summary Responsibilities Lead and Perform system level testing of Chassis system Brakes, Steer, Suspension in a Hardware In Loop Testing environment Understanding of Chassis features and components involved Mentor and guide team for designing, developing and validation of software applications Collaboration with internal teams and customers within a production program Contribute best practices for System testing and validation Contribute in customer interaction, demonstration and proposal preparation Mandatory Skills: System knowledge of Vehicle Dynamics or Brakes or Suspension system or Steer system Expertise in defining the test strategy for system testing for chassis ECU Expertise in performing Hardware-In-Loop commissioning, testing and analysis Experience in requirement-based testing, diagnostic and fault insertion testing Experience in Test Automation using CAPL/Python for start up sequence, shutdown etc Experience in dSpace/Vector/NI tool chain Experience in Plant model creation and Simulation tools like CarSim, CarMaker Knowledge of CAN, UDS, XCP protocol and Flash bootloader integration Familiarity of functional safety concepts and ISO 26262 is desired Excellent communication, collaboration, analytical and problem-solving skills Familiarity with infrastructure tools like Requirements Management, Change Management and Version Management Requirement ESSENTIAL SKILLS /COMPETENCIES C++ PREFFERED SKILLS /COMPETENCIES C++

Job/Position Summary We are hiring for Adaptive AUTOSAR Subject Matter Expert Job Location Pune & Bangalore Experience 10+ Yrs Skills Required Proficient in C, C++ and Python programming languages. Experience in AUTOSAR Architecture Expertise in Linux, Azure DevOps, Cybersecurity, Docs-as-code, Git. Expertise in TPM - Trusted Platform Module and secure coding practices. Knowledge in ASPICE process, automation, microcontrollers. Work experience in Automotive domain industry is mandatory. Hands on experience on Communication protocol like CAN, LIN or Ethernet. Able to Mentor & Coach Junior Engineers. Requirement ESSENTIAL SKILLS /COMPETENCIES C++ Adaptive AUTOSAR CAN/LIN/Ethernet SIL Virtualization PREFFERED SKILLS /COMPETENCIES QEMU

Position Responsibilities: 1. Risk and Threat Assessments: Conduct comprehensive risk and threat assessments for L3 Autonomous Driving (AD) systems. Perform analyses like TARA (Threat Analysis and Risk Assessment) and MORA (Misuse-Oriented Risk Analysis). 2. Security Design and Development: Redesign modules focusing on cybersecurity. Develop and implement security features, including SecOC (Secure Onboard Communication) and CSM (Cybersecurity Management). Drive compliance with cybersecurity regulations and standards. 3. System and Requirements Architecture: Analyze and define security requirements for AD L3 systems. Collaborate with E/E system architects for security improvements. Develop and refine business, system, and architecture requirements. 4. Support and Coordination: Assist with the development of ECU software for L3 autonomous driving. Provide integration support and troubleshooting for ECUs. Coordinate internal and external assessments, including penetration tests and security evaluations. 5. Cybersecurity Analysis and Implementation: Develop security concepts and conduct analyses like FTA (Fault Tree Analysis) and FMEA (Failure Modes and Effects Analysis). Ensure adherence to regulations such as ISO 21434, UNECE R155, and UNECE R156. Required Skills and Competencies: Essential Skills: Strong expertise in automotive cybersecurity and relevant regulations (ISO 21434, UNECE R155/R156). Knowledge of L3 Autonomous Driving (AD) and Advanced Driver Assistance Systems (ADAS). Hands-on experience with Automotive ECUs, secure bootloaders, and gateway modules. Proficiency in C/C++ programming and working knowledge of AUTOSAR and its configuration tools. Familiarity with cybersecurity analysis tools like Medini or equivalent. Expertise in in-vehicle networks (e.g., CAN Protocol, UDS Protocol) and V2X technologies. Understanding of cybersecurity best practices, secure development requirements, and IT security standards. Experience with threat management models, firewalls, and embedded software components. Knowledge of security mechanisms, protocols, cryptography, and authentication systems. Preferred Skills: Strong background in ADAS and autonomous driving technologies. Experience in intrusion detection, incident response, and computer forensics. Familiarity with requirements management tools (e.g., DOORS, codeBeamer, JAMA). Hands-on experience in product development lifecycle and automotive cybersecurity. Educational Qualifications and Experience: Essential: Bachelor s or Master s degree in Information Security, Computer Science, Electrical Engineering, or related fields. Minimum of 4+ years of relevant experience in the automotive industry (AD/ADAS or autonomous driving). Preferred: Expertise in cybersecurity standards, analysis, and threat management tools. Key Competencies and Tools: Cybersecurity Standards: ISO 21434, UNECE R155/R156. Risk Assessment Techniques: TARA, MORA. Analysis Tools: Medini, FTA, FMEA. Software Tools: AUTOSAR, SAP, C/C++ programming, Requirements Management Tools (DOORS, JAMA). Protocols and Technologies: CAN, UDS, V2X. Qualification : Bachelors or Masters degree in Information Security, Computer Science, Electrical Engineering, or related fields.

About this opportunity: The primary responsibility of this role is to assess new and existing security vulnerabilities from internal and external sources, determine applicability, and document the impact and remediation strategy in a customer viewable format. The role will focus on multiple technologies including all of the major cloud hosting environments, Linux based servers and firmware, specialized hardware products, multiple coding languages, and multiple virtualization technologies. The successful candidate will have the ability to understand the technical aspects of security, assess the risk, and translate that into simple to understand language. What Will You Do? Review vulnerability scan reports Monitor and assess external sources for new vulnerabilities Assess the applicability of vulnerabilities in context Determine the real impact of vulnerabilities Document findings and disclosures for each vulnerability and publish them to customers Negotiate with external researchers on disclosure timing Monitor remediations and update documentation Participate in Security Incidents regarding urgent vulnerabilities Provide metrics and statistics Qualifications Minimum Qualifications: Five (5) years of experience required (can include indirectly related experience) A team player Ability to interpret and explain CVEs to technical and non-technical audiences Working knowledge of hacking techniques Working knowledge of programming Working knowledge of risk evaluation Experience with the MS Office suite Excellent written and verbal communication skills Ability to react to changing priorities quickly and effectively High school diploma, GED, and/or equivalent professional experience While there is a primary location listed on this requisition, other locations may be considered Preferred Qualifications: Experience evaluating security risk in context of the production environment Experience with Jira Experience communicating directly to customers Experience with at least one of these languages: Python, Go, Java, or C Experience with scan reports from Snyk, Qualys, Crowdstrike, Inspector, Vdoo, or Binwalk Experience working remotely across many time zones and cultures Security certifications such as CISSP, CRISC, AWS SCS, etc. Ability to work flexible hours

Technical Requirements: 1. Programming Experience: Proficient in C/C++ (Embedded C, Assembly programming is a plus). Experience in writing low-level firmware and drivers in C and assembly language. 2. Driver Development & Integration: Experience in driver development and integration for various protocols including: SPI, I2C, UART, DMA, CAN, PCIe, Ethernet, USB, SCSI/iSCSI. Expertise in integrating drivers for different hardware components. 3. Board-Level Development: Experience in NVMe and DDR board-level interfaces development. Working experience with board support packages (BSP) and reference platforms. 4. Bootloader Development: Proficient in developing and integrating bootloaders (PSBL, SBL). Familiarity with bare-metal driver development for various platforms. 5. HW Bring-up & Firmware Validation: Experience in hardware bring-up for ARM and x86-based platforms. Firmware design and validation, ensuring reliability and performance at the firmware level. 6. Microcontroller Programming: Hands-on experience in microcontroller programming using Assembly, C, and/or Python. Expectations from the Role: 1. Learning & Technology Adaptability: Strong ability and eagerness to learn new concepts and technologies. Openness to apply new learning to solve technical challenges. 2. Independent Work: Ability to work independently and take ownership of assigned tasks. Ensure tasks are completed on schedule and meet committed quality. 3. Ownership & Responsibility: Ownership of tasks, ensuring completion within agreed timelines and at the expected quality level. Take responsibility for the overall success of the projects. 4. Team Collaboration: Ability to collaborate effectively with team members to accomplish tasks. Work as a team player, communicating clearly and helping others as needed. 5. Experience with Development Tools: Familiarity with development, debugging, testing, and build tools. Proficiency in using IDE and debugging tools specific to embedded development.

Technical Requirements: 1. RTL Design Expertise: Strong experience in RTL (Register Transfer Level) coding, with a good understanding of logic design principles. Proficiency in writing efficient, optimized RTL code using Verilog, System Verilog, or VHDL. 2. SDC and Constraints Syntax: Deep understanding of SDC (Synopsys Design Constraints) and constraints syntax used in synthesis. Experience in writing and managing timing constraints for designs at both the block and SoC levels. 3. Synthesis Experience (Block/SoC Level): Extensive hands-on experience in synthesis at both block and SoC (System on Chip) levels, ensuring efficient design implementation. Familiar with logical synthesis and physical synthesis techniques for optimizing RTL code. 4. Low Power Synthesis: Experience in low-power synthesis, using techniques such as clock gating, power gating, and multi-voltage domain design to reduce power consumption while maintaining design performance. 5. Optimization Techniques: Strong knowledge of optimization techniques to achieve the best Performance, Power, and Area (PPA) for designs. Familiarity with logic restructuring, retiming, and other optimization strategies to improve design efficiency. 6. Synthesis Tools and Methodologies: Expertise in Synopsys Design Compiler (DCT/DCG) or Cadence Genus/RC for synthesis. Experience with hierarchical synthesis, DFT (Design for Test) handling, and scan insertion. 7. Multi-Power Domain Designs: Familiarity with multi-power domain designs, including managing different power states for various blocks or subsystems in the design. 8. CPF (Common Power Format): Good knowledge of CPF (Common Power Format), used for managing power domains and low-power techniques across designs. 9. Timing and STA (Static Timing Analysis): Strong knowledge of timing concepts and STA for analyzing and ensuring timing closure of the design. Experience in LEC (Logical Equivalence Checking) and CLP (Clock Logic Propagation) to validate the functional correctness of the design. 10. Additional Tools & Concepts: Experience with tools like PTPX and Spyglass for timing analysis, power estimation, and linting. Knowledge of Functional ECO (Engineering Change Order) for making design modifications after the initial synthesis. Proficient in scripting with Perl/TCL for automating synthesis and verification tasks. Expectations from the Role: 1. Debugging and Problem-Solving: Strong debugging skills to identify and resolve issues in complex RTL designs and synthesis-related problems. Ability to troubleshoot synthesis issues related to timing, power, or design constraints. 2. Effective Communication: Excellent communication skills to interact with various stakeholders, including design teams, verification teams, and management. Ability to clearly articulate design choices, challenges, and solutions. 3. Project Focus and Ownership: Ability to stay focused on project goals and drive closure on timely delivery of design work. Ownership of assigned work and ensuring its completion within the agreed timelines. 4. Leadership Skills: Leadership abilities to guide and mentor junior engineers in the team. Ability to lead design projects, ensure best practices are followed, and promote a collaborative team environment. 5. Go-Getter Attitude: Proactive and self-driven with a Go-getter attitude, always seeking opportunities to improve designs, processes, and overall team performance. Ability to take initiative, stay motivated, and continually push for high-quality results. Ideal Candidate Profile: The ideal candidate should have a strong RTL design background with in-depth knowledge of synthesis techniques, low power design, and timing analysis. They should be well-versed with industry-standard tools such as Synopsys Design Compiler and Cadence Genus/RC, and have practical experience with multi-power domain designs. A deep understanding of SDC and timing constraints, along with strong debugging and problem-solving skills, is essential. Additionally, the candidate should have leadership potential, excellent communication skills, and a proactive attitude that drives results.