SOC Fpga Emulation Specialist Jobs in Bengaluru

Senior Manager, Security Operations Center (SOC) Location: Bangalore Type: Full-Time Experience Required: 8+ Years (3+ in Leadership) Role Overview: Strategic Cyber Defense We are seeking a Senior Manager to lead and modernize our SOC operations across enterprise and product environments. You will oversee a high-performance team dedicated to threat detection, advanced detection engineering, and incident response. This role is a strategic blend of technical mastery leveraging AI and SOAR and people leadership, focused on building a resilient, automation-first security culture. Core SOC Service Offerings & Expertise Advanced Defense & Detection: Detection Engineering: Implement Detection-as-Code practices and prioritize backlogs based on the evolving threat landscape. Threat Intelligence & Hunting: Deliver actionable intel and execute structured threat hunting hypotheses to proactively identify stealthy adversaries. Deception & Validation: Manage deception strategies (honeypots/tokens) and use attack emulation tools to validate detection logic effectiveness. Forensics: Lead digital forensic investigations, evidence acquisition, and post-incident analysis. Automation & Technology Stack: Azure Ecosystem: Advanced proficiency with Microsoft Sentinel, Defender XDR, and Defender for Cloud using KQL. Cloud Operations: Strong knowledge of security operations across Azure, AWS, and preferably GCP. SOAR & AI: Champion the integration of Security Orchestration, Automation, and Response (SOAR) and AI to drive SOC efficiency. Key Responsibilities Leadership & Strategy: Team Development: Coach and mentor the SOC team, conducting regular 1-on-1s and fostering a growth-oriented culture to prevent burnout. Roadmap Execution: Help define a comprehensive SOC strategy and maturity framework aligned with organizational risk management. Stakeholder Liaison: Act as a trusted advisor to Product, IT, and Development leaders to integrate security into cross-functional workflows. Metrics & Operational Excellence: Data-Driven Reporting: Develop dashboards (e.g., Power BI) to track KPIs, KRIs, and detection coverage. Incident Lifecycle: Lead the lifecycle of escalated incidents, conduct root cause analysis, and execute tabletop exercises. 24/7 MDR Strategy: Define operational procedures for Managed Detection and Response (MDR) and sustainable on-call rotations. Qualifications for Success Proven Leadership: 8+ years in InfoSec with specific experience leading SOC or MDR functions. Azure Mastery: Deep technical expertise in the Microsoft security stack. Framework Knowledge: Familiarity with MITRE ATT&CK, Purple Teaming, and cloud-native detection. Soft Skills: Exceptional ability to simplify complex technical content for executive-level communication.

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Senior Security Specialist Location: Bengaluru, Karnataka, India Employment Type: Full-time About Serko: Serko is a leading tech platform revolutionizing global business travel and expense technology. Joining Serko means becoming part of a passionate team of travelers and technologists dedicated to transforming the business travel marketplace. With offices worldwide and a new hub in Bengaluru, we embrace diversity and authenticity to create meaningful impact. Our fast-growing India team seeks motivated professionals to help build world-class products and experiences. Role Overview: We are looking for a highly skilled Senior Security Specialist with a strong software engineering and DevSecOps background. This role will lead security initiatives, manage risks, oversee security operations, ensure compliance, and report to senior management. You will work closely with agile development teams to embed security throughout the software development lifecycle, driving robust, scalable security solutions. Key Responsibilities: Lead integration of security practices into the DevOps lifecycle, embedding security into software development and deployment pipelines. Collaborate with development and operations teams to identify and mitigate security risks across applications, infrastructure, and pipelines. Implement and maintain security automation and orchestration tools to improve security posture and operational efficiency. Identify, assess, and manage security risks; develop and implement mitigation strategies. Oversee daily security operations, including monitoring, incident response, and threat intelligence. Ensure compliance with security policies and external standards such as PCI-DSS and SOC2. Prepare and present detailed security reports to senior management, highlighting risks and mitigation plans. Lead security awareness campaigns to educate employees on emerging threats and best practices. Stay current on emerging security technologies and trends, particularly in Azure security and DevSecOps. Evaluate and recommend security tools and solutions to enhance the organization's security posture. Qualifications & Experience: 5+ years in a senior security role focused on Security Operations, Risk Management, and Compliance within software engineering environments. Deep understanding of security attack and defense methods; hands-on experience with ethical hacking tools preferred. Proven experience with DevSecOps tools such as SAST and DAST. Expertise in Microsoft security products including Azure Security Center, Defender, Azure AD, and Sentinel. Relevant certifications such as CISSP or equivalent highly preferred. Excellent communication, presentation, and documentation skills. Strong team collaboration and leadership skills. Bachelor s degree in Computer Science, Cybersecurity, or related field; certifications may substitute for degree. What We Offer: Competitive base salary and discretionary incentive plan based on individual and company performance. Access to learning and development platforms to own your career growth. Comprehensive family medical coverage, meal coupons, transport allowances, and mobile & internet reimbursement. Flexible work policies supporting work-life balance. An engaging environment with great tools, support, and opportunities to innovate and deliver high-quality results. Qualification : Bachelors degree in Computer Science, Cybersecurity, or related field; certifications may substitute for degree.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Job Summary: (Sr. Lead Engineer) Qualcomm Simulation platform team would be responsible for defining/prototyping/developing software s on the emulation platforms. Looking for an experienced BSP engineer for virtual platform, who can help us is developing virtual prototype software solution for snapdragon automotive products. Candidate must have an excellent understanding of the complex SoCs architecture & its Software stack. Education & Experience: Bachelor s/master s degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience. Primary Responsibility: Software (BSP) Bring-up on Virtual Platforms. Understand the emulation platform SoC architecture and develop single software solution. Ability to collaborate with cross functional teams and deliver the quality product under strict timeline. Define & develop custom virtio architectures. Pre-silicon software development platform prototype development Develop solution to improve performance of software running on Virtual platform. Supporting internal & external customers on Bring up & debugging from Software & emulation side. Mandatory Skills: Knowledge in Linux/QNX BSPs & Full Boot Chain. Strong System level programming skills in C/C++. Python, Rust is a plus. Excellent knowledge of OS fundamentals, Data structures, Linux kernel and its device driver model Strong debugging, analytical and problem-solving skills. Should have knowledge on debuggers like T32,gdb, etc., Strong collaboration skills with the ability to collaborate with multiple functional teams. Able to understand and debug large complex SW. Fair understanding of CPU (ARM), subsystems, SOC architecture and its SW-layers Fair understanding of the Virtual Machines with Type1 and Type2 Hypervisors Added Advantage: Fair understanding of QEMU/KVM platforms. Fair understanding of multimedia systems (GPU/Display/CAM/VPU/etc.,) knowledge. Fair knowledge of hardware-software interface and SystemC ASPICE and ISO26262 know how is preferred. Automotive experience is preferred. Qualification : Bachelors/masters degree in computer science, electronics engineering, or relevant domain with 6~8 years relevant industry experience.

Job Title: GRC Specialist Location: Bangalore (On-site; full-time) About Locus: At Locus, we are redefining logistics decision-making with deep-tech solutions that drive efficiency, consistency, and transparency across industries like retail and FMCG/CPG. Founded in 2015 by Nishith Rastogi and Geet Garg, Locus has evolved from a women s safety geo-tracking app into a globally recognized logistics optimization platform. Our technology has empowered enterprises such as Unilever and Nestl to execute over a billion deliveries across 30+ countries. Guided by our commitment to innovation and sustainable growth, we transform complex supply chains into strategic growth enablers. Join us at Locus and be part of a team shaping the future of global logistics. Job Overview: About the Role Governance Risk and Compliance Specialist (GRC Specialist) We're looking for a candidate with 2-4 years of relevant experience. Key Responsibilities: Define, implement, and maintain the Information Security Management System (ISMS) and Privacy Information Management System (PIMS). Plan and execute periodic risk assessments. Work directly with the business units to facilitate risk assessment and risk management processes. Define, Review and Maintain the organizational information security policies, processes, procedures and control framework to ensure it is adequate to address the emerging risks due to changing environment, technology and legal requirements. Align customer and internal information security objectives to the ISMS and PIMS. Monitor and fulfill client contractual (MSA) information security and privacy obligations. Monitor and fulfill legal obligations related to protection of personal information across different jurisdictions like GDPR, CCPA. Prepare metrics based periodic reports and dashboards with support from the stakeholder functions for management review. Liaise with security vendors, suppliers, service providers and external resources for new security tools for improving security. Lead the Information Security audits / assessments / remediation and present key risks to the management. Perform the Third party Risk Assessment of Critical Vendors. Conduct Information Security and Privacy awareness and training programs for the employees as part of their induction and regular awareness. Oversee information security and privacy incident management process for incident reporting, containment, resolution and root cause analysis. Plan and coordinate BCP and DR tests. Setup guidelines for secure coding practices. Recommend security and privacy controls based on people, process and technology approach and industry best practices. Identifying solutions or writing automation scripts for solving regular tasks or optimizing processes. SOC Monitoring Activities such as. Firewall, Vulnerability, Inspector, Guarduty etc. Log Review, Incident Handling & Compliance adherence. Qualifications: Good understanding of information security compliance requirements like ISO27001, SOC2, CSA STAR and Privacy requirements like BS10012 & ISO27701. Good understanding of legal obligations towards protection of personal information across different jurisdictions like GDPR, CCPA, etc. Experience in creating and auditing security and privacy best practices and implementation of security and privacy principles across organization, to meet business goals along with customer and regulatory requirements. Experience implementing security and privacy controls for cloud platforms like AWS, Azure. Experienced in solving Audit and Regulatory Issues. Experience in auditing MDM, SSO solutions, AWS (Cloud Infra), Firewall, WAF, DLP etc. Good at solving information security compliance challenges by recommending solutions and best practices. Join Locus and become part of a visionary team that is redefining logistics through innovation and smart distribution. We provide competitive compensation, comprehensive benefits, and a collaborative environment where your expertise will drive both your growth and that of the organization. Locus is an equal opportunity employer dedicated to creating a diverse and inclusive workplace.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Job Title: Pre-Silicon Validation Engineer SoC/IP Job Description: Join the Devices Development Group (DDG), one of Intel s premier System-on-Chip (SoC) design teams, driving innovation in future Intel SoCs and IPs. As a Pre-Silicon Validation Engineer, you will be part of a dynamic team responsible for ensuring the functionality, performance, and reliability of Intel s cutting-edge designs. Key Responsibilities: Validate IP blocks or features at the SoC level, ensuring compliance with design specifications. Develop validation plans and test strategies based on architectural specifications, RTL code, and existing test methodologies. Analyze microarchitecture and debug failures to identify root causes and improve design quality. Develop and utilize various debugging and validation tools to implement validation plans effectively. Participate in silicon debugging, identifying issues and enhancing testing methodologies for future RTL models. Collaborate with IP providers and internal customers to define, develop, and deliver essential infrastructure while addressing issues identified during execution. Qualifications & Requirements: Educational Qualifications: Bachelor s (B.Tech/BS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of experience, OR Master s (M.Tech/MS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 3+ years of experience. Technical Skills & Experience: Minimum 2 years of experience in IP or SoC development, verification, or integration using SystemVerilog and UVM (Universal Verification Methodology). Minimum 2 years of experience in writing validation plans and developing software to execute those plans. Minimum 2 years of experience with object-oriented programming languages. Minimum 2 years of experience working with SystemVerilog and UVM. Minimum 1 year of experience with UNIX/Linux environments. Exposure to Graphics Verification and/or Security Verification is a plus. Preferred Qualifications: Minimum 1 year of experience with computer architecture. Minimum 2 years of experience in validation or testing, particularly in silicon design teams. About the Client Computing Group (CCG): The Client Computing Group (CCG) is at the forefront of Intel s PC product and platform development, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. Through strategic partnerships across the industry, CCG delivers innovative computing experiences that empower users to create, connect, and collaborate. As Intel s largest business unit, CCG drives innovation, scalability, and IP development, helping the company fulfill its mission of enriching lives through technology. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, which includes: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development opportunities to support career growth.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

About NVIDIA NVIDIA has continually reinvented itself. From pioneering the GPU fueling the growth of the PC gaming industry and transforming modern computer graphics to revolutionizing parallel computing, we have consistently shaped the future of technology. Today, NVIDIA GPUs drive innovation in artificial intelligence (AI), providing highly scalable, parallel computation that powers groundbreaking advancements across industries. We are a company that thrives on learning, evolution, and tackling the world s most complex challenges. Join us, and you ll be part of a diverse, innovative, and supportive team that inspires everyone to achieve their best work. About the Role: SOC Design Engineer The System-On-Chip (SOC) group at NVIDIA is expanding! As the complexity of SOCs grows with chips now integrating tens of billions of transistors we are seeking a talented SOC Design Engineer with a passion for RTL integration and chip-level front-end design. This role focuses on padring design, pinmuxing, SOC assembly, and retiming. If you enjoy developing methodologies and automation solutions to optimize SOC creation, this is the opportunity for you. In this role, you will work on NVIDIA s advanced Tegra SOCs, collaborating closely with cross-functional teams, including System Architecture, Physical Design, CAD, and DFT. You will help define and implement scalable and efficient SOC design methodologies for future technologies. What You ll Be Doing Drive SOC assembly and design chip-level functions for Tegra SOCs. Perform front-end design quality checks, reviews, and collaborate with cross-functional teams to resolve issues. Oversee SOC execution across key milestones by defining, tracking, and managing complex dependencies with multiple stakeholders. Develop system-level methodologies, tools, and IPs to enable efficient and scalable SOC design. Identify and address inefficiencies in front-end chip implementation processes, implementing solutions for continuous improvement. What We Need to See B.Tech or M.Tech in Electronics Engineering or a related field. 2+ years of proven experience in chip design, with a focus on SOC integration and design automation. (Experience with padring design and fuse/floorsweep is a plus.) Strong analytical and problem-solving skills. Proficiency in RTL design (Verilog) and knowledge of SOC design/implementation flows. Experience with scripting languages such as Perl, Python, or other industry-standard tools. Exposure to multiple chip design functions, enabling collaboration and problem-solving across diverse teams. Excellent communication and collaboration skills with a team-oriented mindset. Bonus Skills: Experience in SOC verification, synthesis, physical design, and DFT. Familiarity with RTL build flows and Makefiles. At NVIDIA, you ll work on technologies that make a lasting global impact. We believe in fostering a diverse, inclusive work environment where everyone can grow and thrive. NVIDIA is proud to be an equal opportunity employer and does not discriminate based on race, religion, gender identity, age, disability status, or any other protected characteristic. Qualification : B.Tech or M.Tech in Electronics Engineering.

Job Description: We are seeking a highly skilled and experienced CPU Verification Engineer with a focus on ARM and NCC-based ARM architecture. This role requires a deep understanding of CPU microarchitecture, SOC integration, and verification methodologies. The ideal candidate will lead verification efforts, collaborate with cross-functional teams, and mentor junior engineers to ensure high-quality CPU design verification. Key Responsibilities: Lead and execute verification plans for CPU designs based on ARM and NCC-based ARM architecture. Develop and enhance testbenches and verification environments using advanced automation techniques. Collaborate with design and architecture teams to identify and resolve specification gaps, ensuring comprehensive verification coverage. Perform SOC-level verification, including integration and validation of CPU subsystems. Utilize industry-standard verification tools and methodologies such as UVM, SystemVerilog, and simulation/emulation platforms. Mentor and guide junior verification engineers, providing technical leadership and support. Continuously improve verification processes and methodologies to enhance efficiency and effectiveness. Qualifications: Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field. 8 14 years of experience in CPU verification, with a focus on ARM and NCC-based ARM architecture. Proficiency in verification languages and methodologies, including SystemVerilog, UVM, and scripting languages (Python, Perl, etc.). Strong understanding of CPU microarchitecture, memory hierarchy, and SOC integration. Experience with simulation, emulation, and formal verification tools. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills, with the ability to work in a collaborative environment. Preferred Qualifications: Experience with low-power design verification and performance verification. Knowledge of hardware security verification techniques. Familiarity with machine learning and AI-based verification approaches. Minimum Qualifications: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of hardware engineering or related work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or related field and 1+ year of hardware engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.

Job Description: Arm has excellent opportunities in the Solution Engineering group - which has a charter to develop best-in-class SoCs and compute subsystems using industry-leading Arm IP products. These solutions target different market segments like premium mobile, servers, automotive, and IoT. The pre-silicon verification team in Bangalore is looking for highly-skilled engineers with experience in system validation of SoCs on Emulation platform. Responsibilities: Be part of the verification team, and define the emulation-based stress validation methodology & build verification plans. This will involve closely interacting with multiple cross-site & co-located collaborators like the SoC architects, designers, & DV engineers to come up with the extended stress validation plans for the product. Work on multiple industry-standard emulation platforms from EDA vendors, and closely collaborate with technology teams to resolve issues with porting the design on these platforms, and to improve Arm's validation methodology on emulation Take up the responsibility to identify & enable transactors, traffic exercisers, virtual host devices, and monitors on the emulation platform - which will help effective validation of the SoC design. You will be accountable for planning and developing bare-metal and OS-based test content for system stress and use-case validation targeting multiple product use-cases. The team is responsible to find bugs by enabling validation content on high-speed subsystems like PCIe, Ethernet, USB, etc. and other subsystems like DDR, HBM, UFS, HDMI, MIPI devices, LSIO, etc. on emulation Mentor junior engineers and work as a team to deliver on validation goals. Skills and experience required: 5 to 15 years of proven hands-on experience in SoC/subsystem validation. Emulation-based verification experience is a big plus. Prior knowledge of at least one of the blocks like CPU, PCIe, DDR, Ethernet, DDR, USB, etc. Experience working on industry-standard emulators, and validation using transactors or virtual devices will be a plus C/C++ skills with strong understanding of how software interacts with the SoC, firmware, and hardware components is a requirement. Understanding of OS/Linux, drivers and kernel modules is desired. Expertise on hardware behavioral language (Verilog, SystemVerilog) Knowledge of scripting (e.g. Tcl, Perl, Python etc.) In return: Our offices are amazing places to collaborate. If you are interested, but unsure whether you tick all the boxes, we still would love you to reach out! We are keen to welcome people with versatile skills and experience into Arm! Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Meet the Team Join the Cisco Silicon One team in shaping the future of networking with a unified silicon architecture designed for web-scale and service provider networks. Cisco s silicon team offers a unique experience for ASIC engineers by combining the extensive resources of a large, multi-geography organization with the dynamic startup culture and growth opportunities typically found in a smaller team. Enjoy the benefits of a large campus that includes on-site amenities such as a gym, healthcare, caf , social interest groups, and philanthropy initiatives, all while working in a collaborative and innovative environment. Your Impact Write detailed micro-architecture specifications and actively participate in design reviews. Implement Verilog RTL to meet stringent timing, performance, and power requirements. Contribute to full-chip integration and collaborate on timing methodology and analysis. Develop and analyze functional coverage to ensure quality and completeness. Help define, evolve, and support our design methodology to maintain high standards. Collaborate with the verification team to address design bugs and improve code coverage. Work closely with the physical design team to resolve design timing and place-and-route issues. Perform triage, debugging, and root cause analysis for simulation, software bring-up, and customer failures. Conduct diagnostic and post-silicon validation tests in the lab to ensure product readiness. Minimum Qualifications: Bachelor s or Master s degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design. Expertise in Verilog or System Verilog programming. Experience with simulation, synthesis, static timing constraints, and related tools (e.g., VCS, DC, PrimeTime). Solid understanding of debugging and verification methodologies. Preferred Qualifications: Understanding of networking technologies and concepts. Scripting experience with Python, Perl, TCL, or shell programming. Familiarity with formal verification tools. Experience with emulation techniques. #WeAreCisco At Cisco, every individual brings their unique skills and perspectives together to pursue our mission of powering an inclusive future for all. Our employees' passion for connection drives our culture of diversity, learning, and growth. With a focus on unlocking potential, Cisconians often experience one company, many careers, where learning and development are encouraged and supported at every stage of their career. Our technology, tools, and culture pioneered hybrid work trends, allowing every individual to perform at their best and be their authentic self. One-third of Cisconians participate in our 30 employee resource organizations, called Inclusive Communities, which foster belonging, allyship, and social impact. Cisco also provides 80 hours of paid volunteer time off each year, and nearly 86% of employees take part in giving back to the causes they care about. At the heart of Cisco s success is our people, driving us to be the worldwide leader in technology that powers the internet. We are committed to helping our customers reimagine their applications, secure their enterprises, transform their infrastructures, and achieve their sustainability goals. Join us and be a part of a forward-thinking company dedicated to creating a more inclusive future for all. Qualification : Bachelors or Masters degree in Electrical or Computer Engineering with 7+ years of experience in ASIC design.

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Additional Job Description Additional Job Description Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team at Qualcomm. Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute. Responsibilities Design, develop, and maintain CAD infrastructure for silicon design teams enabling bringup, test and debug automations. Collaborate with silicon designers, architects, silicon validation engineer, and other stakeholders to to improve future CPU bringups Define and implement new infrastructure capabilities that can be used to accelerate design utilizing multi-site datacenters. Prepare for CPU bring up through pre-work on emulation and FPGA platforms Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs Troubleshoot and resolve issues related to CAD infrastructure, including hardware and software problems Support design engineers on the flow setup and resolve their queries Develop test contents and testing strategies to assist validation of CPU on silicon Qualifications Must have strong object-oriented programming abilities in Python. Must have knowledge and experience with silicon bringup and debugging Must have worked on Digital flows/methodologies development in the Emulation, pre-silicon and/or post-silicon. Familiarity with firmware and software debug, Silicon bring up and validation of CPU features. MS/BS in Electrical/Computer Engineering with 10+ years of demonstrated experience in CAD or EDA tools flows architecture, development, and support. Ability to document design methodologies & provide training on tools and workflows to design teams Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains Proven track record of pushing Prior experience debugging vendor tool problems Strong written and verbal interpersonal skills and track record of success in a collaborative team environment

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

General Summary: Qualcomm is a company of inventors that has unlocked 5G, ushering in an era of rapid acceleration in connectivity and new possibilities across industries. But this is just the beginning. Qualcomm thrives on innovation and diversity, with teams made up of inventive minds from different backgrounds and cultures, all working together to transform cutting-edge technologies into world-changing products. As a GPU Functional Verification Engineer at Qualcomm, your responsibilities will involve a deep understanding of 3D Graphics hardware pipelines, feature sets, data paths, and block functionalities. You will play a key role in designing and developing verification strategies, implementing testbenches, and working on the functional verification of Qualcomm s Snapdragon SoC products. Key Responsibilities: Develop deep expertise in the 3D Graphics hardware pipeline, including feature sets, data paths, and block functionalities. Strategize, brainstorm, and propose Design Verification (DV) environments; develop testbenches and own test plans. Debug all RTL artifacts and work to achieve comprehensive signoff matrices. Collaborate with EDA vendors and explore innovative DV methodologies to push the limits of signoff quality. Partner with architecture, design, and systems teams globally to meet and exceed all project goals. Develop and execute UVM-based System Verilog testbenches for functional verification of complex GPU designs. Engage in property-based formal verification (knowledge of formal tools is a plus). Work on subsystem-level testbenches to analyze GPU workloads and ensure compliance. Utilize emulation platforms to analyze performance and identify potential pipeline bottlenecks. Perform power-aware and gate-level simulations to ensure high-quality GPU implementation. Implement Perl/Python scripts for regression management, optimizing runtimes, managing databases, and tracking bugs. Required Skills and Experience: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, or a related field, and 2+ years of relevant experience in Hardware Engineering or Design Verification. Master s degree in a related field and 1+ year of relevant work experience, OR PhD in a related field. Minimum 3 years of experience in design verification. Strong proficiency with UVM-based System Verilog testbenches. Experience with GPU pipeline design is a plus but not mandatory. Working knowledge of property-based formal verification tools is a plus. Strong communication skills (both written and verbal) with the ability to work in a collaborative team environment. Ability to learn quickly and deliver results with high quality. Desirable Skills and Aptitudes: Experience in GPU functional verification and knowledge of 3D graphics hardware pipelines. Familiarity with emulation platforms and the ability to analyze and address performance bottlenecks. Expertise in scripting with Perl and Python for automation and optimizing verification processes. Education Requirements: Bachelor s (BE/ME) or Master s (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities. Why Qualcomm? Be a part of a passionate GPU HW team dedicated to developing industry-leading Qualcomm Snapdragon SoCs. Play a pivotal role in shaping the future of mobile AR/VR by contributing to GPU solutions that drive benchmarks in the mobile computing industry. Qualification : Bachelors (BE/ME) or Masters (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities.