SOC Power Analysis Jobs in Bengaluru

Senior Manager, Security Operations Center (SOC) Location: Bangalore Type: Full-Time Experience Required: 8+ Years (3+ in Leadership) Role Overview: Strategic Cyber Defense We are seeking a Senior Manager to lead and modernize our SOC operations across enterprise and product environments. You will oversee a high-performance team dedicated to threat detection, advanced detection engineering, and incident response. This role is a strategic blend of technical mastery leveraging AI and SOAR and people leadership, focused on building a resilient, automation-first security culture. Core SOC Service Offerings & Expertise Advanced Defense & Detection: Detection Engineering: Implement Detection-as-Code practices and prioritize backlogs based on the evolving threat landscape. Threat Intelligence & Hunting: Deliver actionable intel and execute structured threat hunting hypotheses to proactively identify stealthy adversaries. Deception & Validation: Manage deception strategies (honeypots/tokens) and use attack emulation tools to validate detection logic effectiveness. Forensics: Lead digital forensic investigations, evidence acquisition, and post-incident analysis. Automation & Technology Stack: Azure Ecosystem: Advanced proficiency with Microsoft Sentinel, Defender XDR, and Defender for Cloud using KQL. Cloud Operations: Strong knowledge of security operations across Azure, AWS, and preferably GCP. SOAR & AI: Champion the integration of Security Orchestration, Automation, and Response (SOAR) and AI to drive SOC efficiency. Key Responsibilities Leadership & Strategy: Team Development: Coach and mentor the SOC team, conducting regular 1-on-1s and fostering a growth-oriented culture to prevent burnout. Roadmap Execution: Help define a comprehensive SOC strategy and maturity framework aligned with organizational risk management. Stakeholder Liaison: Act as a trusted advisor to Product, IT, and Development leaders to integrate security into cross-functional workflows. Metrics & Operational Excellence: Data-Driven Reporting: Develop dashboards (e.g., Power BI) to track KPIs, KRIs, and detection coverage. Incident Lifecycle: Lead the lifecycle of escalated incidents, conduct root cause analysis, and execute tabletop exercises. 24/7 MDR Strategy: Define operational procedures for Managed Detection and Response (MDR) and sustainable on-call rotations. Qualifications for Success Proven Leadership: 8+ years in InfoSec with specific experience leading SOC or MDR functions. Azure Mastery: Deep technical expertise in the Microsoft security stack. Framework Knowledge: Familiarity with MITRE ATT&CK, Purple Teaming, and cloud-native detection. Soft Skills: Exceptional ability to simplify complex technical content for executive-level communication.

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Software Engineer Power/Thermal Software Products Team Company Qualcomm India Private Limited Job Area Engineering Group > Software Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world-class products that meet and exceed customer needs. You will collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master s degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Languages such as C, C++, Java, Python, etc. Job Description Job Overview: The Power/Thermal Software Products Team at Qualcomm focuses on delivering industry-leading power, thermal, and limit software management solutions across Qualcomm s Mobile, Automotive, Compute, IoT, and AR/VR chipsets. In this role, you will work with cross-functional teams to: Identify power optimization and performance tuning opportunities. Perform thermal/limits hardware tuning, characterization, and risk assessment. Develop optimized solutions and mitigation strategies. Conduct system-level analysis of power/thermal use cases. Collaborate with Architecture, Hardware Design, Performance, Power/Thermal Systems, and various Software teams to create optimal system-level power/thermal software solutions. Develop tools and methodologies for competitive analysis to understand competitors strengths and weaknesses. Design and implement thermal mitigation schemes that are best in the industry. Preferred Qualifications 3+ years of experience with Programming Languages such as C, C++, Java, Python, etc. Strong systems/hardware background with a solid understanding of microprocessor architecture and common SoC hardware blocks (interconnects, display, graphics, etc.). Good understanding of operating system concepts including scheduling, memory management, process management, interrupt handling, and device drivers. Experience using debug tools such as JTAG debuggers, oscilloscopes, and logic analyzers. Experience developing power/thermal management software. In-depth knowledge of embedded systems, microcontrollers, SoC power, modems, multimedia, wireless communications, and system-level debugging/analysis for SoC power optimization. Equal Opportunity Employer Statement Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email [email protected] or call Qualcomm s toll-free number found on their website. Upon request, reasonable accommodations will be provided to support individuals with disabilities during the hiring process. Qualcomm is also committed to ensuring its workplace is accessible to individuals with disabilities. (Please note that this email address is exclusively for accommodation requests. Qualcomm will not respond to requests for application status updates or resume inquiries via this email.) Recruitment Policy Qualcomm s Careers Site is only for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies, as well as candidates represented by agencies, are not authorized to use this site to submit profiles, applications, or resumes. Any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies and is not responsible for any associated fees. Compliance Notice Qualcomm employees are expected to comply with all applicable policies and procedures, including but not limited to security requirements and protection of company confidential and proprietary information, in line with applicable laws. Qualification : Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

Senior Custom Standard Cell Design Engineer Company Arm Location India Job Overview The Solutions Engineering Physical IP team at Arm is home to some of the industry s top experts in deep submicron circuit design. This role offers an exciting opportunity to work with the custom standard cell design engineering team, contributing to cutting-edge technologies. Your work will have a long-lasting impact, as these designs will power Arm s Solutions Engineering products across infrastructure, client, automotive, and IoT market segments. Responsibilities Develop Arm custom standard cells in leading-edge sub-3nm process technology nodes. Collaborate closely with physical design engineers to co-optimize circuit and layout for improved Performance, Power, and Area (PPA) in Arm cores integrated into world-class SoCs. Work with mask design teams to provide optimally tuned layouts. Characterize and model all standard library views. Validate standard cells using comprehensive QA flows across various EDA tools. Required Skills and Experience Bachelor s degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Master s degree in Electrical Engineering with 6+ years of relevant circuit design experience. Proven experience identifying, designing, and verifying cells to optimize core and SoC level PPA. Deep understanding of MOSFET electrical characteristics, transistor-level device physics, and PPA trade-offs, especially at 3nm and below technology nodes. Expertise in designing static circuits, including state-retaining elements such as latches and flip-flops. Hands-on experience with standard cell characterization, modeling, and QA processes. Experience with standard cell characterization tools and SPICE circuit simulators. Proficiency in scripting languages such as Perl or Python. Strong interpersonal skills, with a willingness to mentor and support team members. Demonstrated problem-solving ability, persistence, and creativity in tackling difficult technical challenges. Positive team-oriented attitude, showing respect for all team members. Motivation to continuously develop new skills and take on various responsibilities. Ability to analyze complex data sets and present conclusions effectively. Nice-to-Have Skills and Experience Experience leading engineering teams, including project management and risk communication. Exposure to physical design implementation flows and sign-off processes. What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace, Arm empowers every team member to grow, succeed, and make a meaningful contribution to the company's global success. #LI-KR2 Qualification : Bachelors degree in Electrical Engineering with 8+ years of relevant circuit design experience, or Masters degree in Electrical Engineering with 6+ years of relevant circuit design experience.

CPU Performance Engineer Company Arm Location Bengaluru Job Overview At Arm, we are building the Future of Computing. Achieving generational performance gains requires deep understanding of the core, microarchitecture, system-level details, and the workloads that run on them. We are seeking a highly motivated and skilled engineer to drive analysis, characterization, and deep understanding of complex infrastructure workloads. This is a versatile and high-visibility role requiring collaboration with global teams including hardware architects, software engineers, and toolchain experts. Your work will help shape the next-generation CPU microarchitecture through comprehensive workload performance analysis. Responsibilities Perform performance analysis and characterization of complex infrastructure workloads to identify software and microarchitectural improvements for next-generation processors/systems. Analyze CPU performance, power, and cost while identifying key technology challenges and opportunities for innovation. Collaborate with Arm architects to develop technologies that contribute to maintaining a best-in-class compute systems roadmap. Develop expertise in the competitive landscape and emerging technologies in areas such as infrastructure, computer vision, and machine learning. Required Skills and Experience Strong knowledge and experience in CPU architecture and microarchitecture, gained through development, research, or performance analysis/modeling/design. Ability to break down workload performance into insights spanning software (applications, toolchain, libraries) and CPU/system microarchitecture. Proven ability to work effectively both independently and as part of geographically distributed teams across multiple functional groups. Innovative mindset with a strong drive to explore new approaches, influence stakeholders through detailed investigation, and solve challenging technical problems. Bachelor s or Master s degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis. Nice-To-Have Skills and Experience Experience in CPU performance analysis and/or modeling. Background in workload analysis, characterization, and/or optimization of open-source software. Understanding of CPU infrastructure architectures and system-level constraints. Hands-on experience with advanced CPU techniques such as branch prediction and prefetching. Comfort working with emerging technologies and staying current with research advancements. Track record of influencing product roadmaps and delivering innovative solutions through prototypes and empirical analysis. What Arm Offers Arm provides an exceptional collaborative environment, offering exciting challenges and career growth opportunities. If you are interested but feel you don t meet every requirement, we encourage you to apply we value diverse skills and innovative thinking! #LI-KR2 Qualification : Bachelors or Masters degree in Computer Science, Engineering, or a related field, with at least 10 years of experience in CPU or SoC performance analysis.

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Description Intel is seeking an enthusiastic, motivated, and self-driven engineer specializing in Power Analysis and Signoff. This role involves working on power and performance optimization for complex multi-million gate SoCs, collaborating across teams to ensure low-power design efficiency and successful tape-out. Key Responsibilities: Define and analyze chip power & performance targets. Perform FSDB analysis for various design power scenarios and extract optimal activity windows. Conduct power estimation and analysis at block level and aggregate total power for SoC. Collaborate with architecture, design, and implementation teams for power optimization. Execute low-power (LP) checks at both block and full-chip level, analyze logs/reports, and ensure high-quality results. Work closely with Front-End (FE) and Back-End (BE) teams to achieve overall power convergence and low-power signoff for tape-out. Qualifications & Experience: Educational Requirements: B.E/M.E in Electrical Engineering or a related field. 8+ years of experience in logic design, synthesis, and low-power design/implementation for complex SoCs. Technical Expertise: Proficiency in power analysis tools such as PT-PX/Prime Power. Experience with FSDB analysis using Verdi tool. Knowledge of Power Artist for power analysis (a plus). Hands-on experience with industry-standard LP check tools like PTPX for power estimation. Strong analytical and problem-solving skills. Scripting expertise in Tcl, Perl, and Python (required). About the Xeon and Networking Engineering (XNE) Group: The Xeon and Networking Engineering (XNE) Group focuses on the development and integration of Xeon and Networking SoCs, supporting Intel s Xeon and 5G networking roadmap. XNE drives high-performance computing innovations while ensuring power efficiency and scalability. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : B.E/M.E in Electrical Engineering or a related field.

Job Description Intel is seeking an experienced Systems Engineer to drive the design, development, and integration of hardware, firmware, and software solutions for Xeon-based platforms. The role focuses on system architecture, performance optimization, and technical risk assessment while ensuring scalability, reliability, and security in system implementations. The ideal candidate will work on customer-centric solutions, influencing next-generation system design and conducting proof-of-concept experiments to validate new features and technologies. Key Responsibilities: System Architecture & Design: Define, develop, and optimize end-to-end solutions integrating software, firmware, board, and silicon/SoC components. Customer-Centric Solutions: Translate business opportunities into use cases, develop product specifications, and implement solutions based on customer needs and system limitations. Performance & Reliability Optimization: Conduct design analysis, assess technical risks, and optimize for security, scalability, and maintainability. Hardware Validation & Debug: Perform schematic reviews, layout verification, mechanical/thermal analysis, and electrical validation (including Signal Integrity (SI) analysis). System Integration: Ensure smooth hardware-software integration, identifying and resolving hardware issues at the component and system levels. Lab-Based Proof-of-Concept Testing: Conduct real-life environment simulations, prototype testing, and performance benchmarking. Documentation & Knowledge Sharing: Develop technical documents, customer presentations, and training materials to enhance internal and external knowledge sharing. Industry Research & Collaboration: Engage in academic and industry research, driving innovation beyond existing solutions. Qualifications & Experience: Educational Requirements: B.E/B.Tech in Electronics & Communication, Computer Science, or a related field. Minimum of 10 years of relevant industry experience. Technical Expertise: Experience in Xeon platform hardware design and validation. Strong knowledge of schematics, PCB layout, mechanical, and thermal analysis. Experience with electrical validation, signal integrity (SI), and power integrity (PI) analysis (desirable). Expertise in hardware issue validation, debugging, and system integration. Strong problem-solving and analytical skills for complex, multi-layered system architectures. Excellent technical documentation and presentation skills. About Intel Validation Engineering (iVE) Group: The Intel Validation Engineering (iVE) Group plays a pivotal role in Intel s technology leadership, validating, debugging, and optimizing Intel s cutting-edge designs. iVE ensures that Intel's next-generation products meet the highest quality standards, enabling Intel to deliver world-class technology platforms. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a top-tier compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.E/B.Tech in Electronics & Communication, Computer Science, or a related field.

Job Title: Power Optimization & Performance Engineer Windows Platforms Job Description: Intel is seeking a Power Optimization & Performance Engineer to drive power efficiency and responsiveness enhancements across Windows platforms. The role involves deep analysis of software workloads, power-performance tuning, and debugging complex system-level issues to optimize Intel s laptop and desktop platforms. The engineer will work closely with platform architects and cross-functional teams to define power-performance metrics, develop battery life improvement strategies, and drive forward-looking technology readiness initiatives. Key Responsibilities: Power & Performance Analysis: Perform in-depth analysis of software flows at the trace, thread, and process ID levels to identify power optimization opportunities and performance bottlenecks. Platform Power Optimization: Leverage state-of-the-art analysis tools to identify and resolve battery life and performance issues in domains such as Graphics, Multimedia, Display, Imaging, and CPU. Technical Leadership & Troubleshooting: Diagnose complex system-level power and performance issues, demonstrating strong debugging expertise in Windows-based Intel platforms. Cross-Team Collaboration: Work with platform architects and engineers to define power-performance metrics, optimize power delivery across SoC components, and influence next-generation platform architectures. Windows OS & Driver Optimization: Identify and drive power savings features or performance tuning opportunities into current and next-gen Intel platforms. Collaborate with OS and driver teams for power-aware enhancements. Future Technology Readiness: Analyze expected vs. actual platform behavior, propose forward-looking enhancements, and influence SoC and Windows OS architectures. Qualifications & Experience: Educational Requirements: B.Tech/M.Tech in Electronics or Computer Engineering or related fields. Technical Expertise: Embedded Systems & Software Development: Experience in software/firmware development, integration, or validation. Platform Power Management: Understanding of CPU/SoC architecture, power delivery, sensors, memory, storage, display, multimedia, and imaging subsystems. OS & System Debugging: Strong grasp of Windows OS fundamentals, system-level debugging, and exposure to firmware & device drivers. Windows Debug Tools: Experience with Windows Driver Debugging and Windows Debug tools (preferred). Power & Performance Optimization: Hands-on experience with power-performance measurement, analysis, and benchmarking. Analytical & Problem-Solving Skills: Ability to troubleshoot complex system issues and propose efficient power-saving techniques. Excellent Communication & Collaboration: Strong ability to interact across teams and drive technical discussions. About Intel s Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-ones. As Intel s largest business unit, CCG is dedicated to enhancing PC experiences, fostering innovation, and delivering market-leading computing solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a highly competitive compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.Tech/M.Tech in Electronics or Computer Engineering or related fields.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for architecting, developing, characterization of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive methodologies for deployment of features into products. Drive initiatives for power and thermal optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from largescale datacenters to low-power client devices. Debug and architect solutions for issues seen by customers in the field across a wide range of industries. Influence next generation SW, chip, board, and platform design of products across SOC, GPU and CPUs in Laptops, Servers, and Datacenters Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 4+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Qualification : B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience)

Experience Level: 4+ years (Bachelor s), 3+ years (Master s), or 2+ years (PhD) Preferred Domains: Embedded Systems, Mobile, IoT, Automotive General Summary: We are seeking a highly skilled Systems Engineer with experience in post-silicon validation, system modeling, and power-performance optimization. The ideal candidate will work on cutting-edge embedded systems with a focus on CPU, GPU, and AI workload performance. This role offers an opportunity to collaborate with cross-functional teams to optimize SoC performance and contribute to next-generation product innovations. Preferred Qualifications: Experience in as many of the following areas is desirable: Embedded Systems & Mobile/IoT/Auto Domains: Hands-on experience with complex embedded systems and SOC performance. Post-Silicon Validation: System validation, performance analysis, and feedback to influence future product development. Power & Performance Analysis: Analyzing power-performance data for various CPU, GPU, and AI workloads/benchmarks. System Modeling & Profiling: Expertise in power/performance use cases, SOC profiling, PPA tradeoffs, and product qualification. CPU Microarchitecture: Knowledge of cache, latency, bandwidth analysis, and optimization. Linux/Android Kernel Development: Experience with device driver development, Android architecture, and system programming. Power Optimization: Experience with DVFS/DCVS governors and power management at the system level. Hands-On Lab Experience: Familiarity with DAQs, oscilloscopes, JTAG, ARM Developer Studio, and power data acquisition. Automation & Scripting: Proficiency in Python, shell scripting, ADB shell, and automation environments for Linux/Android systems. Collaboration & Leadership: Ability to work with internal teams and external partners for analysis and optimization. Acts as a tech lead and provides guidance to engineering teams. Tools & Version Control: Exposure to Git, Jira, Android, and QTI tools. Key Responsibilities: Perform post-silicon validation of SoC performance and architecture. Analyze and optimize power-performance trade-offs in collaboration with architecture teams. Develop and enhance tools to assist in performance analysis and workload characterization. Drive power and performance optimization for CPUs, GPUs, and AI workloads. Provide technical leadership and guide teams on system-level optimization and validation. Collaborate with internal and external teams to achieve performance goals. Minimum Qualifications: Bachelor s degree in Engineering, Information Systems, Computer Science, or a related field and 4+ years of relevant experience. Master s degree in Engineering, Information Systems, Computer Science, or a related field and 3+ years of relevant experience. PhD in Engineering, Information Systems, Computer Science, or a related field and 2+ years of relevant experience. Skills: Strong understanding of computer architecture and OS fundamentals. Excellent communication and presentation skills. Ability to manage tasks independently and work in a fast-paced environment.

About the Job Join a diverse team that pushes boundaries by developing custom silicon solutions powering the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide and help shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team blends the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies to make computing faster, seamless, and more powerful, ultimately improving people s lives through technology. Responsibilities Define ASIC power management architecture for an SoC, including image compute, CPU/GPU functions, ensuring maximum performance under power and thermal constraints. Prototype firmware and validate the next-generation SoC power management system at various design stages. Analyze implementation and models, and test the performance of power management solutions. Produce detailed documentation on the proposed power management implementation and conduct trade-off analyses for engineering reviews and product roadmap decisions. Collaborate with software teams and the power architecture team to build system-level designs and methods for optimized power management. Minimum Qualifications Bachelor s degree in Electrical Engineering or equivalent practical experience. 8 years of experience in power management or post-silicon measurements and validation. 3 years of experience with power management validation. Preferred Qualifications Master s degree or PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture and performance/power analysis. Solid knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation strategies. Strong understanding of how software and architectural design decisions affect the power and thermal behavior of systems, including thermal mitigation, scheduling, and cross-layer policy design.

General Summary: Qualcomm is the industry leader in integrated chipsets that power advanced mobile devices. We are expanding our expertise in wireless technologies and advanced multimedia capabilities to continue delivering high-performance multimedia systems with low power consumption and competitive cost, while maintaining strong feature differentiation. Join Qualcomm India s Multimedia Systems Team and work at the cutting edge of performance modeling, system architecture, and evaluation of camera, video, and computer vision hardware IPs. This role offers the chance to collaborate on image signal processors (ISP), video codec hardware, and advanced algorithms for computer vision and image/video processing. Key Responsibilities: As part of the Systems and R&D team, your responsibilities may include the following: Design and maintain transaction-accurate/static models for multimedia IPs. Perform performance validation and debugging for pre- and post-silicon platforms. Conduct architecture analysis for system performance optimization. Define use-case flows for multimedia applications. Understand product features and assess their impact on system performance. Collaborate with the product marketing team to recommend feature support configurations for specific system setups. Minimum Qualifications: Bachelor s degree in Electrical Engineering, Computer Science, or a related field with 4+ years of relevant experience, or Master s degree with 3+ years of experience. Strong analytical and problem-solving skills with implementation experience. Solid understanding of SoC infrastructure (NoC, Memory Controller, DDR, QoS, MMU). Systems mindset with a focus on power and performance optimization. Experience in performance modeling/verification and debugging system performance issues. Proficiency in C, SystemC, and familiarity with UNIX/Win/Linux computing platforms. Preferred Qualifications: Background in system architecture, hardware IP micro-architecture, or embedded software/firmware. Experience in image/video signal processing. Knowledge of image sensor technology and codec standards. Educational Requirements: Required: Bachelor s degree in Computer Science or Electrical & Computer Engineering. Preferred: Master s degree in a related field. Qualification : Bachelors in Computer science or Electrica

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Additional Job Description Additional Job Description Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team at Qualcomm. Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute. Responsibilities Design, develop, and maintain CAD infrastructure for silicon design teams enabling bringup, test and debug automations. Collaborate with silicon designers, architects, silicon validation engineer, and other stakeholders to to improve future CPU bringups Define and implement new infrastructure capabilities that can be used to accelerate design utilizing multi-site datacenters. Prepare for CPU bring up through pre-work on emulation and FPGA platforms Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs Troubleshoot and resolve issues related to CAD infrastructure, including hardware and software problems Support design engineers on the flow setup and resolve their queries Develop test contents and testing strategies to assist validation of CPU on silicon Qualifications Must have strong object-oriented programming abilities in Python. Must have knowledge and experience with silicon bringup and debugging Must have worked on Digital flows/methodologies development in the Emulation, pre-silicon and/or post-silicon. Familiarity with firmware and software debug, Silicon bring up and validation of CPU features. MS/BS in Electrical/Computer Engineering with 10+ years of demonstrated experience in CAD or EDA tools flows architecture, development, and support. Ability to document design methodologies & provide training on tools and workflows to design teams Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains Proven track record of pushing Prior experience debugging vendor tool problems Strong written and verbal interpersonal skills and track record of success in a collaborative team environment

Minimum Qualifications: Bachelor s degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. At least 5 years of experience in software development, specifically within consumer electronics or embedded systems. A minimum of 3 years of experience in leading ASIC architecture decisions from a software perspective. Proficiency with Linux kernel, bootloaders, SoC, low-power management frameworks, or performance analysis. Preferred Qualifications: Master s degree or PhD in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or a related discipline. 10 years of experience in software design and development, particularly with software layers in ASIC (e.g., boot processes, drivers, embedded firmware, libraries, and APIs for applications). Familiarity with Android OS or similar platforms, especially in power management. Strong understanding of hardware-software interactions across various hardware blocks, including CPUs and accelerators. About the Role: Join a dynamic, diverse team that is pioneering the development of custom silicon solutions powering the future of Google's direct-to-consumer products. As part of the team, you will contribute to groundbreaking innovations in products used by millions globally, shaping the next generation of hardware experiences for optimal performance, efficiency, and integration. As the ASIC Platform Software Architect, you will be instrumental in translating software product requirements and use cases into specific hardware blocks or sub-systems. In this role, you will define the direction of the software team, guiding them in the face of complex constraints. You will work closely with hardware architects to define system architectures for hardware blocks and collaborate with the implementation team to outline solutions. You ll also help influence design decisions to ensure software requirements are met, negotiating hardware/software trade-offs for optimal results. Google's mission is to organize the world s information and make it universally accessible and useful. Our Devices & Services team integrates the best of Google AI, software, and hardware to create transformative user experiences. We focus on researching, designing, and developing new technologies and hardware to make user interaction with computing faster, more seamless, and more powerful. Whether we re innovating on form factors, advancing sensors, or redefining interaction methods, the Devices & Services team is dedicated to improving people's lives through technology. Responsibilities: Collaborate with stakeholders to identify user experience needs and map them to hardware and software solutions. Design architectures and software interfaces that empower developers to leverage hardware accelerators and other intellectual property (IP). Analyze hardware component interactions, troubleshoot issues, propose trade-off solutions, and drive to resolution. Contribute to the design and improvement of hardware from one generation to the next, applying insights from past productization efforts and reducing technical debt.

Job Overview: We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : 8+ Years of Experience in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises #LI-KR2 Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Qualification : A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture.

General Summary: Qualcomm is a company of inventors that has unlocked 5G, ushering in an era of rapid acceleration in connectivity and new possibilities across industries. But this is just the beginning. Qualcomm thrives on innovation and diversity, with teams made up of inventive minds from different backgrounds and cultures, all working together to transform cutting-edge technologies into world-changing products. As a GPU Functional Verification Engineer at Qualcomm, your responsibilities will involve a deep understanding of 3D Graphics hardware pipelines, feature sets, data paths, and block functionalities. You will play a key role in designing and developing verification strategies, implementing testbenches, and working on the functional verification of Qualcomm s Snapdragon SoC products. Key Responsibilities: Develop deep expertise in the 3D Graphics hardware pipeline, including feature sets, data paths, and block functionalities. Strategize, brainstorm, and propose Design Verification (DV) environments; develop testbenches and own test plans. Debug all RTL artifacts and work to achieve comprehensive signoff matrices. Collaborate with EDA vendors and explore innovative DV methodologies to push the limits of signoff quality. Partner with architecture, design, and systems teams globally to meet and exceed all project goals. Develop and execute UVM-based System Verilog testbenches for functional verification of complex GPU designs. Engage in property-based formal verification (knowledge of formal tools is a plus). Work on subsystem-level testbenches to analyze GPU workloads and ensure compliance. Utilize emulation platforms to analyze performance and identify potential pipeline bottlenecks. Perform power-aware and gate-level simulations to ensure high-quality GPU implementation. Implement Perl/Python scripts for regression management, optimizing runtimes, managing databases, and tracking bugs. Required Skills and Experience: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, or a related field, and 2+ years of relevant experience in Hardware Engineering or Design Verification. Master s degree in a related field and 1+ year of relevant work experience, OR PhD in a related field. Minimum 3 years of experience in design verification. Strong proficiency with UVM-based System Verilog testbenches. Experience with GPU pipeline design is a plus but not mandatory. Working knowledge of property-based formal verification tools is a plus. Strong communication skills (both written and verbal) with the ability to work in a collaborative team environment. Ability to learn quickly and deliver results with high quality. Desirable Skills and Aptitudes: Experience in GPU functional verification and knowledge of 3D graphics hardware pipelines. Familiarity with emulation platforms and the ability to analyze and address performance bottlenecks. Expertise in scripting with Perl and Python for automation and optimizing verification processes. Education Requirements: Bachelor s (BE/ME) or Master s (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities. Why Qualcomm? Be a part of a passionate GPU HW team dedicated to developing industry-leading Qualcomm Snapdragon SoCs. Play a pivotal role in shaping the future of mobile AR/VR by contributing to GPU solutions that drive benchmarks in the mobile computing industry. Qualification : Bachelors (BE/ME) or Masters (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities.