Sram Memory Design Engineer Jobs in Bengaluru

Position: Embedded Software Developer Department: Research & Development Reporting To: General Manager Location: Bengaluru Key Responsibilities Embedded System Development Work with a team of developers to design, create, and implement **embedded systems and applications** for R&D projects, which will later be integrated into BFW machines. Develop embedded software from requirements gathering to production and commercial deployment. Assist an in-house team of embedded developers in the creation of **prototype boards, coding, and testing**. Demonstrate previous embedded projects, including examples and supporting audiovisual materials. Software Design & Implementation Design, develop, test, and debug **embedded system software**. Review and optimize code for efficiency, stability, and scalability. Analyze system resources and integrate new product designs into the system. Interface with hardware design and development teams to ensure seamless integration. Testing & Support Provide **post-production support** and assist in the debugging and troubleshooting of embedded systems. Support software **quality assurance (QA)** and optimize I/O performance for embedded systems. Third-Party Software Integration Assess and integrate **third-party and open-source software** solutions as needed for system functionality. Behavioral Competencies Component Selection: Ability to select appropriate components for embedded systems based on requirements. Communication: Strong written and verbal communication skills for documentation, team collaboration, and customer interaction. Problem Solving: Ability to work independently, troubleshoot issues, and optimize system performance. Skills and Expertise Core Programming Skills Proficient in **C, C++, and Python**. (**Must know**) Expertise in **QT and QML**. (**Must know**) Hardware Knowledge Experience with schematic design, PCB component placements, layouts, and artwork. (Good to know) Understanding of **EMC standards** and their application in hardware design. (Good to know) Microcontroller & Processor Expertise Working knowledge of **8, 16, and 32-bit microcontrollers**. (**Must know**) Experience with **32-bit and 64-bit microprocessors**, including ATOM, ARM, PIC, Atmel, etc. (**Must know**) Communication Protocols Proficient with communication protocols such as **RS232C, RS485, USB, TCP/IP, Modbus RTU/TCP, and shared memory (Redis)**. (**Must know**) POC & Testing Setup Proficient in creating **proof-of-concept (POC)** layouts and writing test code for available lab resources to validate designs. Qualifications Essential: Bachelor's degree in Mechanical Engineering, Computer Science, or related field (or equivalent). Experience: Minimum of **2 years of experience** working and developing embedded software for platforms. Proficiency in developing software and working with hardware in an embedded environment. Qualification : Bachelor's degree in Mechanical Engineering, Computer Science, or related field (or equivalent)

Lead Software Engineer - Scale & Performance Location: Bengaluru Experience: 6 12 years About VuNet VuNet is a pioneer in Business Journey Observability, using Big Data and Machine Learning to revolutionize digital experiences in the financial services industry. Our platform delivers end-to-end visibility into customer journeys, helping organizations proactively resolve issues, ensure operational resilience, and deliver superior user satisfaction. With over 28 billion digital transactions monitored every month and serving more than 300 million users globally, VuNet is shaping the future of observability for some of the largest banks and financial institutions. We are Series B funded, part of NASSCOM s DeepTech Club, and recognized by global analysts such as Gartner and Omdia. Your Role: Lead Software Engineer - Scale & Performance As a Lead Software Engineer for Scale & Performance, you ll own the performance and scalability benchmarks for VuNet s observability platform. You will work with cutting-edge technologies, design robust test frameworks, and ensure that our platform scales seamlessly to meet the demands of millions of users. Roles & Responsibilities Own performance and scalability benchmarking for key platform components (ingestion pipelines, data storage, and query services). Design and execute load, stress, soak, and capacity tests across microservices, agents, and ingestion layers. Identify and resolve performance bottlenecks in both infrastructure (CPU/memory/IO) and application layers (API latency, throughput, GC behavior). Develop and maintain performance test frameworks, preferably using Kubernetes-based environments. Collaborate with DevOps and SRE teams to optimize system configurations (Kubernetes, Postgres/TimescaleDB, ClickHouse, Kafka) for scale. Implement OpenTelemetry for service instrumentation to monitor system health and latency (p50/p95/p99 metrics). Contribute to capacity planning, scaling strategies (horizontal/vertical), and resource optimization. Analyze production incidents related to scaling issues and drive permanent fixes. Work with engineering teams to design scalable architecture patterns and define SLIs/SLOs for system performance. Document performance baselines, tuning guides, and scalability best practices for internal use. What You Bring Mandatory Skills: Strong background in performance engineering for large-scale distributed systems or SaaS platforms. Expertise in Kubernetes, container runtimes (containerd/Docker), and resource profiling in containerized environments. Solid understanding of Linux internals, CPU/memory profiling, and network stack tuning. Hands-on experience with observability tools (Prometheus, Grafana, OpenTelemetry, Jaeger, Loki, Tempo, etc.). Familiarity with observability platform datastores like ClickHouse, PostgreSQL/TimescaleDB, Elasticsearch, or Cassandra. Experience with performance benchmarking tools such as k6, Locust, JMeter, or custom Golang/Python scripts. Ability to interpret system metrics (CPU usage, memory, GC, latency) and correlate across different layers. Nice-to-Have Skills: Experience with agent benchmarking (OpenTelemetry Collector, custom data shippers). Exposure to streaming systems like Kafka, NATS, or Pulsar. Familiarity with CI/CD pipelines for performance testing and regression tracking. Knowledge of cost optimization and capacity forecasting in cloud environments (AWS/GCP/Azure). Proficiency in Go, Python, or Bash scripting for automation and data analysis. Life at VuNet: At VuNet, we're building a world-class observability platform, and we re just getting started. You ll be part of a passionate, problem-solving team that embraces collaboration, fast learning, and staying ahead of emerging technologies like Gen AI. We foster a high-trust, inclusive culture where collaboration, ownership, and innovation are central to our success. If you're looking to work on cutting-edge tech, make a real impact, and grow with a supportive team you ll fit right in at VuNet. Benefits: Comprehensive health insurance coverage for you, your parents, and dependents. Mental wellness and 1:1 counseling support. A culture that promotes continuous learning, innovation, and career growth. Transparent, inclusive, and high-trust workplace. Opportunities for skill enhancement with training programs focused on new Gen AI technologies.

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Position: Junior/Senior Design Engineer Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication / Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 2 to 4 years Job Overview We are looking for a passionate and detail-oriented Hardware Design Engineer (Junior/Senior level) to join our engineering team in Bangalore. In this role, you will be responsible for designing high-performance embedded hardware systems, from circuit design and schematic capture to board bring-up and testing. You ll work closely with cross-functional teams to deliver robust, scalable, and reliable hardware solutions, primarily for embedded and defense applications. Key Responsibilities Execute assigned hardware design tasks within defined timelines. Design and develop complex hardware circuits, schematics, and PCB layouts. Perform Signal Integrity (SI), Power Integrity (PI), and thermal analysis. Develop hardware test plans and execute board/system testing accordingly. Conduct board bring-up, validation, and debugging of hardware platforms. Participate in design reviews, defect prevention, and continuous improvement activities. Adhere to all QMS (Quality Management System) and project-specific processes. Prepare detailed technical documentation and maintain design records. Flag and resolve any technical challenges with guidance from tech leads. Technical Skill Set Strong expertise in circuit design, schematic capture, and PCB design. Hands-on experience with 16-bit or 32-bit processors/microcontrollers (e.g., ARM, PowerPC, IBM PPC 405, Intel x86). Experience with FPGA-based board designs. Good understanding of high-speed board design and signal integrity concepts. Familiarity with system interfaces: PCI, PCIe, VME, Compact PCI, ATCA/AMC is a plus. Exposure to embedded hardware design for defense applications. Understanding of qualification processes for industrial/defense-grade products. Proficiency in board bring-up and hardware debugging techniques. Technology Domains Storage Technologies: iSCSI, SATA, Fibre Channel Processors: MIPS, ARM, PowerPC Interfaces: USB, PCIe, PCI-X Memory: DDR, DDR2, RLDRAM Soft Skills & Attributes Strong verbal and written communication skills Excellent interpersonal and teamwork abilities Proactive and solution-oriented mindset Strong time management and organizational skills Opportunity to work on cutting-edge hardware design projects in embedded and defense domains Exposure to the complete hardware development lifecycle Collaborative and inclusive work culture Learning and development support Competitive compensation package Qualification : M.E./M.Tech. in Electronics & Communication

Position: Technical Lead / Project Lead Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication or Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 5 to 8 years Job Overview We are seeking a dynamic and experienced Technical Lead / Project Lead Hardware Design to join our engineering team in Bangalore. In this leadership role, you will guide a team of hardware engineers through the end-to-end design and development of advanced embedded and FPGA-based systems primarily for defense and industrial applications. You'll be responsible for ensuring high-quality, defect-free, and timely project deliveries while driving technical excellence and process adherence. Key Responsibilities Technical Leadership Lead hardware design projects from specification to delivery, ensuring robust and scalable solutions. Provide technical guidance to team members in circuit design, schematic development, and board-level design. Finalize board specifications based on customer requirements and prepare detailed technical documentation. Review hardware modules and ensure compliance with design best practices and industry standards. Lead Signal Integrity (SI), Power Integrity (PI), and thermal analysis during design and validation phases. Project Management Plan, monitor, and track project schedules, resource allocation, and delivery milestones. Coordinate with the Project Manager and cross-functional teams to ensure alignment and timely progress. Conduct internal project meetings, present status updates, and recommend process or technical improvements. Ensure adherence to QMS guidelines, project processes, and quality goals. Team Development & Support Mentor junior engineers and support individual learning and development plans. Manage a small team, resolve technical and interpersonal challenges, and promote a collaborative work environment. Assist in performance reviews and team development initiatives. Quality & Process Improvement Drive defect prevention initiatives and participate in continuous improvement of design processes. Coordinate configuration management and quality control activities throughout the project lifecycle. Technical Skill Set Strong hands-on experience in FPGA-based board design and embedded hardware development. Expertise in system-level architecture, processor interfaces, DDR memory design, serial bus protocols, and networking. Proficient in board bring-up and debugging at system level. Experience with embedded hardware design for defense applications and understanding of qualification processes. Tools: Schematic capture/layout: OrCAD, Allegro Signal integrity tools for SI/PI analysis Soft Skills Excellent verbal and written communication skills Strong people management and leadership capabilities Effective time management, organization, and planning Proven ability to manage small teams and drive project success Familiarity with quality systems and engineering best practices Opportunity to work on cutting-edge, high-impact hardware projects Collaborative and technically strong work environment Competitive compensation and benefits package Focus on leadership development and continuous learning Dynamic and inclusive workplace culture Qualification : M.E./M.Tech. in Electronics & Communication

Position: Senior Test Engineer Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication (EC) Experience: 4 to 10 Years Key Skills & Expertise Strong experience in testing, troubleshooting, and debugging complex PCBAs and electronic subsystems. Proficient in analyzing and working with FPGAs, processors, DDR memory, and ADC components. Skilled problem solver with the ability to think creatively and troubleshoot effectively. Hands-on experience with testing equipment such as oscilloscopes, spectrum analyzers, function generators, power meters, and other test instruments. Familiarity with programming tools and materials/component specifications. Excellent communication skills for customer interaction regarding queries and status updates. Proven team player with the ability to train and mentor junior engineers. Deep understanding of engineering principles and product design, with keen attention to detail. Job Responsibilities Test, troubleshoot, and debug complex PCBAs and electronic subsystems incorporating FPGAs, processors, DDRs, and ADCs. Analyze and comprehend complete test procedures and parameters; develop customized test procedures tailored to FPGA, processor, and ADC boards and subsystems. Lead qualification and environmental stress screening (ESS) tests, coordinating efforts with engineering teams and customers. Design and implement straightforward yet comprehensive quality-check processes to ensure optimal product performance. Collaborate with cross-functional teams to resolve issues and improve testing methodologies. Provide training and guidance to team members, fostering a culture of continuous learning and improvement. Qualification : B.E./B.Tech. in Electronics & Communication (EC)

Lead Engineer Mobile Development Location: Bangalore Company: Mahindra First Choice About Mahindra First Choice Mahindra First Choice Wheels is India s leading used vehicle platform, revolutionizing the automotive ecosystem by organizing the fragmented pre-owned vehicle market. With the largest pan-India used car retail network, robust sourcing partnerships, a top-tier auto content platform, and a dominant position in enterprise solutions for banks, NBFCs, insurers, and OEMs, we are redefining the future of mobility through data, technology, and scale. Role Overview We are seeking a talented and experienced Lead Engineer Mobile Development to spearhead the design, development, and optimization of mobile applications across Android and iOS platforms. This role is ideal for a hands-on technical leader who thrives in a fast-paced environment, has deep expertise in Kotlin, Android, and iOS technologies, and can mentor teams while driving mobile projects from concept to deployment. Key Responsibilities 1. Technical Leadership & Architecture Lead the development of robust, scalable, and high-performing mobile applications for both Android and iOS platforms. Define and implement mobile architecture best practices, coding standards, and performance guidelines. Own the full mobile development lifecycle from architecture and design to deployment, monitoring, and maintenance. 2. Mobile Development & Hands-On Engineering Write clean, maintainable, and efficient code using Kotlin (including Kotlin Multiplatform), Android frameworks, and Swift/Objective-C for iOS. Build reusable libraries, components, and frameworks to streamline development. Implement modern UI/UX standards, animations, and seamless interactions for an exceptional user experience. Ensure apps are optimized for performance, battery usage, and responsiveness across devices. 3. Collaboration & Cross-Functional Coordination Work closely with Product Managers, UX/UI Designers, and Backend Engineers to translate product requirements into technical solutions. Integrate mobile applications with RESTful APIs and third-party SDKs. Coordinate with QA to ensure rigorous testing, debugging, and high-quality releases. 4. Innovation & Continuous Improvement Stay current with mobile development trends, tools, and best practices. Recommend and evaluate emerging technologies, frameworks, or tools to improve mobile development velocity and app performance. Continuously monitor and enhance the performance, stability, and usability of mobile applications. 5. Team Leadership & Mentorship Lead and mentor a team of mobile developers, fostering a culture of excellence, ownership, and learning. Conduct regular code reviews, provide technical guidance, and promote knowledge sharing. Manage development timelines, task allocation, and project delivery in collaboration with cross-functional teams. Qualifications & Skills Required Bachelor s or Master s degree in Computer Science, Engineering, or related discipline. 7+ years of hands-on experience in Android and iOS mobile application development. Deep expertise in Kotlin, Kotlin Multiplatform, and Android development (Android Studio, Jetpack components, Material Design). Proficiency in Swift and/or Objective-C for iOS development using Xcode and UIKit/SwiftUI. Solid experience integrating RESTful APIs, JSON, and third-party SDKs. Strong grasp of mobile architecture patterns such as MVVM, MVP, or Clean Architecture. Proven ability to publish and manage apps on Google Play Store and Apple App Store. Experience with performance profiling, memory optimization, and debugging tools. Preferred Experience with hybrid frameworks like Flutter or React Native. Familiarity with CI/CD pipelines, automation, and deployment tools. Working knowledge of Agile methodologies and tools like JIRA, Git, Jenkins, etc. Soft Skills Strong analytical and problem-solving skills with a keen attention to detail. Excellent communication and interpersonal skills to collaborate effectively across teams. Proven leadership capabilities and ability to mentor junior engineers in a high-growth environment. At Mahindra First Choice, you ll be part of a passionate, innovation-driven team that s transforming how India buys and sells used vehicles. This is a high-impact role with the opportunity to shape our mobile strategy and deliver apps used by thousands across the country. If you re looking to lead cutting-edge mobile projects and grow in a fast-paced tech-first environment, we d love to hear from you. Qualification : Bachelors or Masters degree in Computer Science, Engineering, or related discipline

Position: Senior AI Solutions Engineer Location: Bangalore, India Shift: 2:00 PM 11:00 PM IST (EMEA/US support hours) About Workato Workato is the market leader in enterprise orchestration, enabling 400,000+ global customers to streamline operations by connecting data, apps, and processes. Powered by AI, its platform drives agility through intelligent automation. Recognized by Forbes, Deloitte, and Business Insider, Workato offers a dynamic and collaborative culture that blends innovation with work-life balance. Role Overview As a Senior AI Solutions Engineer, you'll play a key role in building and deploying intelligent, agent-based systems and Retrieval-Augmented Generation (RAG) solutions using Workato s Agentic AI platform. This is a highly technical, hands-on role that blends AI/ML expertise, integration design, customer engagement, and scalable solution delivery. Key Responsibilities AI Engineering & Solution Architecture Design and deploy multi-agent AI workflows that are autonomous, adaptive, and goal-directed. Develop robust RAG pipelines using LLMs and Workato connectors to generate grounded, real-time responses. Implement intelligent memory, prompting, and behavior management strategies for AI agents. Technical Leadership Act as the technical expert for AI-driven architectures using Workato s automation and orchestration platform. Architect scalable AI-powered workflows integrating Workday, NetSuite, Salesforce, ServiceNow, etc. Own performance monitoring, troubleshooting, and continuous optimization of AI systems. Customer Collaboration Work directly with customers to design and deliver tailored Agentic AI and RAG solutions. Communicate complex AI concepts clearly to business and technical stakeholders. Champion exceptional customer service and solution success. Cross-Functional Collaboration Support product managers with technical specifications and solution design. Contribute to internal knowledge bases, best practices, and thought leadership. Participate in product ideation, rapid prototyping, and iterative improvement. Required Qualifications Technical Skills BTech/BE in CS, AI/ML, or related field. 8+ years in solution architecture and development; 3+ years on Workato platform required. Solid foundation in AI agent systems, RAG, and large language models (LLMs). Strong experience with APIs (REST, SOAP), JSON, and relational or NoSQL databases. Programming experience: Java, Python, or Ruby (2 3 years). Hands-on integration experience with middleware, iPaaS, BPM, or RPA platforms. Familiarity with automation tools like Dell Boomi, MuleSoft, or TIBCO is a plus. Bonus Knowledge Familiarity with OAuth, SSO, MFA, and cloud platforms (AWS/GCP/Azure). Experience with enterprise SaaS apps (e.g., Salesforce, Workday, ServiceNow, NetSuite). Exposure to event-driven architecture and microservices. Soft Skills & Mindset Strong communication and storytelling skills. Critical thinker with an entrepreneurial mindset. Self-starter with the ability to work independently and across teams. Passionate about solving complex technical problems and delivering value.

Job Title: Software Engineer GPU Performance Location: Bengaluru Overview: We are looking for a highly skilled Software Engineer GPU Performance with a deep understanding of CUDA, GPU hardware architecture, and low-level performance optimization. The ideal candidate will have hands-on experience building high-performance GPU-based pipelines, optimizing time-continuous kernels, and dynamically managing processing loads between the CPU and GPU. Key Responsibilities: Utilize low-level CUDA APIs to implement and optimize GPU kernels and memory management strategies. Design and optimize pipelined image processing frameworks, ensuring seamless multi-block function execution and inter-block communication. Conduct low-level GPU performance analysis and optimizations using tools like: NVIDIA Nsight Compute NVIDIA Visual Profiler NVIDIA Graphics Developer Tools Optimize CUDA cores and kernels for maximum throughput, particularly in time-continuous processing scenarios. Implement dynamic load balancing between GPU kernels and processing functions. Design interleaved execution strategies between CPU and GPU, including real-time GPU control flow modifications from the CPU. Use NVIDIA Direct technologies for direct memory access from PCIe, USB, and display hardware, bypassing CPU intervention. Build systems to visualize GPU memory for debugging without requiring CPU transfers. Contribute to the design and optimization of foundational neural networks, including mathematical modeling of time-weighted kernels. Stay up to date with emerging GPU tools and platforms; exposure to NVIDIA Omniverse is a plus. Required Skills & Qualifications: Strong proficiency in C/C++. In-depth experience with low-level CUDA programming. Proficiency with Visual Studio toolchain and related debugging tools. Solid understanding of GPU hardware architecture and system-level performance tuning. Hands-on experience with GPU memory management, kernel interleaving, and CPU-GPU orchestration. Strong problem-solving skills and the ability to write clean, efficient, and maintainable code. Experience in neural network architecture design and low-level performance optimization is highly desirable. Exposure to Omniverse, real-time rendering, or simulation platforms is a bonus.

Job Title: Software Design & LabVIEW Engineer Location: Bengaluru Overview: Join CynLr s Product Design and Algorithm Team as a Software Design & LabVIEW Engineer, where you will be instrumental in developing LabVIEW code for advanced algorithms and experiments, optimizing performance, and supporting the software development lifecycle with strong architectural discipline. You will also provide critical interface and support for hardware-in-the-loop validation and customer implementation. Key Responsibilities: LabVIEW Development & Experimentation Translate concepts and algorithms from Design and Algorithm teams into well-structured LabVIEW code and experiments. Optimize LabVIEW code for timing and memory performance. Build custom data visualizations and user-friendly UI elements to accelerate experimental workflows. Enhance Lab experiment applications for usability and efficiency. Code Refactoring & Architecture Understand and apply established LabVIEW design patterns and coding standards (including STQ). Refactor legacy spaghetti code to comply with architecture and design guidelines. Document and maintain code quality and design consistency. Software Development Lifecycle Integration Implement and maintain source and version control using GIT or equivalent tools. Integrate evolving C++ DLL libraries seamlessly into LabVIEW codebases without disruption. Verification & Validation (V&V) Develop test cases and execute validation tests for C++ and LabVIEW code. Perform hardware-in-the-loop testing to validate algorithm functionality and performance. Customer Interface & Support Assist in application implementation and provide technical support to customers. Serve as a LabVIEW knowledge resource for the Algorithm and Design engineers and onboard new team members. Job Requirements: Programming Fundamentals Strong understanding of Data Flow programming paradigm and parallel programming in LabVIEW. Experience with dynamic thread management and service spawning. Software Design & Development Proven involvement in the full software development lifecycle, including distributed development with source/version control (GIT). Expertise in State Machine architecture and familiarity with other design patterns applied in LabVIEW. UI/UX Skills Proficient in building custom controls, data visualizations, and UI elements (experience with XControls is a plus). Strong knowledge of subpanels, resolution reflow, and splitter management for UI design. LabVIEW IDE Expertise Deep knowledge of VI Server (methods and attributes) and VI scripting (preferred). Mastery of LabVIEW project and environment settings, including front panel customization, function palettes, debugging, VI properties, and productivity features. Connectivity & Hardware Interface Experience integrating .dll libraries and C++ header files into LabVIEW applications. Familiarity with registry coding is advantageous. Hands-on experience with communication protocols including Ethernet (UDP, TCP), RS232/485, and industrial protocols like Modbus, CAN, etc.

Job Title: Software & Algorithm Design Engineer Robotics Location: Bengaluru Overview: We are seeking a talented Software and Algorithm Design Engineer to join our Robotics team. The ideal candidate will have a strong foundation in machine learning, computer vision, and image processing, coupled with practical experience in developing and optimizing algorithms for real-world robotics applications. This role demands proficiency in C++, familiarity with GPU computing, and a systems-level approach to problem-solving. Key Responsibilities: Develop and model new Machine Learning architectures and algorithms from the ground up. Apply expertise in machine vision and image processing to solve complex robotic perception problems. Classify and evaluate various ML models, understanding their benefits, limitations, and evolution. Parameterize problems with a clear understanding of system-level and process-level impacts. Translate and optimize DSP and/or Neural Network-based algorithms for high performance. Build robust test frameworks to validate algorithm correctness and performance. Collaborate closely with cross-functional teams to deliver production-ready, reliable robotics software beyond prototyping stages. Document code and algorithm design meticulously to ensure maintainability and clarity. Utilize GPU technologies, including CUDA, to accelerate algorithm performance. Required Skills & Qualifications: Strong grasp of Machine Learning fundamentals and practical ML toolkits. Proficient in C++ (Python proficiency assumed). Solid background in Machine Vision and Image Processing. Understanding of control systems is a plus. Familiarity with GPU application development and CUDA programming (expert level not required). Experience optimizing algorithms related to DSP or Neural Networks. Skilled in building comprehensive test frameworks for software validation. Passionate about documentation and writing clean, readable code. Comfortable working within a software development lifecycle to create production-quality software. Preferred Knowledge: ML Architectures and Neural Networks Digital Image Processing & Machine Vision CPU and GPU Architectures CUDA and GPU Programming Basic Software Design Patterns Memory Architecture & Optimization Techniques Algorithm Performance Optimization Tools & Technologies: C++ CUDA cuDNN and other machine learning frameworks Computer Vision libraries (e.g., OpenCV)

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Requirements: BE/BTech degree in CS/EE with 8+ years experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus. Qualification : BE/BTech degree in CS/EE

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

Software Engineer Power/Thermal Software Products Team Company Qualcomm India Private Limited Job Area Engineering Group > Software Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world-class products that meet and exceed customer needs. You will collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master s degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Languages such as C, C++, Java, Python, etc. Job Description Job Overview: The Power/Thermal Software Products Team at Qualcomm focuses on delivering industry-leading power, thermal, and limit software management solutions across Qualcomm s Mobile, Automotive, Compute, IoT, and AR/VR chipsets. In this role, you will work with cross-functional teams to: Identify power optimization and performance tuning opportunities. Perform thermal/limits hardware tuning, characterization, and risk assessment. Develop optimized solutions and mitigation strategies. Conduct system-level analysis of power/thermal use cases. Collaborate with Architecture, Hardware Design, Performance, Power/Thermal Systems, and various Software teams to create optimal system-level power/thermal software solutions. Develop tools and methodologies for competitive analysis to understand competitors strengths and weaknesses. Design and implement thermal mitigation schemes that are best in the industry. Preferred Qualifications 3+ years of experience with Programming Languages such as C, C++, Java, Python, etc. Strong systems/hardware background with a solid understanding of microprocessor architecture and common SoC hardware blocks (interconnects, display, graphics, etc.). Good understanding of operating system concepts including scheduling, memory management, process management, interrupt handling, and device drivers. Experience using debug tools such as JTAG debuggers, oscilloscopes, and logic analyzers. Experience developing power/thermal management software. In-depth knowledge of embedded systems, microcontrollers, SoC power, modems, multimedia, wireless communications, and system-level debugging/analysis for SoC power optimization. Equal Opportunity Employer Statement Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email [email protected] or call Qualcomm s toll-free number found on their website. Upon request, reasonable accommodations will be provided to support individuals with disabilities during the hiring process. Qualcomm is also committed to ensuring its workplace is accessible to individuals with disabilities. (Please note that this email address is exclusively for accommodation requests. Qualcomm will not respond to requests for application status updates or resume inquiries via this email.) Recruitment Policy Qualcomm s Careers Site is only for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies, as well as candidates represented by agencies, are not authorized to use this site to submit profiles, applications, or resumes. Any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies and is not responsible for any associated fees. Compliance Notice Qualcomm employees are expected to comply with all applicable policies and procedures, including but not limited to security requirements and protection of company confidential and proprietary information, in line with applicable laws. Qualification : Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.

Senior Memory Design Engineer Company Arm Location Noida, India Job Description This opening is for a Senior Memory Design Engineer in our PHYSICAL IP MEMORY group in Noida. We work on innovative memory architectures in leading-edge technology nodes to enable the best Arm Systems across all markets. As a memory design professional, this position is a rare opportunity to work with our successful circuits, characterization, and layout team, and gain a deep understanding of memory usage in SoCs based on Arm cores. You will discover a wide variety of circuit innovations while working on different types of memories in cutting-edge process technologies. Responsibilities In this role, you will be working in the following areas: Work on memory architecture development in the latest technologies. Transistor-level full-custom design and collaboration with the physical design team for layout realization. Develop new design features and perform circuit/layout optimizations to meet Performance, Power, and Area targets. Lead memory design verification and characterization activities. Ensure high-performance memory designs with the lowest possible power, as needed for Arm CPUs, GPUs, and SOCs. Required Skills and Experience 5-8 years of proven experience in memory design. Strong interest and command of basic electronics (Diodes, RC Circuits, CMOS, etc.). Solid understanding of digital electronics fundamentals (Flip-Flops, Latches, Decoders, Multiplexers). Understanding of setup and hold time concepts. In-depth knowledge of memory fundamentals, especially single-port SRAM: Circuit design (Bitcell, WL decoder, Sense Amp, Self-time, Assist, Low power features, DFT features). Good understanding of technology trade-offs in deep sub-micron technologies. Self-motivated, hardworking, and positive outlook. Strong organizational skills with attention to detail. Nice-to-Have Skills and Experience Understanding of advanced process technology nodes and memory product layout implementation. Experience with shell scripting, machine learning (ML), and automation. Knowledge of statistical simulations (e.g., Monte Carlo). What Arm Offers Arm is committed to global talent acquisition and offers an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, and meritocratic workplace where everyone can grow and succeed, we encourage our people to make exceptional contributions to Arm's success in the global marketplace. Accommodations at Arm If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. By sending the requested information, you consent to its use by Arm to arrange appropriate accommodations. All accommodation requests will be treated with confidentiality, and information will only be disclosed as necessary to provide the accommodation. Examples of support include breaks between interviews, having documents read aloud, or office accessibility. Hybrid Working at Arm Arm s hybrid working approach is designed to create an environment that supports both high performance and personal wellbeing. We believe in bringing people together face-to-face to enable faster work while recognizing the value of flexibility. Hybrid working patterns depend on team and role requirements, which will be discussed upon application. Some flexibility might be limited by legal, regulatory, tax, or other considerations. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to fostering an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Senior Emulation Engineer Company Arm Location Bengaluru, India Job Overview Arm s Central Emulation team is excited to welcome experienced Emulation experts to join the team in Bengaluru. You will collaborate with design and verification engineers across the UK, US, India, and France to support advanced Compute Subsystems and SoC projects. Arm is building a team to develop exceptional silicon demonstrators based on Arm s IP compute sub-system solutions, targeting premium mobile, infrastructure, and automotive markets. Using the latest technology nodes (e.g., 3nm) and new 3D packaging innovations, Arm s goal is to demonstrate industry-leading performance by architecting, designing, implementing, and fabricating cutting-edge silicon test chips. This initiative brings together innovative talent and expertise from across the semiconductor industry to shape the next generation of compute on Arm devices. Responsibilities Collaborate with end users to understand system use cases and guide validation efforts. Ensure tight integration between hardware qualification and final application use models. Work in an exciting emulation environment using hybrid and virtual solutions, integrating industry-standard high/low-speed IO IPs into subsystems and SoCs. Engage from early architecture and design phases to pre-silicon validation and post-silicon validation on emulation platforms. Drive pre-silicon emulation across all SoC teams. Ensure design quality and debuggability by collaborating closely with the design team. Support architecture, verification, system validation, performance, power, and DFT teams with insights from performance and power characterization. Develop comprehensive pre and post-silicon test plans in collaboration with verification teams. Develop tests, create bare-metal drivers for industry-standard IO IPs, and build frameworks to enable scalable testing across multiple ASIC projects. Required Skills and Experience Bachelor s degree (BE/BTech) in Electronics Engineering. 8+ years of experience in Pre-Silicon Validation and Emulation/FPGA-based platforms. Experience developing C/C++/SystemC tests for HDL-HVL co-emulation platforms. Proficiency in IO bus protocols such as I2C, SPI, USB, and/or PCIe. Experience with SoC debugging tools such as JTAG and Trace32. Nice-to-Have Skills and Experience Knowledge of ASIC design and prototyping flows. Experience with SystemC/C/C++ and UVM/SystemVerilog (SV) verification languages. Familiarity with domains such as PCIe, Flash, Memory, CPU, GPU, and DRAM. Hands-on experience with emulation toolchains such as Zebu, Veloce, or Palladium. What Arm Offers Arm is committed to global talent acquisition, offering an attractive relocation package. With offices worldwide, Arm is a diverse organization of dedicated, creative, and hardworking engineers. By fostering a dynamic, inclusive, meritocratic, and open workplace where everyone can thrive, Arm encourages its people to make exceptional contributions to its global success. #LI-KR2 Qualification : Bachelors degree (BE/BTech) in Electronics Engineering.

CPU Verification Engineer Company Arm Location Bengaluru Job Overview Responsibilities Contribute technically as part of project teams to deliver high-quality ARM CPU designs. Execute comprehensive CPU design verification, focusing on improving design quality through stress testing and bug identification. Effectively plan, conduct reviews, provide status updates, and meet delivery expectations. Collaborate with design and architecture teams to ensure effective coverage and provide accurate project planning inputs. Design and develop verification testbenches and components required for effective verification. Maintain knowledge of company processes to work effectively within defined standards and methodologies. Drive efficiency improvements in verification tools and methodologies and mentor team members to support career development. Required Skills and Experience 3+ years of experience in CPU, IP, or SoC product development environments. Experience in design verification/validation, including developing test plans, testbenches, and executing measurable verification processes. Familiarity with processor verification using assembly language and C/C++. Knowledge of microprocessor and/or SoC architecture and microarchitecture, preferably ARM processors and ARM-based systems. Strong problem-solving and debugging skills, with a commitment to continuous improvement. Nice-To-Have Skills and Experience Strong understanding of CPU architecture and microarchitecture. Experience with ARM-based system designs and hierarchical memory systems. Programming languages: Verilog, Assembly, C/C++, Perl, Python. Experience with verification languages such as SystemVerilog. Familiarity with power-aware verification methodologies. What Arm Offers This is a fantastic opportunity to shape the future of CPU verification at Arm while advancing your own career. Join our CPU design verification team and play a key role in delivering Arm's strategic goals! #LI-KR2

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Overview: We are seeking ambitious and authentic software developers to join our team at DevRev. In this role, you will tackle challenging problems, build robust infrastructure to support AI/ML applications, and enhance user experiences. A solid understanding of operating systems, distributed systems, databases, and networking concepts, coupled with the ability to design scalable, memory-optimized, and high-performance systems, will be essential for success. As a software developer at DevRev, you will have the opportunity to create impactful solutions and collaborate with a dynamic, global team. Minimum Qualifications: Bachelor s or Master s degree in Computer Science or a related technical field. Strong experience with software development, including proficiency in Java, Golang, or Python. Demonstrated expertise in memory and performance optimization. Practical knowledge of Agile development processes and methodologies. A creative problem-solving mindset with a passion for innovation. Preferred Qualifications: 5+ years of programming experience in two or more of the following languages: Java, Golang, or Python. Proven experience in designing and developing microservices-based scalable architectures. Hands-on experience with cloud technologies such as AWS Lambda, SQS, DynamoDB, etc. Experience building and maintaining large-scale systems in multi-tenant environments. Culture: At DevRev, our culture is grounded in the values of hunger, humility, honesty, and acting with heart. We are driven by the vision of building the world s most customer-centric companies. Our mission is to leverage design, data engineering, and machine intelligence to empower engineers to better connect with and serve their customers. Qualification : Bachelors or Masters degree in Computer Science or a related technical field.