System Level Power Analysis Jobs in Bengaluru

Gen AI Support Engineer-2 Location: Bengaluru Experience: 4 7+ years Employment Type: Full-time About Us Exotel is the leading full-stack customer engagement platform and virtual telecom operator for emerging markets. Since its inception in 2011, Exotel has been powering 50 million daily engagements across voice, video, and messaging channels. We provide our unified customer engagement solutions to over 6000 companies globally, including industry leaders like Ola, Swiggy, Flipkart, GoJek, Byjus, Urban Company, HDFC Bank, Zomato, and Oyo. With $100 million in Series D funding and an ARR of $60 million, Exotel is a growth-stage company poised for massive impact. Overview We're seeking a Gen AI Support Engineer-2 to join our team. As an L2 Support Engineer, you will be the highest level of technical escalation within the support organization. Your role will encompass system reliability, platform integrity, troubleshooting mission-critical production issues, and collaborating with engineering teams for architecture feedback. Additionally, you'll help mentor junior engineers and improve operational processes and tools for large-scale environments. If you're passionate about writing clean code with Python and Django and want to contribute to a fast-paced, mission-driven company, this role is for you! Responsibilities Mission-Critical Issue Resolution: Own the resolution of high-priority, time-sensitive production issues. Root Cause Analysis (RCA): Lead RCA reviews and push for systemic improvements in system architecture and processes. Performance Optimization: Identify bottlenecks and propose architectural changes to improve system performance and scalability. Patch Management: Assist in configuring, deploying, and testing patches, releases, and application updates to production environments. SME for Production Systems: Serve as the Subject Matter Expert (SME) for Exotel's production systems and integrations. Cross-Team Collaboration: Work with Delivery, Product, and Engineering teams to influence system design, rollout strategies, and improvement plans. Mentorship: Lead and mentor L1/L2 engineers on troubleshooting best practices and continuous learning. Code Writing & Automation: Write clean, maintainable code for internal tools, scripts, and automation using Python and Django. Support Tooling: Automate recovery workflows and design support tools for proactive monitoring. Operational Excellence: Establish and improve SLAs, monitoring dashboards, alerting systems, and operational runbooks to ensure system reliability. Must Have Skills Backend Development Support: 3+ years of experience in backend development support, production support, or DevOps/SRE roles. Core Technologies: Proficiency in Python, Django, SQL, and troubleshooting in Linux. Web Technologies: Strong understanding of HTML, CSS, JavaScript, and other web technologies. Distributed Systems & Cloud: Experience working with distributed systems, cloud architecture (AWS), Docker, and Kubernetes. Automation: Strong scripting skills with Bash/Python for automation and operational support. CI/CD & Observability: Good understanding of CI/CD, observability tools, and release management workflows. Communication Skills: Excellent communication, leadership, and incident command skills for managing production issues and cross-functional collaboration. Nice to Have Experience with AI-powered systems and machine learning technologies. Familiarity with monitoring systems like Prometheus, Grafana, or Elasticsearch. Knowledge of microservices architectures and scaling distributed systems. Innovative Work: Be at the forefront of cloud-based communications technology and AI-driven customer engagement platforms. Impact: Play a key role in maintaining and optimizing systems that power millions of customer interactions daily. Growth Opportunities: Be part of a fast-growing company with ample learning opportunities and career development. Collaborative Environment: Work in a supportive, inclusive environment where your input and ideas matter. Competitive Benefits: Comprehensive benefits package including health insurance, mental wellness support, and more.

Job Title: Lead Associate Software Engineering (COBOL) Location: Bengaluru Employment Type: Full-Time Level: Senior Engineer About BetaNXT BetaNXT is building the future of connected wealth management infrastructure, combining real-time data capabilities with deep industry expertise to elevate the advisor and investor experience. Through the power of our trusted platforms Beta, Maxit, and Mediant we are modernizing legacy systems and solving the most complex integration challenges in wealth management. Our mission: streamline operations, enhance productivity, and unlock enterprise scalability for financial institutions. About the Role We are looking for a Lead Associate Software Engineering with strong experience in MicroFocus and Veryant COBOL to join our product engineering team. In this hands-on leadership role, you ll design, build, and modernize high-performance systems that support critical financial workflows in both client/server and cloud environments. This is an excellent opportunity for someone who thrives in legacy modernization, enjoys solving complex integration problems, and is passionate about writing clean, secure, and scalable code. Key Responsibilities Design and develop new features for enterprise systems using MicroFocus/Veryant COBOL. Refactor and modernize legacy code for scalability, performance, and maintainability. Architect solutions for new and existing applications in client/server and cloud-hosted environments. Perform code reviews, ensure secure coding practices, and guide team members on design and implementation. Collaborate with cross-functional Agile teams (Product, QA, DevOps) to deliver end-to-end technical solutions. Write clean, modular, and well-documented code; enforce coding standards across the team. Translate user requirements into effective software design. Ensure high code quality and application performance through best practices and testing. Monitor production systems, support deployments, and troubleshoot full-stack issues. Document system architecture, APIs, and technical specifications. Required Qualifications Bachelor s or Master s degree in Computer Science, Software Engineering, or related field. 3 5 years of hands-on experience in software development, with recent focus on COBOL-based systems. Experience with MicroFocus/Veryant COBOL and ISAM file systems. Hands-on knowledge of GitLab for source control, CI/CD pipelines, and version management. Proven experience leading Agile development teams and mentoring junior engineers. Solid understanding of the software development life cycle (SDLC) and Agile methodologies. Strong problem-solving skills and the ability to work independently as well as in a team environment. Demonstrated success in delivering complex projects from design through deployment. Preferred Qualifications Experience with: XML, VS Code IDE PowerShell or other scripting languages Exposure to application performance tuning, monitoring tools, and system health diagnostics. Knowledge of financial services or experience working with mission-critical enterprise platforms. Personal Attributes Self-starter with a growth mindset and eagerness to learn new technologies. Comfortable working across legacy systems and modern cloud-based solutions. Strong attention to detail and commitment to quality. Thrives in fast-paced, collaborative environments. Passion for solving large-scale technical challenges. Be part of an organization modernizing wealth management infrastructure at scale. Work on mission-critical systems used by top-tier financial institutions. Collaborate with a high-performing, globally distributed engineering team. Grow your career in an environment that values innovation, autonomy, and continuous learning. Qualification : Bachelors or Masters degree in Computer Science, Software Engineering, or related field

Position: Junior/Senior Design Engineer Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication / Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 2 to 4 years Job Overview We are looking for a passionate and detail-oriented Hardware Design Engineer (Junior/Senior level) to join our engineering team in Bangalore. In this role, you will be responsible for designing high-performance embedded hardware systems, from circuit design and schematic capture to board bring-up and testing. You ll work closely with cross-functional teams to deliver robust, scalable, and reliable hardware solutions, primarily for embedded and defense applications. Key Responsibilities Execute assigned hardware design tasks within defined timelines. Design and develop complex hardware circuits, schematics, and PCB layouts. Perform Signal Integrity (SI), Power Integrity (PI), and thermal analysis. Develop hardware test plans and execute board/system testing accordingly. Conduct board bring-up, validation, and debugging of hardware platforms. Participate in design reviews, defect prevention, and continuous improvement activities. Adhere to all QMS (Quality Management System) and project-specific processes. Prepare detailed technical documentation and maintain design records. Flag and resolve any technical challenges with guidance from tech leads. Technical Skill Set Strong expertise in circuit design, schematic capture, and PCB design. Hands-on experience with 16-bit or 32-bit processors/microcontrollers (e.g., ARM, PowerPC, IBM PPC 405, Intel x86). Experience with FPGA-based board designs. Good understanding of high-speed board design and signal integrity concepts. Familiarity with system interfaces: PCI, PCIe, VME, Compact PCI, ATCA/AMC is a plus. Exposure to embedded hardware design for defense applications. Understanding of qualification processes for industrial/defense-grade products. Proficiency in board bring-up and hardware debugging techniques. Technology Domains Storage Technologies: iSCSI, SATA, Fibre Channel Processors: MIPS, ARM, PowerPC Interfaces: USB, PCIe, PCI-X Memory: DDR, DDR2, RLDRAM Soft Skills & Attributes Strong verbal and written communication skills Excellent interpersonal and teamwork abilities Proactive and solution-oriented mindset Strong time management and organizational skills Opportunity to work on cutting-edge hardware design projects in embedded and defense domains Exposure to the complete hardware development lifecycle Collaborative and inclusive work culture Learning and development support Competitive compensation package Qualification : M.E./M.Tech. in Electronics & Communication

Position: Technical Lead / Project Lead Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication or Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 5 to 8 years Job Overview We are seeking a dynamic and experienced Technical Lead / Project Lead Hardware Design to join our engineering team in Bangalore. In this leadership role, you will guide a team of hardware engineers through the end-to-end design and development of advanced embedded and FPGA-based systems primarily for defense and industrial applications. You'll be responsible for ensuring high-quality, defect-free, and timely project deliveries while driving technical excellence and process adherence. Key Responsibilities Technical Leadership Lead hardware design projects from specification to delivery, ensuring robust and scalable solutions. Provide technical guidance to team members in circuit design, schematic development, and board-level design. Finalize board specifications based on customer requirements and prepare detailed technical documentation. Review hardware modules and ensure compliance with design best practices and industry standards. Lead Signal Integrity (SI), Power Integrity (PI), and thermal analysis during design and validation phases. Project Management Plan, monitor, and track project schedules, resource allocation, and delivery milestones. Coordinate with the Project Manager and cross-functional teams to ensure alignment and timely progress. Conduct internal project meetings, present status updates, and recommend process or technical improvements. Ensure adherence to QMS guidelines, project processes, and quality goals. Team Development & Support Mentor junior engineers and support individual learning and development plans. Manage a small team, resolve technical and interpersonal challenges, and promote a collaborative work environment. Assist in performance reviews and team development initiatives. Quality & Process Improvement Drive defect prevention initiatives and participate in continuous improvement of design processes. Coordinate configuration management and quality control activities throughout the project lifecycle. Technical Skill Set Strong hands-on experience in FPGA-based board design and embedded hardware development. Expertise in system-level architecture, processor interfaces, DDR memory design, serial bus protocols, and networking. Proficient in board bring-up and debugging at system level. Experience with embedded hardware design for defense applications and understanding of qualification processes. Tools: Schematic capture/layout: OrCAD, Allegro Signal integrity tools for SI/PI analysis Soft Skills Excellent verbal and written communication skills Strong people management and leadership capabilities Effective time management, organization, and planning Proven ability to manage small teams and drive project success Familiarity with quality systems and engineering best practices Opportunity to work on cutting-edge, high-impact hardware projects Collaborative and technically strong work environment Competitive compensation and benefits package Focus on leadership development and continuous learning Dynamic and inclusive workplace culture Qualification : M.E./M.Tech. in Electronics & Communication

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Software Development Manager CephFS Location: Bangalore, Karnataka, India Job Type: Full-Time Experience Level: Senior / Leadership Company: IBM Ceph Engineering Team Education: Bachelor s Degree (Master s preferred) Introduction: At IBM, we re not just redefining business we re redefining what s possible through technology, collaboration, and innovation. As one of the world's leading technology companies, IBM is transforming industries through the power of AI, Cloud, Analytics, Security, and IoT. With a presence in over 170 countries, we bring together diverse minds to solve complex challenges and build a smarter future. Join IBM s Ceph Engineering Organization and be a part of shaping the future of software-defined distributed storage. We're looking for an experienced and visionary Software Development Manager to lead the CephFS team the group responsible for the file system layer of the Ceph ecosystem. About the Role: As a Software Development Manager for CephFS, you ll play a key leadership role in designing, developing, and delivering new capabilities in CephFS, the scalable and highly available POSIX-compliant distributed file system built atop Ceph. You ll lead a global team of engineers, working in an open-source community, to develop enterprise-grade storage solutions for modern workloads. You will focus on building next-generation distributed file system features like instant cloning, file overlays, coherent snapshots, and advanced client-side caching. This role is a mix of hands-on technical leadership and people management, with strong collaboration across open-source communities, IBM product teams, and clients. Key Responsibilities: Lead and mentor a team of talented engineers working on CephFS. Drive the design and implementation of new distributed features and algorithms for file system scalability, performance, and resiliency. Collaborate with the global Ceph open-source community to contribute and review code, resolve issues, and plan new features. Guide the team in debugging complex production issues, both live and offline. Collaborate with client-facing and support teams to perform root cause analysis for customer-reported issues. Contribute to the architecture and roadmap of CephFS in alignment with product and client needs. Engage in code reviews, triaging, and architectural discussions. Promote engineering best practices and a culture of continuous improvement. Required Skills & Experience: Bachelor s degree in Computer Science or related field. Strong experience working with C++ or other systems programming languages. Excellent debugging skills (live system and core file analysis). Hands-on experience in open-source development (preferably with contributions to GitHub). Good understanding of large-scale codebases and the ability to design and implement major features or changes. Comfortable working with Python for automation and testing. Proficiency with Git and GitHub workflows. Excellent verbal and written English communication skills to coordinate with a distributed, global team. Proven ability to mentor and support engineers while driving technical excellence. Preferred Qualifications: Master s degree in Computer Science or related field. Experience in building or maintaining file systems or distributed storage platforms. Prior work in distributed systems, high-performance computing, or cloud-native storage. Experience working in remote/distributed teams. Familiarity with systems like OpenStack, Kubernetes, or NFS-Ganesha. Work with world-class engineering teams on products that power global enterprise infrastructure. Be part of a vibrant open-source community, contributing to widely adopted storage technologies. Enjoy a culture of continuous learning, innovation, and impact. Competitive salary, benefits, and flexible work arrangements. Be essential. Be a leader in redefining how the world stores and accesses data. Apply today to join IBM s CephFS team and help build the future of enterprise file storage. Qualification : Bachelors degree in Computer Science or related field.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience in micro architecture and requirements/implementation for automotive designs (focused on functional safety) and their Safety Analysis work products like concept FMEDA, DFA, DFMEA, FTA, FMEDA, etc. including FuSa compliant IP development and third-party IP compliance/deliverables/DIA. Responsibilities shall include the following: Developing a system level safety concepts and requirements for ADAS and IVI use cases with customer implementations in mind and to integrate Qualcomm s hardware in leading Automotive OEM and Tier 1 safety critical systems. Work in collaboration with 3rd party, Customer, and Automotive Stack suppliers, Hardware component suppliers (PMIC, DRAM, Sensor, etc) to ensure all aligned customer system level requirements are met Work with IP and SoC teams on the implementation of Technical Safety Concepts (TSCs) on Qualcomm s Snapdragon automotive hardware. Work with various technology teams on architectural features that would enable targeted safety levels (ASIL B to ASIL D, depending upon the technology team and system level requirements) to meet customer targets Conducting safety analyses, both quantitative and qualitative, fault campaigns on automotive hardware designs and identify areas of improvement. Responsibilities will include leading functional safety related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, development processes and work products. Work closely with SoC Design and IP teams, Software team, Quality teams, the functional safety manager(s) as well as customers to ensure the functional safety process is executed and documented. Working with vendors and partners to ensure functional safety requirements are fulfilled by the components that they provide Work with internal and external functional safety assessors to ensure compliance with ISO 26262 Create functional safety collateral for customers viz. Functional Safety Manual, Safety Analyses Reports, dedicated application notes etc. Supporting customer assessments of our safety features and recommending HW and SW based solutions that meet overall system targets. Working closely with customers and supporting them on various functional safety related aspects Minimum Qualifications Bachelor s degree in engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering, SoC Integration, Verification, or related work experience. Collaborative work experience with good communication skills involving customers, vendors, and internal development teams. Structured problem-solving capability and ability to work with teams on root cause analyses. Preferred Qualifications 5+ years Automotive experience and familiarity with Safety work products, experience with Functional Safety Hardware and/or Software development in semiconductor industry meeting IS0 26262/ IEC 61508 standards. Prior automotive experience in ADAS and self-driving systems preferred. System level Functional safety analysis experience on Hardware/Software components integration preferred SoC/IP integration or verification with good understanding of SoC Architecture and IP design experience preferred Requirements Management Tools and establishing traceability for functional safety requirements e.g. DOORS, etc. Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) is required experience using tools to perform FMEA, FTA preferred Familiarity with hardware failure rate calculation (FMEDA) experience using Siemens 29500 and/or IEC 62380 preferred Relevant Safety Certification is desired e.g. CFSE, CFSP Qualification : Bachelors degree in engineering, Information Systems, Computer Science, or related field.

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

Job Title: Associate Technical Architect Software Development Experience Level: 6+ years Location: Mumbai / Bangalore About Us At Quantiphi, technology drives our business, but our diverse and inclusive culture powers our success. We believe in fostering an environment built on transparency, integrity, learning, and growth all while valuing each individual s unique contribution. If you re excited to work in a collaborative space that encourages innovation and helps you grow both professionally and personally, we would love to have you on board! Role Overview We are seeking a Software Architect with a passion for combining design and programming. In this role, you will translate UI/UX wireframes into functional, high-performance code and shape the visual and technical structure of our applications. You will collaborate closely with designers and developers, ensuring seamless design-to-code translation and optimal user experiences. Key Responsibilities Develop new user-facing features and front-end components. Design and implement scalable, stateless/stateful APIs that integrate with UI, databases, and external systems. Apply industry-standard security best practices across application development. Build reusable code and libraries to drive efficiency. Ensure UI/UX designs are technically feasible. Optimize applications for speed, responsiveness, and scalability. Collaborate closely with designers, developers, and stakeholders to deliver high-quality solutions. Architect cloud-native and scalable applications. Technical Skills Required Strong proficiency in Node.js, Angular, and React.js. Experience with jQuery, JSON, AJAX, RESTful web services. Expertise in JavaScript frameworks/libraries (Node.js, AngularJS, ReactJS, Jasmine, Ember). Proficiency in build tools like Grunt, Gulp, and Bower. Deep understanding of front-end technologies: HTML5, CSS3, JavaScript (ES6+), jQuery. Hands-on experience with client-side MVC frameworks (Node.js, ReactJS, NextJS, Redux, AngularJS). Strong database skills, including data modeling and query optimization (MySQL, PostgreSQL, MongoDB, DynamoDB). Expertise in building secure REST APIs. Understanding of cross-browser compatibility and responsive design. Proficient in code versioning tools like Git. Good knowledge of SEO principles. Strong grasp of front-end frameworks like Bootstrap and Material UI, along with preprocessors like SASS/LESS. Experience in object-oriented design and software design patterns. Excellent debugging and creative problem-solving skills. Leadership & Collaboration Lead technical teams and mentor junior developers to accelerate performance. Drive code reviews and enforce best practices to maintain high code quality. Provide technical thought leadership and introduce best practices to the project. Manage stakeholder expectations and resolve conflicts effectively. Clearly communicate technical concepts to both technical and non-technical audiences. Collaborate across departments (BA, Designers, QA, Architects) to ensure successful delivery. Nice to Have Experience working with cloud platforms like Google Cloud, AWS, Azure. Knowledge of microservices architecture and API gateway integration. Familiarity with design tools such as Photoshop, Illustrator, Figma, Sketch, XD. Experience with containerization (Docker/Kubernetes) and distributed computing. Exposure to Elasticsearch. Hands-on with Agile methodologies, TDD, Pair Programming, and Rapid Prototyping. Experience documenting technical design and processes. Knowledge of Apollo, GraphQL, Moment.js is a plus. Experience with UX/UI design is an added advantage. If you thrive in a fast-paced environment, love solving complex challenges, and enjoy collaborating with passionate teammates, Quantiphi is the place for you!

Job Description: As a Staff Engineer in Arm's Solutions Engineering group, we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance, and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools, and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design, and implementation of CPU cores, system interconnect, and other Arm IP. Analyze design timing, area, and power to help improve the quality of Arm IP. Develop and deploy new methodologies to improve implementation efficiency and results. Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience: Bachelor s or Master s degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields. 8+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM, and Physical verification. Possess a high level of dedication, initiative, and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies, and promoting their use with international teams. Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Experience working closely in top and block-level Synthesis, Floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, and power analysis flows. Proven programming and scripting skills (e.g., Tcl, Perl, and R). Nice To Have Skills and Experience: Knowledge around Arm-based SoCs! Experience with a wide range of programming, scripting & data presentation languages (e.g., Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python, and Ruby). Experience with low-power design techniques (power gating, voltage/frequency scaling). Experience with Verilog RTL design. Experience with ATPG tools and/or production testing. In Return: Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals and do not discriminate on the basis of any characteristic. #LI-KR2 Qualification : Bachelors or Masters degree equivalent in Electrical Engineering, Computer Engineering, or other relevant technical fields.

Job Description Intel is seeking an experienced Systems Engineer to drive the design, development, and integration of hardware, firmware, and software solutions for Xeon-based platforms. The role focuses on system architecture, performance optimization, and technical risk assessment while ensuring scalability, reliability, and security in system implementations. The ideal candidate will work on customer-centric solutions, influencing next-generation system design and conducting proof-of-concept experiments to validate new features and technologies. Key Responsibilities: System Architecture & Design: Define, develop, and optimize end-to-end solutions integrating software, firmware, board, and silicon/SoC components. Customer-Centric Solutions: Translate business opportunities into use cases, develop product specifications, and implement solutions based on customer needs and system limitations. Performance & Reliability Optimization: Conduct design analysis, assess technical risks, and optimize for security, scalability, and maintainability. Hardware Validation & Debug: Perform schematic reviews, layout verification, mechanical/thermal analysis, and electrical validation (including Signal Integrity (SI) analysis). System Integration: Ensure smooth hardware-software integration, identifying and resolving hardware issues at the component and system levels. Lab-Based Proof-of-Concept Testing: Conduct real-life environment simulations, prototype testing, and performance benchmarking. Documentation & Knowledge Sharing: Develop technical documents, customer presentations, and training materials to enhance internal and external knowledge sharing. Industry Research & Collaboration: Engage in academic and industry research, driving innovation beyond existing solutions. Qualifications & Experience: Educational Requirements: B.E/B.Tech in Electronics & Communication, Computer Science, or a related field. Minimum of 10 years of relevant industry experience. Technical Expertise: Experience in Xeon platform hardware design and validation. Strong knowledge of schematics, PCB layout, mechanical, and thermal analysis. Experience with electrical validation, signal integrity (SI), and power integrity (PI) analysis (desirable). Expertise in hardware issue validation, debugging, and system integration. Strong problem-solving and analytical skills for complex, multi-layered system architectures. Excellent technical documentation and presentation skills. About Intel Validation Engineering (iVE) Group: The Intel Validation Engineering (iVE) Group plays a pivotal role in Intel s technology leadership, validating, debugging, and optimizing Intel s cutting-edge designs. iVE ensures that Intel's next-generation products meet the highest quality standards, enabling Intel to deliver world-class technology platforms. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a top-tier compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.E/B.Tech in Electronics & Communication, Computer Science, or a related field.

Job Title: Power Optimization & Performance Engineer Windows Platforms Job Description: Intel is seeking a Power Optimization & Performance Engineer to drive power efficiency and responsiveness enhancements across Windows platforms. The role involves deep analysis of software workloads, power-performance tuning, and debugging complex system-level issues to optimize Intel s laptop and desktop platforms. The engineer will work closely with platform architects and cross-functional teams to define power-performance metrics, develop battery life improvement strategies, and drive forward-looking technology readiness initiatives. Key Responsibilities: Power & Performance Analysis: Perform in-depth analysis of software flows at the trace, thread, and process ID levels to identify power optimization opportunities and performance bottlenecks. Platform Power Optimization: Leverage state-of-the-art analysis tools to identify and resolve battery life and performance issues in domains such as Graphics, Multimedia, Display, Imaging, and CPU. Technical Leadership & Troubleshooting: Diagnose complex system-level power and performance issues, demonstrating strong debugging expertise in Windows-based Intel platforms. Cross-Team Collaboration: Work with platform architects and engineers to define power-performance metrics, optimize power delivery across SoC components, and influence next-generation platform architectures. Windows OS & Driver Optimization: Identify and drive power savings features or performance tuning opportunities into current and next-gen Intel platforms. Collaborate with OS and driver teams for power-aware enhancements. Future Technology Readiness: Analyze expected vs. actual platform behavior, propose forward-looking enhancements, and influence SoC and Windows OS architectures. Qualifications & Experience: Educational Requirements: B.Tech/M.Tech in Electronics or Computer Engineering or related fields. Technical Expertise: Embedded Systems & Software Development: Experience in software/firmware development, integration, or validation. Platform Power Management: Understanding of CPU/SoC architecture, power delivery, sensors, memory, storage, display, multimedia, and imaging subsystems. OS & System Debugging: Strong grasp of Windows OS fundamentals, system-level debugging, and exposure to firmware & device drivers. Windows Debug Tools: Experience with Windows Driver Debugging and Windows Debug tools (preferred). Power & Performance Optimization: Hands-on experience with power-performance measurement, analysis, and benchmarking. Analytical & Problem-Solving Skills: Ability to troubleshoot complex system issues and propose efficient power-saving techniques. Excellent Communication & Collaboration: Strong ability to interact across teams and drive technical discussions. About Intel s Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-ones. As Intel s largest business unit, CCG is dedicated to enhancing PC experiences, fostering innovation, and delivering market-leading computing solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer that values diversity and welcomes applications from all qualified candidates, regardless of gender, nationality, disability, or other protected status. Intel offers a highly competitive compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive health, retirement, and vacation benefits. Access to cutting-edge technology and career growth opportunities. Qualification : B.Tech/M.Tech in Electronics or Computer Engineering or related fields.

Experience Level: 4+ years (Bachelor s), 3+ years (Master s), or 2+ years (PhD) Preferred Domains: Embedded Systems, Mobile, IoT, Automotive General Summary: We are seeking a highly skilled Systems Engineer with experience in post-silicon validation, system modeling, and power-performance optimization. The ideal candidate will work on cutting-edge embedded systems with a focus on CPU, GPU, and AI workload performance. This role offers an opportunity to collaborate with cross-functional teams to optimize SoC performance and contribute to next-generation product innovations. Preferred Qualifications: Experience in as many of the following areas is desirable: Embedded Systems & Mobile/IoT/Auto Domains: Hands-on experience with complex embedded systems and SOC performance. Post-Silicon Validation: System validation, performance analysis, and feedback to influence future product development. Power & Performance Analysis: Analyzing power-performance data for various CPU, GPU, and AI workloads/benchmarks. System Modeling & Profiling: Expertise in power/performance use cases, SOC profiling, PPA tradeoffs, and product qualification. CPU Microarchitecture: Knowledge of cache, latency, bandwidth analysis, and optimization. Linux/Android Kernel Development: Experience with device driver development, Android architecture, and system programming. Power Optimization: Experience with DVFS/DCVS governors and power management at the system level. Hands-On Lab Experience: Familiarity with DAQs, oscilloscopes, JTAG, ARM Developer Studio, and power data acquisition. Automation & Scripting: Proficiency in Python, shell scripting, ADB shell, and automation environments for Linux/Android systems. Collaboration & Leadership: Ability to work with internal teams and external partners for analysis and optimization. Acts as a tech lead and provides guidance to engineering teams. Tools & Version Control: Exposure to Git, Jira, Android, and QTI tools. Key Responsibilities: Perform post-silicon validation of SoC performance and architecture. Analyze and optimize power-performance trade-offs in collaboration with architecture teams. Develop and enhance tools to assist in performance analysis and workload characterization. Drive power and performance optimization for CPUs, GPUs, and AI workloads. Provide technical leadership and guide teams on system-level optimization and validation. Collaborate with internal and external teams to achieve performance goals. Minimum Qualifications: Bachelor s degree in Engineering, Information Systems, Computer Science, or a related field and 4+ years of relevant experience. Master s degree in Engineering, Information Systems, Computer Science, or a related field and 3+ years of relevant experience. PhD in Engineering, Information Systems, Computer Science, or a related field and 2+ years of relevant experience. Skills: Strong understanding of computer architecture and OS fundamentals. Excellent communication and presentation skills. Ability to manage tasks independently and work in a fast-paced environment.

Job Overview Qualcomm is a leading technology innovator, pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various systems like Digital/Analog/RF/optical systems, FPGA, and DSP systems. You will collaborate with cross-functional teams to develop world-class products that meet performance requirements. Key Responsibilities Front-End Implementation: Develop and implement MSIP designs, including Temp/Voltage/Security Sensors and Controllers. RTL Development: Design, validate, and ensure the proper functioning of RTL for linting, clock-domain crossing, conformal low power, and DFT (Design for Test) rules. Verification: Work with the functional verification team to create test plans, debug issues, and ensure that all designs meet the required specifications. Timing Constraints: Develop timing constraints, deliver synthesized netlists to the physical design team, and provide support for Physical Design STA (Static Timing Analysis). Low Power Checks: Write UPF (Unified Power Format), perform power-aware equivalence checks, and ensure compliance with low-power design standards. DFT Insertion & Analysis: Perform DFT insertion and ATPG (Automatic Test Pattern Generation) analysis for optimal SAF (Scan Acceptance Fault) and TDF (Transition Delay Fault) coverage. SoC Integration Support: Provide support for SoC integration and pre/post-silicon debugging at the chip level. Minimum Qualifications Education: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of relevant experience, or Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of relevant experience, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. Skills & Experience Educational Background: MTech/BTech in EE/CS with 3+ years of hardware engineering experience. Technical Experience: Expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debugging is a plus. Collaboration: Ability to work effectively with teams across the globe and possess strong communication skills. Qualification : MTech/BTech in EE/CS with 3+ years of hardware engineering experience.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification. Preferred qualifications: Master's degree in Electrical Engineering, Computer Science, or a related field. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design. Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions. Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc. Qualification : Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

Job Summary: We are seeking a highly skilled Internal Controls Quality Assurance Analyst to join our team and support our compliance and control environment. This is an exciting and challenging role where you will be responsible for Journal Entry (JE) & reconciliation analysis and reviews, ensuring accuracy and completeness in line with DXC finance policies. You will drive review calls with the JE posting and account reconciliation teams, manage end-to-end case processes, and engage stakeholders to resolve complex financial issues. The role requires proficiency in financial systems, data analysis, and expertise in financial reporting tools. Key Responsibilities: Perform JE & reconciliation analysis and reviews against pre-agreed KPIs. Conduct comprehensive and error-free analysis and reporting on JE posting and account reconciliation. Exhibit a keen understanding of finance policy requirements and apply them in daily tasks. Lead review calls with JE posting and account reconciliation teams, ensuring thorough analysis. Manage cases end-to-end, including effective interaction with both internal and external stakeholders. Engage stakeholders in identifying and solving moderate to complex financial issues or concerns. Provide expertise in SAP, Oracle, and other financial systems to ensure accurate processing and reporting. Lead or contribute expertise to functional project teams and cross-functional initiatives. Train, mentor, and monitor peers and team members to ensure adherence to quality standards and timelines. Education and Experience Required: First-level university degree in finance or accounting discipline (preferably MCom in Accountancy, CA Intermediates, or CAs). 9+ years of experience in Record-to-Report (R2R), including but not limited to JE posting and reconciliation of balance sheet accounts. Experience in transactional review and analysis is highly preferred. Experience interacting with internal and external customers is an added advantage. Exposure to working in a target-based model is desirable. Knowledge and Skills Required: Strong understanding of financial systems (P&L, Balance Sheet, etc.). Advanced proficiency in Excel (macros, large data set analysis), and working knowledge of Power BI. Strong oral and written communication skills, with the ability to clearly present findings and reports. Strong PowerPoint skills for creating effective presentations. Expert proficiency in SAP/Business Intelligence/EDW, and knowledge of LH GL/LH BW is preferred. Strong analytical skills with the ability to handle large data sets and financial reconciliation tasks. Deep understanding of accounting principles and their application in financial analysis. Strong leadership skills to manage teams and ensure process alignment. Time management skills and the ability to prioritize tasks effectively. Ability to design and improve financial processes for efficiency and compliance. Why Join Us? This role offers an opportunity to contribute to an essential part of the internal controls and finance operations at DXC. You'll work with a dynamic team, drive process improvements, and play a key role in ensuring compliance and accurate financial reporting. If you have a strong accounting background and enjoy working in a collaborative and fast-paced environment, this is the perfect role for you. Qualification : First level university degree in finance/accounting discipline. Mcom in accountancy or CA intermediates/ CAs will be preferred

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

Job Overview: We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : 8+ Years of Experience in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises #LI-KR2 Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Qualification : A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture.

Introduction System Engineers at IBM are integral to the company's strategic initiatives, ensuring the design, coding, testing, and delivery of cutting-edge solutions that power critical global systems. From ensuring transportation runs seamlessly to enabling secure financial transactions, the role of System Engineers is pivotal. At IBM, you ll leverage advanced development tools and work with industry-leading experts to create solutions you can take pride in. Your Role and Responsibilities We are seeking a skilled Windows Administrator to manage and maintain Windows operating systems and server networks within a critical cloud environment. In this role, you will: Install or upgrade Windows-based systems and servers. Manage user access to servers and maintain network stability and security. Troubleshoot and resolve complex IT issues. Enhance operational efficiency through automation and collaboration. This position demands a high level of technical expertise and a proactive approach to solving challenges. A successful Windows Administrator ensures seamless operations while upholding the highest security standards. Responsibilities Include: Managing critical IaaS infrastructure supporting customer workloads. Allocating and managing tools, frameworks, and assets to enhance engineering productivity and service delivery. Promoting consistent and efficient practices across teams. Who You Are You are a curious and passionate technologist eager to innovate and adopt emerging technologies. Your technical foundation is solid, and you thrive in dynamic environments, juggling multiple responsibilities to deliver integrated solutions. Who You'll Work With You will collaborate with a diverse and dynamic team, including architects, QA specialists, product managers, and delivery teams. This role promises variety, innovation, and the opportunity to make meaningful contributions daily. Required Education Bachelor s Degree Required Technical and Professional Expertise 3+ years of experience in Windows OS administration, including installation, upgrades, and troubleshooting. Expertise in setting up and configuring Windows Active Directory. 3+ years of hands-on experience with PowerShell scripting. Preferred Technical and Professional Expertise Proficiency in network configuration and troubleshooting. Experience with backup and recovery solutions. By joining IBM, you ll contribute to a collaborative environment where innovation meets practical application, driving solutions that make the world run better. Qualification : Bachelor's Degree