Ultrasonic Wave Propagation Jobs in Bengaluru

Job Title: USS Calibration Engineer / Acoustic Engineer Position Overview: We are seeking a highly skilled USS Calibration Engineer / Acoustic Engineer to join our team. This technical systems role requires a deep understanding of the principles and functioning of ultrasonic sensor technology used in the automotive industry. The role focuses on manipulating automotive-grade ultrasonic sensor settings to achieve precise detection goals. Key Responsibilities: Ultrasonic Sensor Calibration: Calibrate automotive ultrasonic sensors to achieve optimal detection accuracy under varying environmental conditions. Signal Processing and Interpretation: Apply signal processing techniques for the accurate calibration and interpretation of sensor data, ensuring reliable sensor performance. Data Analysis: Analyze data generated by ultrasonic sensors and troubleshoot issues related to sensor calibration and performance. Testing and Troubleshooting: Set up controlled testing environments to calibrate sensors accurately and troubleshoot performance issues. ISO Standards Compliance: Ensure that ultrasonic sensor features meet ISO standards for automotive applications. Essential Skills: Ultrasonic Sensor Technology: In-depth knowledge of ultrasonic sensor technology, including its functioning and application in automotive systems. Sensor Calibration and Performance: Expertise in calibrating sensors and optimizing their performance for various automotive applications. Preferred Skills: Automotive Ultrasonic Features: Experience with automotive ultrasonic features and standards, particularly those related to detection and performance optimization. This position is ideal for candidates with a strong background in ultrasonic sensor technology and sensor calibration, particularly within the automotive industry. If you have a deep understanding of signal processing, data analysis, and calibration techniques, we encourage you to apply!

Technical Requirements: 1. RTL Design Expertise: Strong experience in RTL (Register Transfer Level) coding, with a good understanding of logic design principles. Proficiency in writing efficient, optimized RTL code using Verilog, System Verilog, or VHDL. 2. SDC and Constraints Syntax: Deep understanding of SDC (Synopsys Design Constraints) and constraints syntax used in synthesis. Experience in writing and managing timing constraints for designs at both the block and SoC levels. 3. Synthesis Experience (Block/SoC Level): Extensive hands-on experience in synthesis at both block and SoC (System on Chip) levels, ensuring efficient design implementation. Familiar with logical synthesis and physical synthesis techniques for optimizing RTL code. 4. Low Power Synthesis: Experience in low-power synthesis, using techniques such as clock gating, power gating, and multi-voltage domain design to reduce power consumption while maintaining design performance. 5. Optimization Techniques: Strong knowledge of optimization techniques to achieve the best Performance, Power, and Area (PPA) for designs. Familiarity with logic restructuring, retiming, and other optimization strategies to improve design efficiency. 6. Synthesis Tools and Methodologies: Expertise in Synopsys Design Compiler (DCT/DCG) or Cadence Genus/RC for synthesis. Experience with hierarchical synthesis, DFT (Design for Test) handling, and scan insertion. 7. Multi-Power Domain Designs: Familiarity with multi-power domain designs, including managing different power states for various blocks or subsystems in the design. 8. CPF (Common Power Format): Good knowledge of CPF (Common Power Format), used for managing power domains and low-power techniques across designs. 9. Timing and STA (Static Timing Analysis): Strong knowledge of timing concepts and STA for analyzing and ensuring timing closure of the design. Experience in LEC (Logical Equivalence Checking) and CLP (Clock Logic Propagation) to validate the functional correctness of the design. 10. Additional Tools & Concepts: Experience with tools like PTPX and Spyglass for timing analysis, power estimation, and linting. Knowledge of Functional ECO (Engineering Change Order) for making design modifications after the initial synthesis. Proficient in scripting with Perl/TCL for automating synthesis and verification tasks. Expectations from the Role: 1. Debugging and Problem-Solving: Strong debugging skills to identify and resolve issues in complex RTL designs and synthesis-related problems. Ability to troubleshoot synthesis issues related to timing, power, or design constraints. 2. Effective Communication: Excellent communication skills to interact with various stakeholders, including design teams, verification teams, and management. Ability to clearly articulate design choices, challenges, and solutions. 3. Project Focus and Ownership: Ability to stay focused on project goals and drive closure on timely delivery of design work. Ownership of assigned work and ensuring its completion within the agreed timelines. 4. Leadership Skills: Leadership abilities to guide and mentor junior engineers in the team. Ability to lead design projects, ensure best practices are followed, and promote a collaborative team environment. 5. Go-Getter Attitude: Proactive and self-driven with a Go-getter attitude, always seeking opportunities to improve designs, processes, and overall team performance. Ability to take initiative, stay motivated, and continually push for high-quality results. Ideal Candidate Profile: The ideal candidate should have a strong RTL design background with in-depth knowledge of synthesis techniques, low power design, and timing analysis. They should be well-versed with industry-standard tools such as Synopsys Design Compiler and Cadence Genus/RC, and have practical experience with multi-power domain designs. A deep understanding of SDC and timing constraints, along with strong debugging and problem-solving skills, is essential. Additionally, the candidate should have leadership potential, excellent communication skills, and a proactive attitude that drives results.

Job Description A Senior Associate Java IBM WebSphere Commerce/HCL Commerce Technologist is considered a senior contributor for complex modules of work by bringing deep core technology expertise and relevant business subject matter expertise to the table. Your Impact: Strong understanding of HCL Commerce runtime framework and architecture with strong knowledge of struts and spring frameworks. Hands-on skills and expertise in two or more of the sub-systems in HCL Commerce (e.g. Catalog, Order, Member, Marketing, Promotion sub-systems) Hands-on skills in the application data models, access control frameworks, and various utilities like Data Loader Utilities, DB clean, stage propagation, and schedulers. Strong understanding of the key configuration of HCL Commerce like Application Configuration, Search, Caching Experience in integrating HCL Commerce application with Web Content Management Systems (CMS), Order Management Systems, Product Information Management Systems, and other third party like payments gateway, shipping, tax provider s systems, Review and Rating systems analytics CDN, and social integration. Strong programming/development knowledge in specific Java technologies including JSP, Servlets, JSTL, JSP, REST Services, JDBC, and Spring Frameworks Experience with supported databases - Oracle/DB2 DDL, DML, writing triggers and stored procedures with complex SQL skills. #LI-REMOTE Qualifications Your Skills & Experience: Minimum 6-8 years of hands-on experience in developing/customizing e-commerce applications using IBM WebSphere Commerce / HCL Commerce packaged solution. Developer certification in HCL Commerce is preferred. Should understand the Fix Pack, Feature Pack, APAR/I-Fixes/Mod upgrades and should be able to analyze the impact of this on the application Understanding of WebSphere Application Server tools, certificate management, application security, understanding of various resources and configuration like cluster configuration, virtual hosts, connection pools, threads, trouble-shooting etc. Should understand the aspect of high availability, application failover and disaster recovery, application accessibility Should understand the architecture and benefits of cloud technologies and hybrid hosting technologies and understand the basic application architecture Should understand the aspect of high availability, application failover and disaster recovery, application accessibility Set Yourself Apart With: Strong and innovative approach (thinking out of the box) to problem solving and finding the best solutions Excellent communicator (written and verbal, formal and informal) Flexible and proactive/self-motivated working style with strong personal ownership of problem resolution. Ability to lead by example should be self-motivated, quick learner and a good team player Ability to multi-task under pressure and work independently with minimal supervision. Ability to prioritize when under pressure Additional Information Gender-Neutral Policy 18 paid holidays throughout the year for NCR/BLR (22 For Mumbai) Generous parental leave and new parent transition program Flexible work arrangements Employee Assistance Programs to help you in wellness and well being