Verification Strategy Jobs in Bengaluru

Job Title: Lead Satellite Design & Development Location: Bengaluru Experience Required: 10 to 15 years Minimum Qualification: Bachelor s or Master s degree in Engineering (BE/BTech/ME/MTech) or Science (MSc) Specialization in Aerospace, Mechanical, Electronics, or Systems Engineering preferred Key Skills Satellite Systems Engineering System Architecture & Integration Flight Mechanics & Control Systems NX and Concept Design Tools Project & Resource Management Systems Engineering Lifecycle (V&V, Risk, Interfaces) Strategic & Technical Leadership Stakeholder Management Job Summary We are seeking a seasoned and visionary Lead Satellite Design & Development to lead end-to-end execution of satellite programs. The role requires deep technical expertise, hands-on project management skills, and a proven ability to lead multidisciplinary engineering teams. The ideal candidate will be instrumental in shaping system architecture, ensuring technical excellence, and aligning with organizational goals in the dynamic field of space systems. Key Responsibilities Team Leadership Lead and mentor a multi-functional engineering team across systems, mechanical, electronics, aerospace, software, and reliability disciplines. Foster a collaborative, innovation-driven work culture aligned with project objectives and company strategy. Project Management Manage full project lifecycle: from concept development through design, integration, testing, and deployment. Define project plans, budgets, schedules, and resource allocations using Agile, Waterfall, or hybrid methodologies. Conduct regular project reviews to monitor performance, identify risks, and implement mitigation strategies. Systems Engineering & Integration Drive system architecture and engineering processes: requirements definition, interface control, verification & validation, and risk management. Balance trade-offs between performance, cost, risk, and reliability throughout the development lifecycle. Ensure all engineering documentation is maintained in line with industry standards and internal processes. Quality Assurance & Risk Management Champion adherence to quality benchmarks and reliability targets. Develop and enforce comprehensive risk mitigation plans across design, development, and integration phases. Stakeholder Engagement Interface with internal teams (R&D, QA, Production, Finance, Executive Leadership) for cross-functional alignment. Engage external partners clients, suppliers, regulators to ensure compliance, clarity, and project alignment. Represent the organization in technical forums, industry panels, and client briefings. Innovation & Continuous Improvement Drive adoption of emerging technologies and design innovations to strengthen competitive edge. Lead process optimization initiatives to improve development efficiency, product quality, and team performance. Preferred Qualifications & Experience Proven leadership in full-cycle satellite or satellite bus development from mission planning and architecture to launch and mission control. In-depth knowledge of satellite sub-systems and technology providers. Familiarity with international standards and best practices in satellite design and development. Strong strategic acumen in planning, budgeting, and resource management for complex aerospace projects. Qualification : Bachelors or Masters degree in Engineering (BE/BTech/ME/MTech) or Science (MSc)

Senior Operations Analyst (KYC) Location: Bangalore Experience: 5+ Years Company: KredX About KredX Founded in 2015, KredX has evolved into a comprehensive financial solutions ecosystem. We are India's leading integrated supply chain finance provider, holding both RBI s TReDS license and IFSCA s ITFS license one of the few double-licensed entities in the country. Our flagship platforms include: DTX (Domestic Trade Exchange): RBI-licensed TReDS platform enabling MSME financing via invoice discounting. GTX (Global Trade Exchange): IFSCA-licensed platform facilitating cross-border trade finance. CMS (Cash Management Solutions): AI-driven finance automation streamlining financial operations globally. KredX powers businesses of all sizes with innovative, technology-driven financial solutions. Role Overview We are seeking a highly skilled and detail-oriented Senior KYC Analyst to lead the Know Your Customer (KYC) processes within our Operations team at DTX. This role is critical in ensuring full regulatory compliance while maintaining the integrity of our client relationships. You will drive enhancements in our KYC framework, conduct detailed risk assessments, and provide strategic direction on customer due diligence. Key Responsibilities Lead and manage the end-to-end KYC process, including customer identification, verification, risk assessment, and ongoing monitoring. Conduct in-depth investigations of customer backgrounds, transactions, and compliance to identify risks and suspicious activities. Develop, implement, and continuously improve KYC policies and procedures in line with regulatory requirements and industry best practices. Collaborate with compliance, legal, and operations teams to resolve KYC-related issues and streamline processes. Mentor and train junior analysts, fostering a culture of compliance, accuracy, and continuous improvement. Stay abreast of regulatory updates and emerging trends in financial services, adapting KYC strategies proactively. Required Qualifications & Experience Minimum 5 years experience in KYC, AML, or related compliance roles in financial services. At least 3 years experience working within a TReDS framework is preferred. Strong knowledge of KYC regulations, customer due diligence, and risk assessment methodologies. Proven analytical skills to evaluate complex data and generate actionable risk insights. Excellent communication skills, able to clearly present findings to varied stakeholders. Preferred Qualifications Experience using KYC software platforms such as Actimize, Amlify, or similar tools. Professional certifications like CAMS (Certified Anti-Money Laundering Specialist) or CFE (Certified Fraud Examiner). Familiarity with global financial regulations and international compliance adaptation. Technical Skills & Tools Proficiency in data analysis tools including SQL and advanced Excel functions for investigations and reporting. Experience with risk assessment frameworks related to KYC compliance. Understanding of regulatory reporting requirements and compliance tools.

About the Job: Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe. At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability. Responsibilities: Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios. Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation. Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs. Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs. Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process. Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs. Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience). 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog. Proven experience in developing and maintaining verification testbenches, test cases, and environments. Preferred Qualifications: Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience). Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques. Track record in successfully leading design verification for IPs, delivering them to multiple SoCs. Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders. Strong expertise in driving or owning sub-system level verification and managing all associated complexities. Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world. Growth & Learning: Collaborate with world-class engineers and learn from experts in the field. Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing. If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology! Google is an equal opportunity employer.

CPU Verification Engineer Company Arm Location Bengaluru Job Overview Responsibilities Contribute technically as part of project teams to deliver high-quality ARM CPU designs. Execute comprehensive CPU design verification, focusing on improving design quality through stress testing and bug identification. Effectively plan, conduct reviews, provide status updates, and meet delivery expectations. Collaborate with design and architecture teams to ensure effective coverage and provide accurate project planning inputs. Design and develop verification testbenches and components required for effective verification. Maintain knowledge of company processes to work effectively within defined standards and methodologies. Drive efficiency improvements in verification tools and methodologies and mentor team members to support career development. Required Skills and Experience 3+ years of experience in CPU, IP, or SoC product development environments. Experience in design verification/validation, including developing test plans, testbenches, and executing measurable verification processes. Familiarity with processor verification using assembly language and C/C++. Knowledge of microprocessor and/or SoC architecture and microarchitecture, preferably ARM processors and ARM-based systems. Strong problem-solving and debugging skills, with a commitment to continuous improvement. Nice-To-Have Skills and Experience Strong understanding of CPU architecture and microarchitecture. Experience with ARM-based system designs and hierarchical memory systems. Programming languages: Verilog, Assembly, C/C++, Perl, Python. Experience with verification languages such as SystemVerilog. Familiarity with power-aware verification methodologies. What Arm Offers This is a fantastic opportunity to shape the future of CPU verification at Arm while advancing your own career. Join our CPU design verification team and play a key role in delivering Arm's strategic goals! #LI-KR2

Job Overview: The Architecture and Technology Group (ATG) at Arm develops technologies and products for Arm s future architecture roadmap. In ATG, we are developing world-leading Secure CPU and System architectures and associated technologies; enabling our ecosystem to build compelling products. Along with the architecture definition, ATG develops products to confirm compliance to the architecture. The ATG team located in Bangalore develops a product called Architecture Compliance Kits (ACK) that are delivered to multiple internal and external CPU design teams to validate that Arm architecture CPU implementations are compliant with the Arm architecture. You will learn Arm Architecture and apply it along with hardware and software verification skills to develop products for verifying the Architecture. You will develop good engineering and technical skills, and a fair understanding of CPU architecture and microarchitecture. You will connect with a wide range of teams within ATG, architects, and with our external partners. In this role, you will also develop solutions for future Arm architecture developments and influence the product offering. Responsibilities: Technical expertise, understanding architecture definitions, carrying out investigations and feasibility studies, defining and developing verification strategies, and contributing to the development of compliance products. Design verification test plans and test cases in assembly, C, HVL, and higher abstraction languages using automation techniques as needed. Strong and continuous communication on deliveries and risks, ensuring that all engineering commitments are delivered successfully. Drive efficiency improvements through adoption of the right development flows and methodologies. Excellent verbal and written communication skills. Required Skills and Experience: B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering. 8+ years of verification experience (CPU/complex IP verification is a plus). Strong understanding of computer architecture. Proficiency in logical programming using C/C++/Assembly with experience in adopting software engineering best practices. Nice To Have Skills and Experience: Experience in CPU verification would be a plus. Knowledge of x86 or Arm processor architecture. We are guided by our core beliefs that reflect our culture and guide our decisions, defining how we work together to surpass ordinary and craft outstanding products and careers. In Return: We promise you endless opportunities to experiment and go even further in hardware! From architecture definition to complex core implementation to full custom physical IPs, here you'll have our backing to push limits in vital areas. #LI-KR2 Qualification : B.Tech/B.S. or M.Tech/M.S./PhD in Computer Engineering, Computer Science, or Electronics Engineering.

Job Title: Lead Engineer Software Test & Release Location: Bangalore Job Summary We are looking for a skilled Security Test and Automation Engineer with 7-9 years of experience in Security Verification and Validation, particularly on Embedded Systems. The ideal candidate will have 3-4 years of leadership experience in managing a team of security test engineers and hands-on expertise in scripting languages like Python, Java, and AI/ML-based tools. The primary responsibility will be to develop and execute security testing strategies across various domains including Devices, Automotive, Medical Devices, and Telecom Infrastructure (Wireless and Wired). Key Responsibilities Security Test Strategy: Develop and execute a comprehensive security test and automation strategy across multiple domains like Devices, Automotive, Medical Devices, and Telecom Infrastructure. Collaborate with project teams to capture best practices, share knowledge about the latest tools and technologies, and identify opportunities for new solution development. Understand client requirements for security testing and prepare proposals related to Security and Penetration Testing. Penetration Testing: Work with clients to understand their testing needs (e.g., number and types of systems for testing). Plan, create, and execute penetration methods, scripts, and tests to assess the security of systems. Perform remote or on-site security testing of a client s network or infrastructure to uncover vulnerabilities. Simulate security breaches to test system vulnerabilities and identify potential threats. Generate detailed reports outlining security issues, the level of risk, and recommendations for remediation. Team Leadership and Development: Lead and mentor a team of security test engineers, providing guidance on technical challenges and professional growth. Conduct reviews of designs, code, and test plans to identify risks and ensure quality deliverables. Identify training needs for the team and provide support for their technical development. Risk Analysis and Requirement Management: Conduct requirement analysis and feasibility studies, considering risk identification and mitigation. Perform system-level work estimation and ensure timely delivery of high-quality work. Ensure traceability of requirements from design to delivery, while optimizing code and ensuring test coverage. Continuous Improvement: Participate in technical initiatives within the project and organization, delivering training and maintaining a high level of technical competence through ongoing self-study and technical assessments. Identify and implement improvements in security testing practices and tools. Required Skills and Experience 7-9 years in Security Verification and Validation on Embedded Systems. 3-4 years of experience leading a team of security test engineers. Hands-on experience with scripting languages like Python, Java, and AI/ML-based tools. Experience in penetration testing and security assessments for embedded systems and network infrastructures. Technical Expertise: Strong knowledge of security testing methodologies, vulnerability assessments, and penetration testing. Proficiency in scripting languages (Python, Java, Perl, Shell scripts, TCL). Experience in Automation Frameworks for security testing. Understanding of network protocols (2G, 3G, LTE, 5G) and security concerns within telecommunications and embedded systems. Certifications: Bachelor s degree in Engineering or equivalent. Certifications in Security Testing (e.g., Certified Ethical Hacker - CEH) are highly desirable. Tools and Technologies: Experience with test and trace/log collection tools such as QXDM, QCAT, QPST, Prism, and other telecom instruments (e.g., Anritsu, Keysight). Familiarity with automation scripting tools like RTD (for Anritsu) or equivalent. Knowledge of Linux host platforms and network simulation tools. Specialization: Expertise in 2G, 3G, 4G, 5G, Interop Testing, and VSAT-SATCOM technologies. Understanding of 3GPP specifications and network vendor tests. Desirable Skills Strong problem-solving and analytical skills to identify vulnerabilities and assess risks in systems. Ability to provide strategic and actionable insights based on security findings. Ability to communicate complex security issues to non-technical stakeholders. Leadership and mentoring capabilities to guide junior engineers and promote team development. Work Environment Location: Bangalore Opportunity to work in a dynamic environment with the latest tools and technologies in the security testing domain. If you have a passion for security testing and automation, along with a desire to lead and contribute to impactful projects, this is the perfect opportunity for you! Apply now to join our team and make a significant impact in the field of security testing.

Senior Payroll & HR Generalist About Saviynt Saviynt is an identity authority platform designed to power and protect organizations in an era of digital transformation. As businesses navigate growing cybersecurity risks, our Enterprise Identity Cloud provides unparalleled visibility, control, and intelligence, ensuring secure, right-time access to critical digital resources. To support our rapid growth, we are seeking a Senior Payroll & HR Generalist who will play a crucial role in managing payroll processes and leading key HR functions across India and the APAC region. This role will report to the Manager of Payroll & Benefits in El Segundo, CA, for functional leadership, while working locally under the Director of Human Resources in Bengaluru. Key Responsibilities Payroll Processing & Compliance Lead and oversee end-to-end payroll processing for India & APAC, ensuring accuracy, compliance, and timeliness. Partner with global payroll and accounting firms to maintain adherence to international payroll regulations and best practices. Review, analyze, and verify payroll reports to identify discrepancies, processing necessary adjustments before final payroll completion. Maintain and update payroll data in Namely, ensuring accurate records of compensation, tax deductions, bonuses, and statutory contributions. Manage payroll-related benefits administration, including incentives, tax deductions, and retirement contributions. Ensure compliance with local labor laws, taxation policies, and company policies related to payroll and employee benefits. HR Generalist & Employee Lifecycle Management Oversee employee leave management, ensuring accurate payroll integration and compliance with company policies. Support onboarding & offboarding processes, ensuring payroll setup for new hires and accurate termination payouts. Assist with performance evaluation processes, ensuring payroll-related adjustments align with compensation changes. Serve as an HR compliance expert, advising on payroll-related labor laws, employment verification, and unemployment claims. Audit, Reporting & Strategic HR Support Prepare payroll-related reports for internal and external stakeholders. Facilitate payroll audits, pension filings, and employment verifications. Work closely with HR leadership to align payroll strategies with business objectives and drive process improvements. Provide administrative, operational, and strategic HR support to the Director of Human Resources as needed. What You Bring Extensive experience in payroll processing & HR functions for India & APAC. Strong knowledge of Indian labor laws, payroll compliance, taxation, and employee benefits. Experience in full-cycle payroll management, including incentives, tax deductions, and statutory contributions. Proficiency in HR systems (Namely or similar HRIS platforms). Ability to manage audits, reports, and compliance documentation. Excellent attention to detail, problem-solving, and analytical skills. Strong collaboration skills with global teams across multiple time zones. Preferred (Good to Have): Experience working in a fast-paced SaaS or tech-driven organization. Knowledge of global payroll practices (US, Europe, APAC, etc.). Work in a high-growth, technology-driven environment that values innovation and excellence. Gain exposure to global payroll processes & HR strategies in a dynamic, fast-paced setting. Collaborate with industry-leading professionals and contribute to scaling a global workforce. Competitive compensation, benefits, and professional growth opportunities. Saviynt is an equal opportunity employer. We welcome applicants from diverse backgrounds and do not discriminate based on race, gender, age, disability, or veteran status. If you re a detail-oriented payroll and HR expert passionate about process efficiency and compliance, we d love to hear from you!

IT Recruiter Location: Bengaluru, India Experience: 8+ years Education: Bachelor's degree in Human Resources, Business Administration, Computer Science, or a related field About Saviynt Saviynt is an identity authority platform designed to power and protect organizations in an era of digital transformation. As businesses navigate growing cybersecurity risks, our Enterprise Identity Cloud provides unparalleled visibility, control, and intelligence, ensuring secure, right-time access to critical digital resources. To support our rapid growth, we are seeking a skilled IT Recruiter to join our dynamic team in Bengaluru. If you re passionate about sourcing, screening, and hiring top IT talent, and want to make a meaningful impact on our organization, we d love to hear from you! What You ll Be Doing Talent Sourcing & Recruitment Strategy Partner with hiring managers to understand staffing needs and create effective recruitment strategies. Source and attract qualified candidates through job boards, social media, professional networks, and referrals. Stay updated on IT industry trends, market conditions, and best recruitment practices. Screening & Interview Coordination Screen resumes and conduct initial interviews to assess candidate qualifications, technical skills, and cultural fit. Coordinate and schedule interviews between candidates and hiring managers. Facilitate the selection process by conducting reference checks, background verification, and skills assessments. Offer Negotiation & Hiring Process Negotiate job offers and ensure a seamless candidate experience throughout the hiring process. Maintain accurate records in the applicant tracking system (ATS). Ensure compliance with hiring policies, labor laws, and company standards. What You Bring 8+ years of experience as an IT Recruiter or Technical Recruiter. Strong understanding of IT roles, technologies, and hiring trends. Excellent communication and interpersonal skills to build relationships with candidates and hiring managers. Strong organizational and time-management skills, with the ability to manage multiple hiring priorities in a fast-paced environment. Proficiency in applicant tracking systems (ATS) and recruitment software. Ability to work independently and collaboratively within a team environment. Work in a fast-growing, innovative SaaS company in the identity security space. Gain exposure to global hiring strategies in a high-tech environment. Collaborate with top industry professionals and drive business-critical recruitment efforts. Competitive compensation, benefits, and career growth opportunities. Saviynt is an equal opportunity employer. We welcome applicants from diverse backgrounds and do not discriminate based on race, gender, age, disability, or veteran status. If you're passionate about IT recruitment and want to make an impact, apply now and join our Bengaluru team! Qualification : Bachelor's degree in Human Resources, Business Administration, Computer Science, or a related field

Job Title: Pre-Silicon Validation Engineer SoC/IP Job Description: Join the Devices Development Group (DDG), one of Intel s premier System-on-Chip (SoC) design teams, driving innovation in future Intel SoCs and IPs. As a Pre-Silicon Validation Engineer, you will be part of a dynamic team responsible for ensuring the functionality, performance, and reliability of Intel s cutting-edge designs. Key Responsibilities: Validate IP blocks or features at the SoC level, ensuring compliance with design specifications. Develop validation plans and test strategies based on architectural specifications, RTL code, and existing test methodologies. Analyze microarchitecture and debug failures to identify root causes and improve design quality. Develop and utilize various debugging and validation tools to implement validation plans effectively. Participate in silicon debugging, identifying issues and enhancing testing methodologies for future RTL models. Collaborate with IP providers and internal customers to define, develop, and deliver essential infrastructure while addressing issues identified during execution. Qualifications & Requirements: Educational Qualifications: Bachelor s (B.Tech/BS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 5+ years of experience, OR Master s (M.Tech/MS) degree in Computer Science, Computer Engineering, or Electrical Engineering with 3+ years of experience. Technical Skills & Experience: Minimum 2 years of experience in IP or SoC development, verification, or integration using SystemVerilog and UVM (Universal Verification Methodology). Minimum 2 years of experience in writing validation plans and developing software to execute those plans. Minimum 2 years of experience with object-oriented programming languages. Minimum 2 years of experience working with SystemVerilog and UVM. Minimum 1 year of experience with UNIX/Linux environments. Exposure to Graphics Verification and/or Security Verification is a plus. Preferred Qualifications: Minimum 1 year of experience with computer architecture. Minimum 2 years of experience in validation or testing, particularly in silicon design teams. About the Client Computing Group (CCG): The Client Computing Group (CCG) is at the forefront of Intel s PC product and platform development, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. Through strategic partnerships across the industry, CCG delivers innovative computing experiences that empower users to create, connect, and collaborate. As Intel s largest business unit, CCG drives innovation, scalability, and IP development, helping the company fulfill its mission of enriching lives through technology. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, which includes: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development opportunities to support career growth.

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Job Overview As a Tools Support & Infrastructure Engineer at Qualcomm, you'll play a vital role in supporting and enhancing the design flows and infrastructure for Qualcomm's Digital Signal Processing (DSP) team. The DSP design team delivers high-performance DSP cores that are integral to Qualcomm's multi-tier SoC roadmap, particularly for mobile applications. This position involves managing DSP design databases, developing automation tools to streamline the verification process, and collaborating with global teams to optimize design efficiency and quality. Key Responsibilities Manage DSP Design Database: Oversee the DSP design database, supporting design and verification teams with infrastructure needs. Build Automation: Create new automation tools to enhance the productivity of design verification teams, making it easier to debug simulation failures. Collaborate with Global Teams: Work with Qualcomm s global DSP design teams (architecture, implementation, post-silicon, and back-end teams) to enhance DSP IP infrastructure. Improve Tool Methodologies: Design and deploy new tool methodologies to continuously improve the quality, efficiency, and effectiveness of design and verification processes. Support Design Flows: Contribute to and improve design flows, ensuring the seamless integration of tools and resources used by design teams. Minimum Qualifications Educational Requirements: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 6+ years of relevant work experience, or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 5+ years of relevant work experience, or PhD in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of relevant work experience. Skills & Experience Programming & Tools Support: 3-10 years of experience in programming, database management, and providing tools support for complex DSP IP designs. Automation Expertise: Extensive experience in building automation tools that improve design and verification processes. Programming Languages: Expertise in C++ and Java. Scripting & Automation: Proficiency with scripting languages and tools such as Perl, Python, Shell, Makefiles, and TCI. Analytical Skills: Strong analytic, programming, and debugging abilities. Object-Oriented Programming (OOP): Deep understanding of OOP concepts. Web Programming: Familiarity with Java for web programming is a plus. Unix Environment: Solid understanding of the Unix environment. Digital Design Flows: Knowledge of digital design flows is a plus. Communication: Excellent interpersonal and communication skills, with the ability to work collaboratively with global teams.

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.

Minimum qualifications: Bachelor s degree or equivalent practical experience. 12 years of experience in IT Industry with building and developing infrastructure or distributed systems. Experience in consulting, IT services and Security Check (SC), security clearance. Preferred qualifications: Experience helping customers decide to make investments in new technologies and projects based on expected value and Return on Investment (ROI). Experience with data center migration strategies and collaborating with channel partners and systems integrators. Experience designing, building, and deploying scalable cloud-based solution architectures. Experience engaging product organization and influencing them to work on product features to drive the overall product strategy and roadmap. Ability to work on a team to design processes, implement strategic projects that solve business problems, and lead or work effectively with cross-functional groups. About the job Google's projects, like our users, span the globe and require managers to keep the big picture in focus while being able to dive into the unique engineering challenges we face daily. As a Technical Program Manager at Google, you lead complex, multi-disciplinary engineering projects using your engineering expertise. You plan requirements with internal customers and usher projects through the entire project lifecycle. This includes managing project schedules, identifying risks and clearly communicating them to project stakeholders. You're equally at home explaining your team's analyses and recommendations to executives as you are discussing the technical trade-offs in product development with engineers. Using your extensive technical and leadership expertise, you manage projects of various size and scope, identifying future opportunities, improving processes and driving the technical directions of your programs. As a Google Distributed Cloud (GDC) Cluster Lead, you will drive the adoption of Air Gapped and Connected Cloud as a result-driven Trusted Advisor to the largest customers, ultimately responsible for ensuring their overall success and transformation with Google Cloud. You will align at the executive level, building and maintaining strong relationships with business executives and IT stakeholders, both internal and external, and understand their business requirements and goals. Building on this knowledge, you will lead the shared strategic roadmaps to drive customer partnerships through pre-sales and delivery, provide technical guidance and programme leadership, and facilitate customers digital transformation to maximize their value on Google Cloud. Google Cloud accelerates every organization s ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google s cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems. Responsibilities Manage programs covering customer s GDC program planning, delivery assurance and verification, tracking, reporting, and risk and mitigation planning. Drive the customer partnership for key strategic customers, from a delivery standpoint. Establish executive relationships with business and IT stakeholders to understand their objectives. Accelerate customer s migration to GDC Air-Gapped by influencing all relevant stakeholders and removing roadblocks. Ensure that customers derive maximum value from their investment in Google Cloud. Assess their capabilities, collaborate with other Google stakeholders and prescribe recommendations to help them accelerate GDC deployments and achievement of their business targets. Leverage adoption methodology and transformation framework, conduct customer Quarterly Business Reviews (QBRs), advocate for customers to rapidly knock down adoption blockers, and coordinate across multiple work streams and teams to maintain customer momentum. Qualification : Bachelors degree or equivalent practical experience.

We are seeking an experienced and highly motivated IO DFx Architect/Lead to join our team and lead the Design for Excellence (DFx) efforts for Physical Layer (PHY) interfaces in next-generation PHY. As a PHY DFx Architect/Lead, you will be responsible for driving DFx principles, including Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD), into the development of complex PHY designs. You will collaborate with cross-functional teams to ensure that PHY designs are optimized for quality, performance, reliability, and ease of integration into systems, while reducing time to market and ensuring manufacturability.In this leadership role, you will guide the team in the application of best practices in DFx and contribute to the continuous improvement of processes and methodologies, helping to deliver world-class PHY products.Lead the DFx (Design for Excellence) activities for Physical Layer (PHY) interfaces, ensuring designs are optimized for testability, manufacturability, debugging, and reliability. Understand IP and SOC architecture spec and define DFx requirements. Work with SOC and adjacent IP architects in ensuring DFX compliance across IP boundaries and SOC level DPM/coverage targets.Hands on coding of DFx features and flow clean upCollaborate with hardware design, verification, and manufacturing teams to define and implement DFx methodologies that improve design quality, reduce cost, and accelerate time to market.Oversee the integration of Design for Test (DFT), Design for Manufacturability (DFM), and Design for Debug (DFD) techniques in PHY design processes to ensure the ease of testing, manufacturability, and post-silicon debugging.Collaborate with Validation Architect to develop and implement comprehensive test and validation strategies to ensure that PHY systems meet industry standards (e.g., JEDEC, IEEE, PHY compliance) ,customer requirements, regulatory requirements, and industry certifications..Enable debug features on silicon to ensure smooth debuggabilityDrive PHY DFx changes and improvements based on feedback from production, test, and field data, working closely with manufacturing teams to ensure smooth transition from design to production.Stay up to date with industry trends, emerging test and debug technologies, and best practices, and incorporate them into design practices.Define and implement scan-based testing, boundary scan, and other DFT strategies to ensure that the PHY designs are fully testable and meet production-level testing requirements.Work with cross-functional teams to establish best practices for DFM to ensure that the PHY design is cost-effective and manufacturable at scale, minimizing yield loss and improving manufacturing efficiency.Promote and implement Design for Debug (DFD) techniques, ensuring that designs have appropriate debug hooks and are easy to troubleshoot both pre-silicon and post-silicon.Mentor and provide technical leadership to junior engineers in the areas of DFx methodologies and best practices.Drive collaboration between design, verification, and test teams to integrate DFx strategies into the overall development flow.Provide regular reports and updates to management on the progress of DFx initiatives, including key performance metrics and any challenges encountered.Drive problem solving and come up with innovative solutions. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 10 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than 12 years of relevant industry experience. Hands on experience in IP DFx RTL development, timing closure, and flows Working knowledge of RTL coding in Verilog/System Verilog and Debug in OVM/UVM based verification environment Experience in DFx features such as Structural Scan, BSCAN, MBIST, JTAG etc. Good understanding of industry standard DFx flows and compliance methodologies like DUVM, BSDL, ATPG, and GLS Preferred:- To have Mixed Signal IP DFx experience and/or IO DFx experience and/or post-silicon experience Preferred to have exposure in one/more of interface IPs like DDR/LPDDR/UCIe/HBM Preferred to have experience in driving small team of junior engineers and task forces. Need to be a key team player, while being highly energetic and motivated, independent, and self-driven. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore s Law and groundbreaking innovations. DEG is Intel s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that...

Job Description The Client Development Group (CDG) is looking for Physicial Design Engineers with following Responsibilities - Creates bottoms up elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction and schematic layout verification. Debug using phases of physical design development including parasitic extraction ,clock generation, custom polygon editing, auto place and route algorithms, floor planning, full chip assembly, RV DFM Density and verification. Troubleshoots design issues and applies proactive intervention. May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments. Qualifications You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing. Experience, Skills, Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs. Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan. Ability to comprehend issues of RC delay electromigration, selfheating and cross capacitance. Ability to recognize failure prone layout structures and proactively contact engineers for guidance and produce electrically robust layout. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Other Locations IN, Hyderabad Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel Qualification : You should possess a BE or BTech or equivalent technical degree in Electronics Electrical engineering with knowledge in Layout Designing.

Job Description: Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in today's Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in one or many of these technologies/ protocols - PCIe, CXL, USB, Ethernet. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture/micro-architectures! In Return: With offices around the world, Arm is a diverse organisation of dedicated, innovative and very hardworking engineers. By enabling a vibrant, inclusive, meritocratic, and open workplace, where all our people can grow and succeed, we encourage our people to share their outstanding contributions to Arm's success in the global marketplace Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Hybrid Working at Arm Arm s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Accommodations at Arm At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Qualification : 4-15 years of proven experience in working on IP/Subsystem/Soc Verification

General Summary: Qualcomm is a company of inventors that has unlocked 5G, ushering in an era of rapid acceleration in connectivity and new possibilities across industries. But this is just the beginning. Qualcomm thrives on innovation and diversity, with teams made up of inventive minds from different backgrounds and cultures, all working together to transform cutting-edge technologies into world-changing products. As a GPU Functional Verification Engineer at Qualcomm, your responsibilities will involve a deep understanding of 3D Graphics hardware pipelines, feature sets, data paths, and block functionalities. You will play a key role in designing and developing verification strategies, implementing testbenches, and working on the functional verification of Qualcomm s Snapdragon SoC products. Key Responsibilities: Develop deep expertise in the 3D Graphics hardware pipeline, including feature sets, data paths, and block functionalities. Strategize, brainstorm, and propose Design Verification (DV) environments; develop testbenches and own test plans. Debug all RTL artifacts and work to achieve comprehensive signoff matrices. Collaborate with EDA vendors and explore innovative DV methodologies to push the limits of signoff quality. Partner with architecture, design, and systems teams globally to meet and exceed all project goals. Develop and execute UVM-based System Verilog testbenches for functional verification of complex GPU designs. Engage in property-based formal verification (knowledge of formal tools is a plus). Work on subsystem-level testbenches to analyze GPU workloads and ensure compliance. Utilize emulation platforms to analyze performance and identify potential pipeline bottlenecks. Perform power-aware and gate-level simulations to ensure high-quality GPU implementation. Implement Perl/Python scripts for regression management, optimizing runtimes, managing databases, and tracking bugs. Required Skills and Experience: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, VLSI, or a related field, and 2+ years of relevant experience in Hardware Engineering or Design Verification. Master s degree in a related field and 1+ year of relevant work experience, OR PhD in a related field. Minimum 3 years of experience in design verification. Strong proficiency with UVM-based System Verilog testbenches. Experience with GPU pipeline design is a plus but not mandatory. Working knowledge of property-based formal verification tools is a plus. Strong communication skills (both written and verbal) with the ability to work in a collaborative team environment. Ability to learn quickly and deliver results with high quality. Desirable Skills and Aptitudes: Experience in GPU functional verification and knowledge of 3D graphics hardware pipelines. Familiarity with emulation platforms and the ability to analyze and address performance bottlenecks. Expertise in scripting with Perl and Python for automation and optimizing verification processes. Education Requirements: Bachelor s (BE/ME) or Master s (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities. Why Qualcomm? Be a part of a passionate GPU HW team dedicated to developing industry-leading Qualcomm Snapdragon SoCs. Play a pivotal role in shaping the future of mobile AR/VR by contributing to GPU solutions that drive benchmarks in the mobile computing industry. Qualification : Bachelors (BE/ME) or Masters (M.Sc.) degree in Electrical/Electronics Engineering, VLSI, Microelectronics, or equivalent courses from reputed universities.

Technical Requirements: 1. Experience in Verification: SoC (System on Chip), Sub-system, and Block Level verification. Strong understanding of verification methodologies and flow. 2. ARM Architecture & AMBA Protocol: Hands-on experience in ARM architecture. In-depth knowledge of AMBA protocol at the SoC and sub-system levels. 3. Verification Methodologies: Expertise in UVM (Universal Verification Methodology), OVM (Open Verification Methodology), SV (SystemVerilog), Verilog, and C-based verification methodology. Strong command over verification languages like SystemVerilog and Verilog. 4. Additional Verification Tools & Exposure: Exposure to GLS (Gate-Level Simulation) and power-aware verification is a plus. 5. Protocols Knowledge: Practical experience with verification of various protocols, such as: PCIe, DDRx, Ethernet, USB, AXI, AHB, APB, I2C, SPI. 6. RTL Debugging & Test Automation Scripting: Strong RTL (Register Transfer Level) debugging skills. Ability to write test automation scripts using TCL, Perl, or Python. 7. Testbench (TB) and Test Cases: Experience in building testbenches (TB) and test cases from scratch. In-depth knowledge of creating scalable and reusable testbenches. 8. Verification Tools: Familiarity with industry-standard verification tools for simulation, debugging, and automation. Expectations from the Role: 1. Communication & Inter-personal Skills: Strong communication and inter-personal skills. Ability to work independently or as part of a team, collaborating effectively with cross-functional teams. 2. Learning & Adaptability: Ability to quickly learn new technologies and verification tools. Ability to work in a distributed work environment and adapt to diverse work conditions. 3. Ownership & Punctuality: Demonstrated ownership of tasks and projects. High punctuality and accountability in delivering results within agreed timelines.

Technical Requirements: 1. Verification Experience: Strong experience in SoC, sub-system, and block-level verification. Ability to handle different verification stages and methodologies for complex systems. 2. Hands-on Experience with ARM Architecture and AMBA Protocol: ARM architecture familiarity, particularly at the SoC and sub-system level. Expertise in AMBA protocol (e.g., AHB, APB, AXI) and its application in SoC verification. 3. Verification Methodologies: Proficient in UVM/OVM, SystemVerilog, Verilog, and C-based verification methodologies. Solid understanding of testbenches (TB), test cases, and automation methodologies. Experience in test automation scripting with languages such as TCL, Perl, and Python. 4. Exposure to Advanced Verification Techniques: GLS (Gate-Level Simulation) experience is a plus. Power-aware verification knowledge, ensuring low power consumption in designs. 5. Protocol Knowledge: Working knowledge of industry protocols such as PCIe, DDRx, Ethernet, USB, I2C, SPI, among others. Familiarity with AXI, AHB, APB protocols for data communication in embedded systems. 6. RTL Debugging & Tools Proficiency: Strong RTL debugging skills to identify and resolve issues in designs. Well-versed with industry-standard verification tools used in simulation, debugging, and analysis. 7. Building Testbenches & Test Cases: Extensive experience in building testbenches from scratch. Ability to create and implement detailed test cases for different verification scenarios. Expectations from the Role: 1. Communication and Interpersonal Skills: Strong ability to communicate technical concepts effectively both within the team and with other stakeholders. Clear verbal and written communication skills for reporting progress and challenges. 2. Independent and Team-based Work: Ability to work independently on projects or as part of a team. Able to take ownership of tasks and contribute to team discussions effectively. 3. Learning and Adaptability: Ability to learn quickly and adapt to evolving technologies and methodologies. Stay updated with advancements in verification techniques and tools. 4. Ownership and Accountability: Demonstrated ownership of projects, ensuring timely completion and addressing any challenges that arise. Ensuring high-quality results through attention to detail. 5. Leadership & Mentorship: Ability to mentor and lead junior engineers and verification teams. Provide guidance in solving complex problems and ensuring successful project outcomes. 6. Punctuality and Responsibility: Demonstrated punctuality in meeting deadlines and project milestones. Timely execution of tasks and troubleshooting to maintain project timelines. Ideal Candidate Profile: The ideal candidate will have significant experience with SoC verification, ARM architecture, and verification methodologies such as UVM and SystemVerilog. The candidate should possess strong protocol knowledge and be proficient in debugging RTL and automating test scenarios. A key aspect of the role is the ability to work independently, take ownership of tasks, and guide the team in solving technical challenges. Leadership and mentoring abilities are essential, as is the capacity to manage multiple tasks effectively in a distributed work environment.

Description AI Cloud Team @Salesforce is looking for talented Senior Manager like you to to lead an exceptional engineering team in transforming the customer service landscape. Salesforce AI Cloud team brings the revolutionary AI technology to Salesforce CRM business at scale. The platform and application teams ( like Einstein Bots) under AI Cloud is looking for a Sr Manager to lead an exceptional engineering team to build and enhance the chatbots, ML models and services. You will leverage your experience in the areas of ML/NLP to help develop and refine our AI strategy and products like Einstein Bots, scaling the AI and ML services and ML Ops deployment pipelines while ensuring our stringent data privacy, security, residency, and compliance goals. Our mission is to deliver rich and compelling conversational experiences through multiple channels, enabling users to resolve issues faster and enhancing brand engagement and satisfaction. We're not just about development; we're about end-to-end ownership, directly improving customer experiences through a fast user feedback cycle. You'll be part of an industry-leading enterprise solution that leverages AI to automate customer service requests through friendly conversational interfaces, directly impacting millions of users worldwide.If you're passionate about AI, customer service experience, and making a real impact, the AI Cloud team is the place for you. Join us on this exciting journey of innovation and transformation. What You ll Do: Collaborate with Salesforce AI Cloud leaders to co-create and refine the AI strategy and roadmap. Drive the execution and delivery of features by collaborating with many multi-functional teams, architects, product owners and engineer. Lead the design, development and maintenance of high-quality and highly available AI/ML models, services and ML Ops deployments, chatbot solutions etc. Partner with Product Managers and Technical Program Managers to closely track progress across multiple work-streams while delivering goals for varying stakeholders. Prioritize retaining and attracting top talent, continuously invest in the development of high-performing teams, and passionately champion the success of both the team and its individual members. Be the service owner and ensure that our services are reliable and consistently available. Collaborate with cross-functional teams to ensure that high availability is a priority in all stages of development and deployment. Promote a culture of open communication and support within the team ensuring all voices are heard and the team is fostering a collaborative environment. Drive continuous improvement initiatives by identifying inefficiencies and developing solutions to enhance quality, reduce costs, and improve timelines. Daily management of stand-ups as the Scrum Master for engineering teams. Occasionally chipping in to development tasks such as coding and feature verifications to assist teams with release commitments, to gain an understanding of the deeply technical product as well as to keep your technical skill sharp Required Skills: A related technical degree required. 12+ years experience building, scaling and maintaining large scale, complex AI products and/or services in the B2B (or B2C) SaaS industry. This experience should include building and sustaining large-scale solutions that operate around the clock, 24/7. 5+ years of people management experience, with at least 3+ years in leading teams focused on AI/ML initiatives. Knowledge and understanding of SaaS, PaaS, IaaS industry with hands-on experience of public cloud offerings (AWS, GAE, Azure). Experience in SaaS incident management, handling customer escalations and proactively working with customer success teams. Knowledge of professional software engineering best practices including coding standards, code reviews, source code management, continuous integration, build processes, testing, and operations. Experience with agile development methodologies is a must, and ScrumMaster experience is highly preferred. Exceptional verbal and written communication skills, along with strong organizational and project management abilities, and the capacity to work effectively in a distributed team setting. Passionate about engineering productivity, service ownership and customer success. Ability to be nimble, proactive, comfortable working with minimal specifications. Preferred Skills: Strong knowledge of Salesforce product and platform features, capabilities, and best use of it. Experience with NLP techniques and tools for text analysis and processing. Experience with cutting-edge machine learning techniques such as reinforcement learning, GANs, and advanced neural network architectures. Expertise in generative AI technologies, including experience with models such as GPT, DALL-E, and other generative adversarial networks (GANs). A track record of publications in top-tier conferences or journals and/or patents in the field of machine learning or data science. Knowledge of best practices and regulations around data privacy and security, such as GDPR, HIPAA, or CCPA. Ability to work with multilingual data sets and develop models that can handle multiple languages. Qualification : A related technical degree required.