Vlsi Design Jobs in Bengaluru

Position: Control Design Lead Department: Automation Department Reporting To: Senior Manager - Automation Location: Bengaluru Key Responsibilities Project Involvement: Actively participate in the Preliminary Stage Meeting (PSM) to evaluate existing sites, equipment, components, processes, and collaborate with customer representatives alongside the Project Leader (PL). System Requirements: Work closely with the PL to understand mechanical and application system requirements and ensure they align with project objectives. Control System Design: Design complete electrical and control systems, including: Wiring diagrams Panel diagrams Flowcharts of operational sequences (CNC & PLC) Operating logic, I/O assignments, sequence of operation, error & exception conditions, and safety interlocks. Program Development: Develop CNC/Robot programs, HMI, and PLC ladder logic based on project needs. Design Documentation: Prepare DAP (Design Approval Package) drawings in accordance with the provided checklist. Ensure the creation of detailed Bill of Materials (BOM) and Critical Bought Out Material (CBOM) lists, adhering to target costs. Release panel and machine wiring diagrams for manufacturing. Generate and track micro-schedules and sub-milestones in design activities to meet timelines. Design Review & Compliance: Review designs individually or with a competent team for correctness, completeness, and suitability, ensuring compliance with application-specific checklists. Proactive Project Support: Provide support during the build, testing, and trials. Address design modifications and handle User Requirement Change Requests (UCR), System Change Requests (SCR), and Engineering Change Requests (ECR). Documentation and Manuals: Develop panel layouts, field wiring diagrams, and basic user manuals (including startup/shutdown sequences, diagnostics, and programmed cycles). Collaboration: Work closely with assembly and design engineers to guide and support throughout the design and manufacturing phases. Skills and Expertise PLC Programming: Expertise in PLC code development with experience in multi-PLC systems (e.g., AB, Siemens, Mitsubishi, etc.). Motion Control Systems: Experience with motion control and CNC Gantry GCode software development. User Interface Development: Ability to design and develop user interfaces for operational ease. System Design: Proficiency in flowchart creation and application development. Professional Expertise: Experience in control systems including CNC, PLC, robotics, drives, servo systems, HMI, IoT, etc. Qualifications Essential: Bachelor s degree or Diploma in Electrical, Mechatronics, Instrumentation, or related fields. Experience: 6-10 years total professional experience. 3-6 years of relevant experience in control system design, automation, or related fields. Qualification : Bachelors degree or Diploma in Electrical, Mechatronics, Instrumentation, or related fields

Job Title: Assistant Manager Process Design Location: Bangalore Employment Type: Full-time About Zeta: Zeta is a Next-Gen Banking Tech company empowering banks and fintechs to launch innovative financial products. Co-founded by Bhavin Turakhia and Ramki Gaddipati in 2015, Zeta s flagship platform Zeta Tachyon is the industry s first modern, cloud-native, fully API-enabled banking stack. With over 15 million cards issued globally, Zeta Tachyon enables: Seamless, digital-first cardholder experiences Embeddable banking support for partners Hyper-personalized card programs Rapid product launches through web-based configurators Robust compliance and fraud management capabilities Zeta is working with major banks and fintechs globally and has 1,700+ employees, with 70% in R&D. The company raised $280M at a $1.5B valuation in 2021, backed by SoftBank, Mastercard, and other top investors. Role Overview: We are looking for an Assistant Manager Process Design who will drive automation, process transformation, and customer experience optimization. This role involves working closely with Product, Engineering, and Operations teams to build scalable and efficient customer support processes. Key Responsibilities: Identify opportunities for automation and process improvements and create a transformation roadmap. Design intuitive chatbot customer flows to enhance digital experience. Re-engineer existing processes to improve First Time Resolution (FTR) and overall customer satisfaction (CSAT). Set up proactive monitoring for customer journey leakages and coordinate with relevant teams for quick resolution. Establish a robust Voice of Customer (VOC) mechanism using inputs from multiple channels (email, chat, NPS, social media). Define and implement strategic process transformation initiatives to enhance the customer journey. Lead cross-functional efforts with Product, Engineering, and Operations to deliver process excellence. Support recovery work when necessary, ensuring business continuity. Deliver timely status updates to management and project stakeholders. Required Skills & Competencies: 2 4 years of experience in Process Design, Process Excellence, or Operational Transformation. Background in Operational Metrics (CSAT, AHT, FTR, Re-opens, FRT). Strong knowledge of Excel and PowerPoint. Six Sigma certification (preferably Black Belt) and experience with Lean methodologies. Familiarity with AI, automation, and digital tools in customer support. Excellent analytical and critical thinking abilities. Strong decision-making skills in real-time scenarios. Proven ability to work with multiple stakeholders to drive results. Excellent verbal and written communication skills. Qualifications: Bachelor s Degree (B.E./B.Tech) or a Postgraduate Degree / MBA in a relevant field. Equal Opportunity Employer: Zeta celebrates diversity and is committed to creating an inclusive environment for all. We welcome applicants from all backgrounds, cultures, and communities and believe a diverse workforce is key to our success. Qualification : Bachelors Degree (B.E./B.Tech) or a Postgraduate Degree / MBA in a relevant field

3D Visualizer Design & Development Location: Bengaluru Employment Type: Full-Time About the Role: We are looking for a talented 3D Visualizer with 4 5 years of hands-on experience in interior fit-out projects. The ideal candidate will have expert proficiency in SketchUp and V-Ray, along with a strong architectural sensibility. You will play a key role in transforming conceptual designs into high-quality photorealistic renders, working closely with architects, interior designers, and project managers to ensure visualizations accurately represent materiality, lighting, and spatial intent. Familiarity with Lumion, Revit, Rhino, and AI visualization tools is a strong plus. Key Responsibilities: 3D Modelling & Rendering Create detailed 3D models for interior fit-out schemes based on design team inputs. Produce photorealistic still images and animations, ensuring accurate textures, materials, lighting, and spatial representation aligned with design intent. Concept Development Support Collaborate with design teams to refine layouts, furniture arrangements, and material palettes. Interpret architectural drawings, elevations, and finish schedules to build precise digital environments. Presentation & Communication Prepare engaging presentation materials including boards, mood boards, and walkthrough animations for client presentations. Communicate technical feedback and iteration requests effectively with designers and project stakeholders. Quality Control & Optimization Ensure all renders meet high standards of resolution, realism, and alignment with design briefs. Optimize 3D scenes to reduce render times without compromising visual quality. Research & Innovation Stay updated on the latest rendering techniques, plugins, and software updates. Experiment with new workflows and tools to continuously improve visualization quality and efficiency. Technical Skills: Primary Tools: SketchUp (advanced modeling, dynamic components) V-Ray for SketchUp (materials, lighting, render settings) Supporting Software (Advantageous): Adobe Photoshop / Lightroom (post-production) 3ds Max or Rhino (for complex geometry or alternative workflows) AI tools, Enscape, Lumion, Revit Architectural Knowledge: Strong understanding of architectural principles, spatial planning, and building systems. Ability to read and interpret floor plans, sections, and finish schedules. Soft Skills: Excellent visual communication with strong attention to detail. Proactive problem-solver with a commitment to continuous improvement. Strong time management to handle multiple projects and deadlines effectively. Collaborative mindset to work seamlessly with architects, designers, and project managers. Preferred Qualifications: Bachelor s degree in Architecture, Interior Design, 3D Animation, or a related field. 4 5 years of professional experience specializing in interior fit-out or architectural visualization. Proven portfolio demonstrating expertise in SketchUp and V-Ray interior visualizations. Qualification : Bachelors degree in Architecture, Interior Design, 3D Animation, or a related field

Position: RTL Design Engineer Location: Bangalore Education: Engineering Degree in Electronics & Communication (E&C) Experience: 3 to 6 years Job Overview We are seeking a skilled RTL Design Engineer to own the full lifecycle of FPGA design projects from understanding customer requirements to final delivery. You will define DSP, system, and board architecture, partition algorithms between FPGA and software, and lead design, simulation, and verification activities. This role requires hands-on expertise with FPGA technologies, strong problem-solving skills, and the ability to engage closely with customers and production teams. Key Responsibilities Interpret customer requirements, specifications, and tender documents to define system architecture. Take end-to-end ownership of projects including risk assessment, mitigation planning, schedule tracking, and customer discussions. Partition signal processing algorithms for FPGA and software implementation; identify key building blocks. Provide estimates for FPGA resources, computational and memory bandwidth needs. Develop detailed module-level designs including coding, simulation, and peer reviews. Apply design, verification, and validation methodologies rigorously. Prepare and maintain comprehensive project documentation, including design and analysis reports. Support customers during integration and testing phases on-site. Assist production teams with technical support. Define RTL architecture and perform HDL coding, simulation, implementation, board testing, and debugging. Professional Skills & Technical Expertise Proficient in VHDL coding; experience with Verilog or SystemVerilog is a plus. Expertise with Xilinx FPGA devices and associated synthesis and implementation tools. Strong experience in functional simulation and hardware logic design/debugging. Familiarity with FPGA synthesis and place & route (PAR) tools. Experience implementing DSP algorithms in FPGA environments, especially for Radar and Electronic Warfare applications. Skilled in modeling algorithms using MATLAB/Octave, generating test vectors, and data visualization. Working knowledge of interfacing with ADCs and DACs, and analyzing their performance. Good command of configuration and version control tools such as SVN. Excellent communication and presentation skills for technical discussions and customer interactions. What You ll Bring Strong analytical mindset and problem-solving abilities. Ability to work independently and manage multiple tasks effectively. Detail-oriented with a commitment to high-quality design and documentation. Collaborative attitude to work across teams and customer sites. Qualification : Engineering Degree in Electronics & Communication (E&C)

Position: Junior/Senior Design Engineer Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication / Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 2 to 4 years Job Overview We are looking for a passionate and detail-oriented Hardware Design Engineer (Junior/Senior level) to join our engineering team in Bangalore. In this role, you will be responsible for designing high-performance embedded hardware systems, from circuit design and schematic capture to board bring-up and testing. You ll work closely with cross-functional teams to deliver robust, scalable, and reliable hardware solutions, primarily for embedded and defense applications. Key Responsibilities Execute assigned hardware design tasks within defined timelines. Design and develop complex hardware circuits, schematics, and PCB layouts. Perform Signal Integrity (SI), Power Integrity (PI), and thermal analysis. Develop hardware test plans and execute board/system testing accordingly. Conduct board bring-up, validation, and debugging of hardware platforms. Participate in design reviews, defect prevention, and continuous improvement activities. Adhere to all QMS (Quality Management System) and project-specific processes. Prepare detailed technical documentation and maintain design records. Flag and resolve any technical challenges with guidance from tech leads. Technical Skill Set Strong expertise in circuit design, schematic capture, and PCB design. Hands-on experience with 16-bit or 32-bit processors/microcontrollers (e.g., ARM, PowerPC, IBM PPC 405, Intel x86). Experience with FPGA-based board designs. Good understanding of high-speed board design and signal integrity concepts. Familiarity with system interfaces: PCI, PCIe, VME, Compact PCI, ATCA/AMC is a plus. Exposure to embedded hardware design for defense applications. Understanding of qualification processes for industrial/defense-grade products. Proficiency in board bring-up and hardware debugging techniques. Technology Domains Storage Technologies: iSCSI, SATA, Fibre Channel Processors: MIPS, ARM, PowerPC Interfaces: USB, PCIe, PCI-X Memory: DDR, DDR2, RLDRAM Soft Skills & Attributes Strong verbal and written communication skills Excellent interpersonal and teamwork abilities Proactive and solution-oriented mindset Strong time management and organizational skills Opportunity to work on cutting-edge hardware design projects in embedded and defense domains Exposure to the complete hardware development lifecycle Collaborative and inclusive work culture Learning and development support Competitive compensation package Qualification : M.E./M.Tech. in Electronics & Communication

Position: Technical Lead / Project Lead Hardware Design Location: Bangalore Education: B.E./B.Tech. in Electronics & Communication or Electronics & Telecommunication M.E./M.Tech. in Electronics & Communication Experience: 5 to 8 years Job Overview We are seeking a dynamic and experienced Technical Lead / Project Lead Hardware Design to join our engineering team in Bangalore. In this leadership role, you will guide a team of hardware engineers through the end-to-end design and development of advanced embedded and FPGA-based systems primarily for defense and industrial applications. You'll be responsible for ensuring high-quality, defect-free, and timely project deliveries while driving technical excellence and process adherence. Key Responsibilities Technical Leadership Lead hardware design projects from specification to delivery, ensuring robust and scalable solutions. Provide technical guidance to team members in circuit design, schematic development, and board-level design. Finalize board specifications based on customer requirements and prepare detailed technical documentation. Review hardware modules and ensure compliance with design best practices and industry standards. Lead Signal Integrity (SI), Power Integrity (PI), and thermal analysis during design and validation phases. Project Management Plan, monitor, and track project schedules, resource allocation, and delivery milestones. Coordinate with the Project Manager and cross-functional teams to ensure alignment and timely progress. Conduct internal project meetings, present status updates, and recommend process or technical improvements. Ensure adherence to QMS guidelines, project processes, and quality goals. Team Development & Support Mentor junior engineers and support individual learning and development plans. Manage a small team, resolve technical and interpersonal challenges, and promote a collaborative work environment. Assist in performance reviews and team development initiatives. Quality & Process Improvement Drive defect prevention initiatives and participate in continuous improvement of design processes. Coordinate configuration management and quality control activities throughout the project lifecycle. Technical Skill Set Strong hands-on experience in FPGA-based board design and embedded hardware development. Expertise in system-level architecture, processor interfaces, DDR memory design, serial bus protocols, and networking. Proficient in board bring-up and debugging at system level. Experience with embedded hardware design for defense applications and understanding of qualification processes. Tools: Schematic capture/layout: OrCAD, Allegro Signal integrity tools for SI/PI analysis Soft Skills Excellent verbal and written communication skills Strong people management and leadership capabilities Effective time management, organization, and planning Proven ability to manage small teams and drive project success Familiarity with quality systems and engineering best practices Opportunity to work on cutting-edge, high-impact hardware projects Collaborative and technically strong work environment Competitive compensation and benefits package Focus on leadership development and continuous learning Dynamic and inclusive workplace culture Qualification : M.E./M.Tech. in Electronics & Communication

Position: Lead Design Engineer Location: Bangalore Education: B.E./B.Tech. in Computer Science or Electronics & Communication M.E./M.Tech. in Computer Science or Electronics & Communication Experience: 5 to 9 years Job Overview We are looking for a skilled and motivated Lead Design Engineer to join our embedded systems team in Bangalore. In this role, you will take ownership of designing and developing high-performance device drivers and embedded Linux applications for ARM and/or TI DSP platforms. You will play a critical role in end-to-end development from architecture and coding to testing and debugging while also supporting customer requirements and contributing to technical discussions. This role requires strong expertise in embedded Linux development, device drivers, and excellent problem-solving abilities. Key Responsibilities Design, develop, and optimize device drivers and protocol stacks for embedded Linux on ARM and/or TI DSPs. Perform kernel-level development, debugging, and performance tuning. Analyze and resolve issues reported in existing designs; provide timely support and fixes. Work on application and middleware development for embedded systems. Participate in architecture discussions, define module-level details, and write clean, efficient code. Conduct peer reviews and follow best practices in design, coding, and testing. Develop and maintain comprehensive design documents, user manuals, and test reports. Perform performance and dependency analysis of embedded components. Engage with customers in discussions, conference calls, and technical clarifications. Collaborate with technical leads and team members to ensure timely project delivery. Required Skills & Experience Strong hands-on experience in device driver development for embedded Linux on ARM and/or TI DSPs. Successfully delivered at least two embedded projects involving driver or kernel development. Solid understanding of operating system concepts, C/C++, data structures, and multithreading. Experience with Linux framework development, preferably on TI DSPs. Proficient in debugging and performance optimization in embedded environments. Knowledge of IPC mechanisms, task/thread management, and handling deadlocks. Experience working in a collaborative environment with code reviews and version control. Preferred (Nice-to-Have) Skills Familiarity with audio-video streaming technologies and codecs such as MPEG2/H.264. Understanding of high-speed interfaces like PCIe with DMA. Basic knowledge of networking protocols, especially TCP/IP stack. Soft Skills & Attributes Strong analytical and debugging skills Effective communicator, capable of working with cross-functional teams and clients Self-driven with a proactive mindset Strong organizational and documentation skills Ability to handle multiple priorities and deliver under tight deadlines Opportunity to work on cutting-edge embedded systems and real-time applications Collaborative and technically rich work environment Competitive compensation package Continuous learning and growth opportunities Exposure to high-performance embedded development in mission-critical domains Qualification : M.E./M.Tech. in Computer Science or Electronics & Communication

Tool Design Engineer Location: Bangalore Department: Tool Design Designation: Engineer Tool Design About the Role Sansera Engineering is looking for a motivated and skilled Tool Design Engineer to join our dynamic team. The ideal candidate will be responsible for designing, developing, and testing tooling solutions that support efficient and high-quality manufacturing processes. This role requires close collaboration with production, quality assurance, and supply chain teams to ensure successful project execution and continuous improvement. Key Responsibilities Design and develop cutting tools and fixtures using AutoCAD and 3D modeling software. Select appropriate cutting tools based on process requirements and application. Create detailed engineering drawings including isometric views, GD&T, and basic fixtures. Conduct feasibility studies, perform engineering calculations, and analyze tooling costs (process cost, cycle time, tool cost per component). Troubleshoot issues related to cutting tools and machining processes to improve efficiency. Drive continuous improvements in machining and tooling processes. Prepare technical documentation, reports, and project specifications. Assist in project planning, scheduling, and meeting deadlines within budget constraints. Analyze performance data to optimize tool designs and manufacturing processes. Stay updated on the latest industry trends, technologies, and best practices. Ensure compliance with quality assurance standards and safety protocols. Skills and Qualifications Diploma or Bachelor s degree in Mechanical Engineering. 3 to 6 years of experience in tool design, preferably within a manufacturing or machining environment. Proficiency in AutoCAD and 3D CAD tools for tool design. Strong knowledge of cutting tool selection and machining processes. Familiarity with GD&T (Geometric Dimensioning and Tolerancing). Good understanding of manufacturing processes, materials, and cost optimization. Excellent analytical, problem-solving, and communication skills. Ability to collaborate effectively within cross-functional teams. Awareness of quality standards such as ISO and experience with quality assurance processes. Strong project management skills with the ability to handle multiple tasks concurrently. Opportunity to work with a leading engineering company specializing in high-precision automotive and aerospace components. Dynamic and supportive work environment that encourages innovation and professional growth. Involvement in cutting-edge tooling projects that impact global manufacturing operations. Qualification : Diploma or Bachelors degree in Mechanical Engineering

ASIC Engineer, Implementation Location: Bangalore, India Full Time Company: Meta Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, and synthesis to build efficient System on Chip (SoC) and IP for data center applications. Successful candidates must remain in the same role within the team in India for a minimum of 24 months before being eligible for a transfer to another role, team, or location. ASIC Engineer, Implementation Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for timing, area, and power. Debug timing/area/congestion issues and collaborate with RTL and Physical Designers to resolve them. Perform Power Estimation at both RTL and Gate Level and identify power reduction opportunities. Run Formal Verification checks between RTL and Gate level netlist and debug issues such as aborts, inconclusive, and logic equivalency failures. Perform RTL Lint and work with designers to create necessary waivers. Perform RTL DFT Analysis and improve coverage for Stuck-at faults. Conduct Flat and Hierarchical Clock Domain Crossing (CDC) and work with designers to analyze complex clock domain crossings and sign-off. Conduct Flat and Hierarchical Reset Domain Crossing (RDC) checks and develop reset sequences for RDC in collaboration with Design and Firmware teams. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for blocks and top-level SoC designs. Analyze inter-block timing and generate IO budgets for partition blocks. Develop Power Intent Specification in UPF for multi-Vdd designs. Develop automation scripts and methodology for all FE-tools including Lint, CDC, RDC, Synthesis, STA, and Power. Work closely with Design Engineers, DV Engineers, and Emulation Engineers to support handoff tasks. Collaborate with Physical Design Engineers to provide timing and congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 5+ years of experience in Design Integration and Front-End Implementation. Experience with RTL Synthesis and design optimization for Power, Performance, and Area. Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other HDLs. Experience managing multiple design releases and working with cross-functional teams to support and debug timing, area, and power issues. Proficiency with EDA tools and scripting languages (Python, TCL) for building complex toolflows. Experience communicating and collaborating with internal teams and vendors. Preferred Qualifications: Knowledge of Clock Domain Crossing, Reset Domain Crossing, and LEC. Background in Synthesis, Timing Constraints Development, Floorplanning, and STA. Experience with RTL coding using Verilog/System Verilog. Familiarity with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area analysis techniques for power reduction. Experience with Low Power design and tools like Design Compiler, Spyglass, PrimeTime, Formality, or equivalent tools. Strong programming and scripting skills using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it revolutionized how people connect. Apps like Messenger, Instagram, and WhatsApp have empowered billions globally. Meta is now advancing beyond 2D screens into immersive experiences like augmented reality and virtual reality, shaping the future of social technology. Meta provides an opportunity to be part of creating a future where digital connection transcends screens, distances, and even the rules of physics. Equal Employment Opportunity: Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other legally protected characteristics. Qualification : Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm, a leading innovator in technology, is pushing the boundaries of possibility to drive the digital transformation and create a smarter, more connected future. As a Hardware Engineer at Qualcomm, you will play a key role in designing, optimizing, verifying, and testing a wide range of electronic systems. This includes everything from circuits, mechanical systems, digital/analog/RF/optical systems, and test systems, to FPGA and DSP systems. You will collaborate with cross-functional teams to develop solutions that meet performance requirements and launch world-class products. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 3+ years of experience in Hardware Engineering or a similar field. OR Master's degree in Computer Science, Electrical/Electronics Engineering, or a related field, with 2+ years of experience in Hardware Engineering or a related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field, with 1+ year of experience in Hardware Engineering or a related field. Experience: 7 to 10 years Key Responsibilities and Skills: Physical Design Expertise: Extensive experience with block-level physical design, including a strong understanding of the PnR cycle. Industry-Standard Tools: Proficiency in industry-standard physical design tools like ICC2 and Innovus. Signoff Tools: Solid understanding and hands-on experience with signoff tools such as PrimeTime, Redhawk, and Calibre. Technical Leadership: Ability to guide and mentor junior engineers, helping them resolve technical challenges effectively. Tools & Scripting: Experience with tools like ICC/Innovus, PrimeTime (PT), StarRC, Redhawk, and Calibre DRC/LVS. Proficient in scripting languages such as TCL and Perl.

Job Title: RTL Design Engineer Job Description: Join Intel s Design Team and contribute to the development of high-quality Intel products. In this role, you will work on RTL tool flow methodologies, leveraging industry-standard design tools and scripting environments such as Perl and Python to enhance design automation and optimization. Key Responsibilities: Work on digital design concepts and RTL design using Verilog. Develop and implement RTL tool flow methodologies to optimize design efficiency. Utilize industry-standard design tools to enhance digital design workflows. Develop scripts using Perl and Python to automate design processes. Apply computer architecture knowledge to drive innovations in design methodologies. Qualifications & Requirements: Educational Qualifications: Master s (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions. Technical Skills & Experience: Strong understanding of digital design concepts and computer architecture. Experience with RTL design using Verilog. Proficiency in scripting languages such as Perl and Python for automation. Familiarity with industry-standard design tools and RTL tool flow methodologies. About the Client Computing Group (CCG): The Client Computing Group (CCG) at Intel leads the development of PC products and platforms, spanning notebooks, desktops, 2-in-1s, and all-in-one devices. By collaborating with industry partners, CCG delivers cutting-edge computing experiences that enable users to create, connect, and innovate. As Intel s largest business unit, CCG plays a pivotal role in driving technological advancements and product innovation. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Professional development and career growth opportunities. Qualification : Masters (M.Tech/MS) degree in Computer Science, Electrical Engineering, Electronics, Telecommunications, Microelectronics, or VLSI from IITs, NITs, or equivalent institutions.

Job Title: CPU/Core Design Engineer (Intern) Job Description: Join Intel s Core and Client Development Group (C2DG) and contribute to the development of leading-edge CPU and Core technologies. In this role, you will be involved in CPU/Core design activities across various domains, supporting Intel s ongoing and next-generation Core CPUs. Key Responsibilities: Contribute to CPU/Core logic design for Intel s high-performance processors. Support pre-silicon verification, system validation, and firmware development. Assist in physical design, layout, and DFT (Design for Testability) engineering. Work with cross-functional teams to ensure high-quality and efficient CPU designs. Utilize industry-standard tools and methodologies for design and validation processes. Qualifications & Requirements: Educational Qualifications: Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in: Microelectronics & VLSI Digital System Design Computer Architecture Preferred Skills: Logic Design and digital circuit design fundamentals. Pre-Silicon Verification using simulation and validation techniques. Physical Design & Layout methodologies for semiconductor products. DFT (Design for Testability) Engineering. System Validation for ensuring reliability and performance. Firmware development related to CPU architecture and microarchitecture. About the Core and Client Development Group (C2DG): The Core and Client Development Group (C2DG) is a global organization responsible for the development and integration of SoCs, Core processors, and critical IPs that power Intel s flagship products. C2DG drives the client roadmap for Intel s Client Computing Group (CCG), delivers server-first cores for Data Center Group (DCG), and invests in future disruptive technologies. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, ensuring fair consideration for all applicants regardless of race, color, religion, gender, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a highly competitive total compensation package, including: Competitive pay, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career growth. Qualification : Currently pursuing a Postgraduate Degree (M.Tech or equivalent) from a reputed institute in:

Job Description Join Intel s world-class Graphics Physical Design Team, working on high-performance GPUs/GFX targeting high-end graphics, gaming, artificial intelligence, and media processing. This is an exciting opportunity to collaborate with a talented team early in the product lifecycle, driving innovation in RTL-to-GDSII implementation for multi-million gate designs on advanced process nodes. Key Responsibilities: RTL-to-GDSII implementation, including logic synthesis, physical synthesis, and routing. Clock tree synthesis, performance verification (static timing), noise and power verification. Conduct ERC (Electrical Rule Check), reliability verification, and layout verification. Work closely with design automation, methodology, and product integration teams to enhance execution efficiency and quality. Contribute to process improvements and methodology advancements. Qualifications & Requirements: Educational Qualifications: Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design. Preferred Skills: Strong fundamentals in Digital VLSI design and RTL-to-GDSII ASIC Design flow. Excellent problem-solving skills and a strong ability to learn new concepts and methodologies quickly. Basic knowledge of UNIX/Linux environments and scripting languages such as Perl, Python, and TCL (a plus). About the Client Computing Group (CCG): The Client Computing Group (CCG) drives Intel s PC business strategy and product development, spanning notebooks, desktops, 2-in-1s, and all-in-one systems. Working alongside industry partners, CCG delivers cutting-edge computing experiences that empower users to focus, create, and connect. As Intel s largest business unit, CCG continues to innovate aggressively, investing in leadership products, next-generation technologies, and scalable IP solutions. Intel s Commitment to Diversity & Inclusion: Intel is an equal opportunity employer, providing fair consideration to all applicants regardless of race, color, religion, gender, sexual orientation, national origin, disability, veteran status, or any other protected characteristic under local law. Intel offers a best-in-class compensation and benefits package, including: Competitive salary, stock options, and performance-based bonuses. Comprehensive healthcare, retirement plans, and paid time off. Opportunities for professional development and career advancement. Qualification : Final-year M.Tech students specializing in Electrical, Electronics, or Microelectronics Engineering, with exposure to Semiconductors and VLSI design.

Job Title: Hardware Engineer General Summary: Qualcomm, a leading technology innovator, is at the forefront of next-generation experiences and digital transformation. Our mission is to create a smarter, more connected future by pushing the boundaries of hardware engineering. As a Hardware Engineer at Qualcomm, you will be involved in the design, optimization, verification, and testing of cutting-edge electronic systems. You will work on digital, analog, RF, and optical systems, covering circuit design, mechanical systems, test systems, FPGA, DSP, and packaging. Collaborating with cross-functional teams, you will develop high-performance solutions that meet industry-leading standards. Key Responsibilities: Front-End Design & Implementation: Develop and implement MSIP designs (Temperature/Voltage/Security Sensors, Controllers). Perform RTL development and validation, ensuring compliance with linting, clock-domain crossing (CDC), conformal low-power, and DFT rules. Verification & Debugging: Collaborate with the functional verification team to define test plans and debug issues. Support SoC integration and chip-level pre/post-silicon debugging. Synthesis & Timing Analysis: Develop timing constraints and deliver synthesized netlists to the physical design team. Provide constraints support for static timing analysis (STA). Write Unified Power Format (UPF) for power-aware equivalence checks and low-power validation. Design for Testability (DFT): Insert DFT structures and perform ATPG analysis to optimize Stuck-at Fault (SAF) and Transition Delay Fault (TDF) coverage. Minimum Qualifications: One of the following: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of hardware engineering experience. Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of hardware engineering experience. Preferred Skills & Experience: 6+ years of experience in hardware engineering, preferably in front-end design and verification. Expertise in micro-architecture development, RTL design, and front-end flows (Lint, CDC, Low-Power Checks, etc.). Hands-on experience with synthesis, DFT, formal verification (FV), and STA. Exposure to post-silicon bring-up and debugging is a plus. Strong ability to collaborate with global teams and excellent communication skills. Work with industry-leading technology in a highly innovative environment. Be part of a collaborative, global team that values technical excellence. Enjoy a competitive salary, professional development, and growth opportunities. Qualification : Masters degree in Computer Science, Electrical/Electronics Engineering

Position: VLSI Trainer Experience: 3 8 years Education: M.Tech in VLSI / B.E. in Electronics and Communication Engineering (ECE) Industry: Education, E-Learning, Semiconductor Job Type: Training Job Description We are seeking an experienced VLSI professional with strong expertise in digital design and verification to join our training team. The ideal candidate should have a passion for teaching and hands-on experience in VLSI design and verification methodologies. Key Responsibilities: Conduct training sessions on Digital Design, SystemVerilog (SV), UVM, Verilog, VHDL, DFT, and related tools. Provide hands-on support and guidance to trainees on various projects. Debug and troubleshoot source code in Verilog, SV, and UVM. Develop and support training projects and technical content. Deliver high-quality training sessions and post-training support. Desired Skills & Experience: Proficiency in Digital Design, Verilog, VHDL, SystemVerilog (SV), UVM, DFT, and Physical Design. Experience working with Mentor Graphics EDA, Cadence, or Synopsys tools is a plus. 3 to 8 years of experience in the semiconductor industry, teaching, or training. Strong communication and presentation skills. Mandatory Requirements: Solid understanding of VLSI design and verification concepts. Excellent problem-solving abilities and debugging skills. Qualification : M.Tech VLSI/BE ECE

Position: VLSI Trainer (Entry Level) Experience: 0 1 year Education: M.Tech in VLSI / B.E. in Electronics and Communication Engineering (ECE) Industry: Education, Training, Semiconductor Job Type: Training Job Description We are looking for an entry-level VLSI professional to join our training team. The ideal candidate should have a strong foundation in VLSI concepts, with a keen interest in guiding and mentoring trainees. Key Responsibilities: Develop and support projects related to VLSI design and verification. Debug and troubleshoot source code in Verilog, SystemVerilog (SV), and UVM. Monitor trainees progress and provide constructive feedback. Act as the primary point of contact for trainees' technical queries. Qualification : M.Tech in VLSI / B.E. in Electronics and Communication Engineering (ECE)

NVIDIA is seeking a passionate, highly motivated, and creative ASIC Design Engineer to design and implement PCI Express controllers for the world s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Own the micro-architecture and RTL development of design modules for PCI Express Controllers. Micro-architect features to meet performance, power and area requirements. Work with HW and system architects to define critical features. Help verification teams to verify the correctness of implemented features. Collaborate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Enable FPGA and software teams to prototype the design and ensure that software is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 3+ years of design experience. Experience in micro-architecture and RTL design of complex units. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in High Speed IO controllers like PCI Express. Good knowledge of PCI Express Protocol - Gen 3 and above. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a teammate. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid Qualification : BS / MS or equivalent experience.

Experience: 4+ Years (Bachelor s) | 3+ Years (Master s) | 2+ Years (PhD) Company Overview As a leading technology innovator, Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drive digital transformation, helping to create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to plan, design, optimize, verify, and test cutting-edge products, enabling transformative solutions in the hardware space. Role Overview The SRAM Design Engineer will be responsible for the design, verification, and optimization of SRAM (Static Random-Access Memory) blocks for advanced process nodes. This role requires deep expertise in custom circuit design, low-power methodologies, and process technology trends. The ideal candidate will work on complex memory designs, collaborate with cross-disciplinary teams, and contribute to Qualcomm's next-generation hardware solutions. Key Responsibilities Design and develop SRAM circuits for advanced technology nodes (FinFET and beyond). Perform schematic design, simulation, and verification of memory circuits to meet performance, power, and area (PPA) targets. Optimize designs for low-power, high-speed, and high-density applications. Collaborate with layout engineers to ensure design compliance with foundry design rules and assist in layout optimization. Analyze and resolve design for manufacturing (DFM) and yield issues. Work closely with cross-functional teams (architecture, verification, and technology teams) to meet design specifications and performance requirements. Utilize SPICE simulations and other EDA tools to validate circuit functionality and robustness under process, voltage, and temperature (PVT) variations. Contribute to the post-silicon bring-up and debugging of memory-related issues. Qualifications Minimum Requirements: Bachelor s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 4+ years of relevant work experience. OR Master s degree in Computer Science, Electrical/Electronics Engineering, or a related field and 3+ years of relevant work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, or a related field and 2+ years of relevant work experience. Technical Skills: Expertise in SRAM design, simulation, and verification. Strong knowledge of circuit design principles, including timing, noise, and power analysis. Experience with advanced process technologies (FinFET, 7nm, 5nm, 3nm). Proficiency with SPICE-based simulators and EDA tools for circuit analysis. Understanding of memory architecture, power management techniques, and design for yield (DFY) methodologies. Familiarity with DFM practices, chip integration, and physical design constraints. Preferred Qualifications: Experience in low-power SRAM design and assist circuits (read/write assist). Knowledge of self-repairing memories and redundancy schemes. Exposure to silicon validation, post-silicon debug, and memory characterization. Excellent problem-solving and communication skills.

Job Description and Requirements Synopsys is seeking a creative and talented engineer to fill a FPGA Design & Verification role in Bengaluru, India. The environment presents stimulating, challenging, and rewarding work within an excellent work environment with positive career development opportunities. About the Role The FPGA Design and Verification IP Prototyping team is responsible for building FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs and testing them to verify compliance with leading-edge industry standards. We play a vital role in supporting Synopsys IP business by validating key features and mitigating potential ASIC faults early in the prototyping phase. Responsibilities Design, implement, and verify FPGA-based systems for a variety of applications Validate FPGA-based IP prototypes against real-world devices, test equipment, and other hardware systems Create and maintain comprehensive technical documentation Develop and execute test plans and routines Detect, troubleshoot, debug, and investigate potential ASIC issues early on Collaborate with cross-functional teams, internal and external customers Key Qualifications Bachelor's or Master's degree in Electrical Engineering 1+ years of experience in FPGA design and development Design and simulate integrated circuitry using Verilog, SystemVerilog, and VHDL Familiarity with industry-standard interfaces and protocols such as AMBA AXI, APB, I2C, and SPI Expertise with scripting languages such as Tcl, Python, Perl, and Bash Proven problem-solving skills and ability to work in a collaborative team environment Excellent verbal and written communication skills in English Preferred Experience Familiarity with SCM tools like Git Experience with FPGA development tools such as Vivado or Altera Quartus Familiarity with laboratory equipment such as oscilloscopes and data analyzers Knowledge of the MIPI-I3C protocol Understanding of computer architecture and operating systems Qualification : Bachelor's or Master's degree in Electrical Engineering

Introduction As a Hardware Developer at IBM, you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today s market. Your Role and Responsibilities As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Leading the development of the verification environment, testbenches and writing testcases. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Required Technical and Professional Expertise 9 + years of experience in Functional Verification of processors or ASICs. Minimum 6+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Core architecture/micro-architecture verification Multi-processor cache coherency, Memory subsystem verification. IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification. Gate level simulation and emulation. Track record in leading team. Clock domain crossing and reset domain crossing verification Knowledge of functional verification methodology UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Developed test-plans and test strategies for IP/unit/block level verification. Good object-oriented programming skills in C/C++, scripting languages like Python/Perl. Worked on multiple levels of verification (unit/element/sub-system/system level) Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in driving verification coverage closure. Preferred Technical and Professional Expertise Stress testing and ability to identify corner case scenarios. Knowledge of high-speed SERDES and PHY Verification Good understanding of computer system architecture and microarchitecture. Knowledge in IP Integration and SoC level verification.