Sr Staff Elect Design Engr 1 Job in Cypress Semiconductor Corporation

Sr Staff Elect Design Engr 1

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Job Summary Job Description

Job Description

  • In depth knowledge & experience of Microarchitecture,RTL, Synthesis, STA etc.
  • Must have hands on with Logic Synthesis, Linting, CDC and DFT tools.
  • Strong fundamentals in Verilog, RTL design, logic design.
  • Should be able to define micro-architecture and design RTL.
  • Should be able to understand and debug timing issues, synthesis techniques, DFT methodologies.
  • Experience with scripting languages like Perl, skill, tcl or equivalent to automate flows is a plus.
  • Knowledge with Type-C, USB2.0/3.0/3.1 protocols is a plus.

Skills Required :
Design Engineer, Engineering
Qualification :
Skills
Experience Required :

Fresher

Vacancy :

2 - 4 Hires

Skills Required :

Design Engineer, Engineering

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