Senior Design Verification Engineer, Silicon Job in Google Careers

About the Job:

Join a diverse team at Google dedicated to pushing boundaries and developing custom silicon solutions that power the future of Google s direct-to-consumer products. You will play a crucial role in shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration across the globe.

At Google, we combine the best of AI, software, and hardware to create innovative products that are loved by millions worldwide. Our mission is to organize the world s information and make it universally accessible and useful, and we aim to improve lives through cutting-edge technology. As a Senior Digital Design Verification Engineer, your expertise will contribute to the development of highly complex SoCs (System on Chips) and custom silicon solutions, ensuring they meet Google s high standards for performance and reliability.

Responsibilities:

• Verification Planning & Design: Plan the verification of digital design blocks at the Sub-System level. Work closely with design engineers to fully understand the design specifications and identify important verification scenarios.

• Verification Environments: Create and enhance constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology). You will also leverage formal verification tools and techniques, including SVA (SystemVerilog Assertions), for design validation.

• Debugging & Collaboration: Work closely with design engineers to debug and identify functional issues in design blocks, ensuring the delivery of functionally correct designs.

• Cross-functional Collaboration: Collaborate with architecture, design teams, software teams, and other stakeholders to define and execute the overall verification strategy for SoCs.

• Verification Ownership: Take ownership of functional verification for intellectual property (IP), serving as the primary point of contact for cross-functional teams to resolve issues and ensure a smooth integration process.

• Quality Assurance: Drive and contribute to the quality assurance process to ensure a high standard of verification and successful delivery of designs.

Minimum Qualifications:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent practical experience).

• 8 years of experience working with verification methodologies and languages such as UVM and SystemVerilog.

• Proven experience in developing and maintaining verification testbenches, test cases, and environments.

Preferred Qualifications:

• Master s Degree in Electrical Engineering, Computer Science, or a related field (or equivalent practical experience).

• Experience with low power verification, debugging, Gate Level Simulation (GLS), and formal verification techniques.

• Track record in successfully leading design verification for IPs, delivering them to multiple SoCs.

• Proven experience in driving cross-functional teams to ensure quality tape-outs and navigating dependencies with various stakeholders.

• Strong expertise in driving or owning sub-system level verification and managing all associated complexities.

Why Google?

• Innovation at Scale: Contribute to building revolutionary hardware and software products used by millions of people across the world.

• Growth & Learning: Collaborate with world-class engineers and learn from experts in the field.

• Cutting-edge Technology: Work at the intersection of AI, software, and hardware to shape the future of computing.

If you re passionate about digital design verification and eager to contribute to cutting-edge silicon solutions, we d love to hear from you. Join Google s mission to make people s lives better through technology!

Google is an equal opportunity employer.