Principal Engineer - Asic Soc Verification Job in Spectrum Consultants India Pvt Ltd
Principal Engineer - Asic Soc Verification
Spectrum Consultants India Pvt Ltd
4+ weeks ago
- Hyderabad, Telangana
- Not Disclosed
- Permanent
Job Summary
Job Responsibilities :
Contribute to the development of new memory products through the design
optimization of memory circuits (such as pitched cells, datapath, pumps & regulators, I/O, Controller ).
Understand design specification at the chip level and breakdown of functions into circuit sub-components, in the analog and/or digital domain.
Create a schematic description of circuit functions at the schematic level or behavioral level, using industry available capture tools, such as Cadence Composer and the Verilog behavioral language.
Verify the circuit functionality in the analog and/or logic domain, using industry available simulators such as Hspice, Hsim for the electrical analysis and NC-Verilog for the digital design verification
Provide design documentation (schematic, behavioral, simulation) at the circuit level and chip level, including lesson learned update.
Provide clear directions and documentation and interact with layout team to ensure that the block layout is fully compliant with designer s expectations in the terms of performances.
Cooperates with PE for silicon debug and verification
Additional tasks may include new circuit conception and design.
Contribute to the development of new memory products through the design
optimization of memory circuits (such as pitched cells, datapath, pumps & regulators, I/O, Controller ).
Understand design specification at the chip level and breakdown of functions into circuit sub-components, in the analog and/or digital domain.
Create a schematic description of circuit functions at the schematic level or behavioral level, using industry available capture tools, such as Cadence Composer and the Verilog behavioral language.
Verify the circuit functionality in the analog and/or logic domain, using industry available simulators such as Hspice, Hsim for the electrical analysis and NC-Verilog for the digital design verification
Provide design documentation (schematic, behavioral, simulation) at the circuit level and chip level, including lesson learned update.
Provide clear directions and documentation and interact with layout team to ensure that the block layout is fully compliant with designer s expectations in the terms of performances.
Cooperates with PE for silicon debug and verification
Additional tasks may include new circuit conception and design.
Experience Required :
8 to 15 Years
Vacancy :
2 - 4 Hires
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