Verification Applications Engineer Job in Synopsys

Verification Applications Engineer

The primary focus of this Verification Applications Engineer is to engage with the industry leaders and be a consultant to Semiconductor teams across geographies on deploying advanced technologies to verify the next generation protocol standards on their latest chips. Working on the latest protocols before they are adopted by industry and drive innovation and automation around adoption across different verification flows
Excel and drive expertise in emerging areas like DSL, Python enabled verification, and advanced UVM capabilities, across IP, Subsystem, and SOC verification
Help drive product direction of next-generation Verification IPs.

Key Requirements:

• Expertise in the verification of ASIC/FPGA devices using SV & UVM.
• Strong understanding of verification process and flow.
• Strong Debugging skill
• Must have worked on standard protocols (AMBA, USB, PCI Express, Ethernet, etc.).- Experience verifying hierarchically partitioned large ASICs, System Verilog /C++ co-simulation.
• Overall knowledge of the ASIC development process, ability to train/mentor junior engineers
• Strong communication skill and positive attitude to accept challenging work