Dfx / Dft Architect Job in Tessolve

Qualification: BE / ME / B.Tech / M.Tech in EEE/ECE/EI/CS

Experience: 4 to 15 Years

No of Position: 20+ (Including 2 Leads / 2 Experts)

Location: Bangalore

Preference: Candidate from semiconductor back ground

Requirements:

• Strong knowledge of DFT architectures & methodologies. This includes Scan, BScan, IO DFx, analog DFT, JTAG, Boundary scan, etc with minimum experience of 4+ years.
• Proven knowledge of Verilog , RTL design and micro-architecture skills. Strong knowledge of SoC tools/methodology (Synopsis VCS* and Verdi, Lintra, Spyglass, Tessent ATPG tools, Synopsys ATPG tools, etc).
• Strong Si debug skills, ATE requirements and understanding of volume test requirements. Strong Communications skills and the ability to effectively work with cross functional teams across geographies.