Memory Circuit Design Job in Tessolve

Qualification: BE / ME / B.Tech / M.Tech in EEE/ECE/EI/CS

Experience: 4 to 8 years

No of Position: 4

Location: Bangalore

Requirements:

• Contribute/Lead towards Design and Development of Single/Multiport SRAM, Register file compilers in 28nm/16FF/7FF Technologies.
• Circuit design/simulation of key components such as bitcell, WL decoder, SAMP, Column decoder and control logic.
• Development of critical path and characterization flow to perform detailed margin and characterization simulations.
• Statistical Analysis of Bit-Cell and Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off.
• Design Tuning, Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets.
• Logic simulations and detailed timing analysis of key paths in high speed memory design.