Soc/ Ip Verification Job in Tessolve

Qualification: BE / ME / B.Tech / M.Tech in EEE/ECE/EI/CS

Experience: 4 to 12 years

No of Position: 10 (Including 2 Leads / 2 Experts)

Location: Bangalore

Requirements:

• The ideal candidate should be a hands-on expert in verification using System Verilog and have hands-on expertise in utilizing modern verification methodologies like VMM/UVM/OVM, to be part of the verification team of core IPs and complex subsystems with 4+ yrs. of experience.
• Experience with verification methodologies such as UVM/VMM/OVM is required, and a strong understanding of UVM is preferred. Candidates are expected to have designed and developed UVM, SVTB and have previously composed functional coverage assertions, preferably using System Verilog.
• Proficient on protocols PCI-Express, RapidIO, NVM Express, LP DDR2/LP DDR3, AXI, AHB, USB, HDMI, MIPI, & ethernet.