Full Chip Lead Job in Wafer Space

Full Chip Physical Implementation Lead. Strategize and drive closure on large SoCs in advanced nodes (28nm or below). Prototyping, Partitioning, Pin Assignment, Timing Budgeting, Full Chip clocking & closure ownership. Set flows and implementation strategies for the entire SoC.

Desired Skills and Experience-

• In depth library analysis & physical design implementation knowledge at full chip level
• ICC2/Innovus exposure is an added plus
• Drive partitioning strategies and come up with flow specifics based on Power/Performance/Area targets
• Multiple Voltage Island flow definition and execution
• RDL route expertise on SoCs with high speed interfaces like SerDes, DDR3/4, MIPI C/D Phy
• Physical Architecture definition expertise
• Experience 12 years+