Prin Asic Design Engr 1 Job in Cypress Semiconductor Corporation

The ICW-SoC Team is searching for a hands-on, team-oriented RTL Design Lead with a proven track record. In this role, the lead engineer will be responsible for leading RTL Design of SoCs in which sub-systems/IPs are integrated. We are looking for a self-motivated and experienced lead engineer who can work with minimal supervision in our SoC team and be able to work closely with our global design teams.

Responsibilities:

• Lead RTL Design for IoT SoCs
• Oversee and provide technical direction to other members of the RTL team.
• Work with digital/analog/RF IP teams to arrive IP configuration at SoC level
• Drive power topology at SoC level, clock structure and reset strategy
• Identify low power opportunities at SoC level
• Define power intent of SoC
• Arrive IO requirements/muxing
• Integration of sub-systems/IPs while considering sub-system/IP features/configurations/generics, power/clock/reset, standard/proprietary interface requirements
• Drive analysis of CDC, lint, low power reports.
• Deliver synthesis constraints at SoC level
• Work closely with architecture, technology, sub system/IP, verification, physical design, DFT teams and to ensure high quality SoC Tape-outs with predictable schedule.
• Participate and drive, as applicable, silicon debug activities.
• Help, drive improvements on-the-fly (as project executes)
• Participate and drive, as applicable, silicon debug activities.
• Ensure an inclusive teamwork environment, inspire team members, and role model.
• Work effectively with several stakeholder teams globally.

• B Tech with 12+ years of experience or M Tech with 10+ year of experience in IP Design with few years of experience of SoC design
• Must have several years of experience of technical leadership and mentoring junior engineers.
• Must have expertise on processor based SoC design which includes (but not limited to), ARM processor, DMAs, power/clock/reset controllers, interfaces like USB/SDIO/PCIe/SPI/UART
• Must have good understanding of high-speed interfaces like USB, SDIO, PCIe and proven track record in such developments.
• Expertise in System Verilog/VHDL languages
• Expertise with scripting
• Team player with good communication skills.
• Strong analytical and problem-solving skills
• Familiarity with Security architecture/requirements is a plus